📄 enc28j60.lst
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263:io/enc28j60.c **** //ERRATA says we need to check packet pointer:
264:io/enc28j60.c **** #if ENC_DEBUG
265:io/enc28j60.c **** softuart_puts_progmem("ENC : nptr <= ");
266:io/enc28j60.c **** #endif
267:io/enc28j60.c **** if ((enc28j60_next_packet_ptr- 1 < ENC28J60_RX_BUFFER_START) || (enc28j60_next_packet_ptr- 1 > ENC
268:io/enc28j60.c **** enc28j60_write_address(ENC28J60_REG_ERXRDPTL, lo8(ENC28J60_RX_BUFFER_END));
269:io/enc28j60.c **** enc28j60_write_address(ENC28J60_REG_ERXRDPTH, hi8(ENC28J60_RX_BUFFER_END));
270:io/enc28j60.c **** #if ENC_DEBUG
271:io/enc28j60.c **** softuart_put_uint16(ENC28J60_RX_BUFFER_END);
272:io/enc28j60.c **** #endif
273:io/enc28j60.c **** }else{
274:io/enc28j60.c **** enc28j60_write_address(ENC28J60_REG_ERXRDPTL, lo8(enc28j60_next_packet_ptr- 1));
275:io/enc28j60.c **** enc28j60_write_address(ENC28J60_REG_ERXRDPTH, hi8(enc28j60_next_packet_ptr- 1));
276:io/enc28j60.c **** #if ENC_DEBUG
277:io/enc28j60.c **** softuart_put_uint16(enc28j60_next_packet_ptr-1);
278:io/enc28j60.c **** #endif
279:io/enc28j60.c **** }
280:io/enc28j60.c **** #if ENC_DEBUG
281:io/enc28j60.c **** softuart_putnewline();
282:io/enc28j60.c **** #endif
283:io/enc28j60.c ****
284:io/enc28j60.c **** //decrement packet counter:
285:io/enc28j60.c **** enc28j60_spi_write_word(ENC28J60_OP_BFS|ENC28J60_REG_ECON2, (1<<ENC28J60_BIT_PKTDEC));
286:io/enc28j60.c ****
287:io/enc28j60.c **** //return length - <crc>
288:io/enc28j60.c **** return (len-4);
289:io/enc28j60.c **** }
290:io/enc28j60.c ****
291:io/enc28j60.c **** //read phy register
292:io/enc28j60.c **** unsigned int enc28j60_read_phy(unsigned char address){
293:io/enc28j60.c **** unsigned int res;
294:io/enc28j60.c ****
295:io/enc28j60.c **** //see microchip datasheet p.21
296:io/enc28j60.c **** //set address to MIREGADR:
297:io/enc28j60.c **** enc28j60_write_address(ENC28J60_REG_MIREGADR, address);
298:io/enc28j60.c ****
299:io/enc28j60.c **** //set MICMD.MIIRD bit:
300:io/enc28j60.c **** enc28j60_write_address(ENC28J60_REG_MICMD, (1<<ENC28J60_BIT_MIIRD));
301:io/enc28j60.c ****
302:io/enc28j60.c **** //now read op is enabled, wait until PHY read finished:
303:io/enc28j60.c **** while(enc28j60_read_address(ENC28J60_REG_MISTAT) & (1<<ENC28J60_BIT_MISTAT_BUSY)){}
304:io/enc28j60.c ****
305:io/enc28j60.c **** //abort read
306:io/enc28j60.c **** enc28j60_write_address(ENC28J60_REG_MICMD, 0x00);
307:io/enc28j60.c ****
308:io/enc28j60.c **** //read result
309:io/enc28j60.c **** res = enc28j60_read_address(ENC28J60_REG_MIRDH)<<8;
310:io/enc28j60.c **** res |= enc28j60_read_address(ENC28J60_REG_MIRDL);
311:io/enc28j60.c ****
312:io/enc28j60.c **** return res;
313:io/enc28j60.c **** }
314:io/enc28j60.c ****
315:io/enc28j60.c **** //write phy register
316:io/enc28j60.c **** void enc28j60_write_phy(unsigned char address, unsigned int data){
317:io/enc28j60.c **** //see microchip datasheet p.21
318:io/enc28j60.c **** //set address to MIREGADR:
319:io/enc28j60.c **** enc28j60_write_address(ENC28J60_REG_MIREGADR, address);
320:io/enc28j60.c ****
321:io/enc28j60.c **** //send the data
322:io/enc28j60.c **** enc28j60_write_address(ENC28J60_REG_MIWRL, data&0xFF);
323:io/enc28j60.c **** enc28j60_write_address(ENC28J60_REG_MIWRH, data>>8 );
324:io/enc28j60.c ****
325:io/enc28j60.c ****
326:io/enc28j60.c **** //wait until PHY write finished:
327:io/enc28j60.c **** while(enc28j60_read_address(ENC28J60_REG_MISTAT) & (1<<ENC28J60_BIT_MISTAT_BUSY)){}
328:io/enc28j60.c **** }
329:io/enc28j60.c ****
330:io/enc28j60.c ****
331:io/enc28j60.c **** //read enc28j60 buffer
332:io/enc28j60.c **** void enc28j60_read_buffer(unsigned char *buffer, unsigned int len){
98 tabn 68,0,332,.LM0-.LFBB1
99 .LM0:
100 .LFBB1:
101 /* prologue: function */
102 /* frame size = 0 */
103 0000 FC01 movw r30,r24
333:io/enc28j60.c **** AD_BUF_MEM;
334:io/enc28j60.c **** while(!(SPSR & (1<<SPIF)));
104 n 68,0,334,.LM1-.LFBB1
105 .LM1:
106 0002 C098 cbi 56-32,0
335:io/enc28j60.c **** 60
336:io/enc28j60.c **** ENC28J60_CS_LO();
337:io/enc28j60.c ****
107 tabn 68,0,337,.LM2-.LFBB1
108 .LM2:
109 0004 8AE3 ldi r24,lo8(58)
110 0006 8FB9 out 47-32,r24
111 .L2:
338:io/enc28j60.c **** d enc28j60 buffer
112 bn 68,0,338,.LM3-.LFBB1
113 .LM3:
114 0008 779B sbis 46-32,7
115 000a 00C0 rjmp .L2
116 000c 00C0 rjmp .L9
117 .L5:
339:io/enc28j60.c **** write finished:
340:io/enc28j60.c **** while(enc28j60_read_address(ENC28J60_REG_MISTAT) & (1<<ENC28J60_BIT_MISTAT_BUSY)){}
341:io/enc28j60.c **** }
342:io/enc28j60.c ****
343:io/enc28j60.c ****
118 n 68,0,343,.LM4-.LFBB1
119 .LM4:
120 000e 1FB8 out 47-32,__zero_reg__
121 .L4:
344:io/enc28j60.c **** );
122 abn 68,0,344,.LM5-.LFBB1
123 .LM5:
124 0010 779B sbis 46-32,7
125 0012 00C0 rjmp .L4
345:io/enc28j60.c **** ess);
126 abn 68,0,345,.LM6-.LFBB1
127 .LM6:
128 0014 8FB1 in r24,47-32
129 0016 8193 st Z+,r24
130 0018 6150 subi r22,lo8(-(-1))
131 001a 7040 sbci r23,hi8(-(-1))
132 .L9:
134 .LM7:
135 001c 6115 cp r22,__zero_reg__
136 001e 7105 cpc r23,__zero_reg__
137 0020 01F4 brne .L5
346:io/enc28j60.c **** ss, unsigned int data){
347:io/enc28j60.c **** //see microchip datasheet p.21
348:io/enc28j60.c **** //set address to MIREGADR:
349:io/enc28j60.c **** enc28j60_write_address(ENC28J60_REG_MIREGADR, address);
138 ,349,.LM8-.LFBB1
139 .LM8:
140 0022 C09A sbi 56-32,0
141 /* epilogue start */
350:io/enc28j60.c **** ss, unsigned int data){
142 abn 68,0,350,.LM9-.LFBB1
143 .LM9:
144 0024 0895 ret
146 .Lscope1:
150 .global enc28j60_write_buffer
152 enc28j60_write_buffer:
351:io/enc28j60.c **** j60_read_address(ENC28J60_REG_MIRDL);
352:io/enc28j60.c ****
353:io/enc28j60.c **** return res;
153 0,353,.LM10-.LFBB2
154 .LM10:
155 .LFBB2:
156 /* prologue: function */
157 /* frame size = 0 */
158 0026 FC01 movw r30,r24
354:io/enc28j60.c **** MD, 0x00);
355:io/enc28j60.c ****
159 n 68,0,355,.LM11-.LFBB2
160 .LM11:
161 0028 C098 cbi 56-32,0
356:io/enc28j60.c **** while(enc28j60_read_address(ENC28J60_REG_MISTAT) & (1<<ENC28J60_BIT_MISTAT_BUSY)){}
357:io/enc28j60.c ****
358:io/enc28j60.c **** //abort read
162 tabn 68,0,358,.LM12-.LFBB2
163 .LM12:
164 002a 8AE7 ldi r24,lo8(122)
165 002c 8FB9 out 47-32,r24
166 .L11:
359:io/enc28j60.c **** /now read op is enabled, wait until PHY read finished:
167 bn 68,0,359,.LM13-.LFBB2
168 .LM13:
169 002e 779B sbis 46-32,7
170 0030 00C0 rjmp .L11
171 0032 00C0 rjmp .L18
172 .L14:
360:io/enc28j60.c **** ss);
361:io/enc28j60.c ****
362:io/enc28j60.c **** //set MICMD.MIIRD bit:
363:io/enc28j60.c **** enc28j60_write_address(ENC28J60_REG_MICMD, (1<<ENC28J60_BIT_MIIRD));
173 n 68,0,363,.LM14-.LFBB2
174 .LM14:
175 0034 8081 ld r24,Z
176 0036 8FB9 out 47-32,r24
177 .L13:
364:io/enc28j60.c **** REGADR:
178 bn 68,0,364,.LM15-.LFBB2
179 .LM15:
180 0038 779B sbis 46-32,7
181 003a 00C0 rjmp .L13
183 .LM16:
184 003c 3196 adiw r30,1
185 003e 6150 subi r22,lo8(-(-1))
186 0040 7040 sbci r23,hi8(-(-1))
187 .L18:
189 .LM17:
190 0042 6115 cp r22,__zero_reg__
191 0044 7105 cpc r23,__zero_reg__
192 0046 01F4 brne .L14
365:io/enc28j60.c **** n-4);
366:io/enc28j60.c **** }
367:io/enc28j60.c ****
368:io/enc28j60.c **** //read phy register
193 8,.LM18-.LFBB2
194 .LM18:
195 0048 C09A sbi 56-32,0
196 /* epilogue start */
369:io/enc28j60.c **** acket counter:
197 abn 68,0,369,.LM19-.LFBB2
198 .LM19:
199 004a 0895 ret
201 .Lscope2:
204 .global enc28j60_select_bank
206 enc28j60_select_bank:
370:io/enc28j60.c **** xt_packet_ptr- 1));
371:io/enc28j60.c **** #if ENC_DEBUG
372:io/enc28j60.c **** softuart_put_uint16(enc28j60_next_packet_ptr-1);
373:io/enc28j60.c **** #endif
374:io/enc28j60.c **** }
375:io/enc28j60.c **** #if ENC_DEBUG
376:io/enc28j60.c **** softuart_putnewline();
377:io/enc28j60.c **** #endif
378:io/enc28j60.c ****
379:io/enc28j60.c **** //decrement packet counter:
380:io/enc28j60.c **** enc28j60_spi_write_word(ENC28J60_OP_BFS|ENC28J60_REG_ECON2, (1<<ENC28J60_BIT_PKTDEC));
381:io/enc28j60.c ****
382:io/enc28j60.c **** //return length - <crc>
383:io/enc28j60.c **** return (len-4);
384:io/enc28j60.c **** }
385:io/enc28j60.c ****
386:io/enc28j60.c **** //read phy register
387:io/enc28j60.c **** unsigned int enc28j60_read_phy(unsigned char address){
388:io/enc28j60.c **** unsigned int res;
389:io/enc28j60.c ****
390:io/enc28j60.c **** //see microchip datasheet p.21
207 ,0,390,.LM20-.LFBB3
208 .LM20:
209 .LFBB3:
210 /* prologue: function */
211 /* frame size = 0 */
212 004c 482F mov r20,r24
391:io/enc28j60.c **** EGADR:
392:io/enc28j60.c **** enc28j60_write_address(ENC28J60_REG_MIREGADR, address);
213 n 68,0,392,.LM21-.LFBB3
214 .LM21:
215 004e 2091 0000 lds r18,enc28j60_current_bank
216 0052 90E0 ldi r25,lo8(0)
217 0054 8076 andi r24,lo8(96)
218 0056 9070 andi r25,hi8(96)
219 0058 30E0 ldi r19,lo8(0)
220 005a 8217 cp r24,r18
221 005c 9307 cpc r25,r19
222 005e 01F0 breq .L25
393:io/enc28j60.c **** y(unsigned char address){
394:io/enc28j60.c **** unsigned int res;
223 ,0,394,.LM22-.LFBB3
224 .LM22:
225 0060 4076 andi r20,lo8(96)
226 0062 4093 0000 sts enc28j60_current_bank,r20
227 .LBB69:
228 .LBB70:
395:io/enc28j60.c **** (1<<ENC28J60_BIT_PKTDEC));
396:io/enc28j60.c ****
397:io/enc28j60.c **** //return length - <crc>
398:io/enc28j60.c **** return (len-4);
399:io/enc28j60.c **** }
400:io/enc28j60.c ****
401:io/enc28j60.c **** //read phy register
402:io/enc28j60.c **** unsigned int enc28j60_read_phy(unsigned char address){
403:io/enc28j60.c **** unsigned int res;
404:io/enc28j60.c ****
405:io/enc28j60.c **** //see microchip datasheet p.21
406:io/enc28j60.c **** //set address to MIREGADR:
407:io/enc28j60.c **** enc28j60_write_address(ENC28J60_REG_MIREGADR, address);
408:io/enc28j60.c ****
409:io/enc28j60.c **** //set MICMD.MIIRD bit:
410:io/enc28j60.c **** enc28j60_write_address(ENC28J60_REG_MICMD, (1<<ENC28J60_BIT_MIIRD));
411:io/enc28j60.c ****
412:io/enc28j60.c **** //now read op is enabled, wait until PHY read finished:
413:io/enc28j60.c **** while(enc28j60_read_address(ENC28J60_REG_MISTAT) & (1<<ENC28J60_BIT_MISTAT_BUSY)){}
414:io/enc28j60.c ****
415:io/enc28j60.c **** //abort read
416:io/enc28j60.c **** enc28j60_write_address(ENC28J60_REG_MICMD, 0x00);
417:io/enc28j60.c ****
418:io/enc28j60.c **** //read result
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