sst89e516.h

美信6951的c语言51驱动程序

/*
 *	Copyright (C) 2007, The Electric & Electronic Innovation Center of Science & Technology, HUST, WuHan
 *	All Rights Reserved.
 *	
 *	filename:		sst89e516.h
 *	detail:	        1,Register and bit definitions for the sst89e516;
 * 					2,compatible with sst89e58 series;
 *			
 *	current edition:	1.0
 *	designer:		BillyEvans([e-mail])
 *	date:	Dec 30 2007
 *	
*/

#ifndef __sst89e516_h__
#define __sst89e516_h__

/*	CPU related SFRs   */
sfr ACC   = 0xE0;//Bit Addressable SFRs
sfr B     = 0xF0;//Bit Addressable SFRs
sfr PSW	  =	0xD0;//Bit Addressable SFRs


/*  PSW BIT Registers  */
sbit CY    = 0xD7;
sbit AC    = 0xD6;
sbit F0    = 0xD5;
sbit RS1   = 0xD4;
sbit RS0   = 0xD3;
sbit OV    = 0xD2;
sbit F1    = 0xD1;
sbit P     = 0xD0;

sfr SP	  = 0x81;
sfr DPL   = 0x82;
sfr DPH	  = 0x83;
sfr IE	  = 0xA8;//Bit Addressable SFRs	

/*  IE BIT Registers  */
sbit EA    = 0xAF;
sbit EC    = 0xAE;
sbit ET2   = 0xAD;
sbit ES    = 0xAC;
sbit ET1   = 0xAB;
sbit EX1   = 0xAA;
sbit ET0   = 0xA9;
sbit EX0   = 0xA8;

sfr IEA	  = 0xE8;//Bit Addressable SFRs

/*  IEA BIT Registers  */
sbit EBO  = 0xEB;

sfr IP    =	0xB8;//Bit Addressable SFRs

/*  IP BIT Registers  */
sbit PPC   = 0xBE;
sbit PT2   = 0xBD;
sbit PS    = 0xBC;
sbit PT1   = 0xBB;
sbit PX1   = 0xBA;
sbit PT0   = 0xB9;
sbit PX0   = 0xB8;

sfr IPH	  = 0xB7;
sfr IP1	  = 0xF8;//Bit Addressable SFRs

/*  IP1 BIT Registers  */
sbit PBO  = 0xFB;
sbit PX3  = 0xFA;	
sbit PX2  = 0xF9;

sfr IP1H  = 0xF7;
sfr PCON  = 0x87;
sfr AUXR  = 0x8E;
sfr AUXR1 = 0xA2;
sfr XICON = 0xAE;

/*	Flash Memory Programming SFRs	*/
sfr SFCF  = 0xB1;
sfr SFCM  = 0xB2;
sfr SFAL  = 0xB3;
sfr SFAH  = 0xB4;
sfr SFDT  = 0xB5;
sfr SFST  = 0xB6;

/*	Watchdog Timer SFRs	*/
sfr WDTC  = 0xC0;//Bit Addressable SFRs

/*  WDTC BIT Registers  */
sbit WDOUT= 0XC4;
sbit WDRE = 0XC3;
sbit WDTS = 0xC2;
sbit WDT  = 0xC1;
sbit SWDT = 0xC0;

sfr WDTD  = 0x85;

/*	Timer/Counters SFRs	*/
sfr TMOD  = 0x89;
sfr TCON  = 0x88;//Bit Addressable SFRs

/*  TCON BIT Registers  */
sbit TF1   = 0x8F;
sbit TR1   = 0x8E;
sbit TF0   = 0x8D;
sbit TR0   = 0x8C;
sbit IE1   = 0x8B;
sbit IT1   = 0x8A;
sbit IE0   = 0x89;
sbit IT0   = 0x88;

sfr TH0   = 0x8C;
sfr TL0   = 0x8A;
sfr TH1   = 0x8D;
sfr TL1   = 0x8B;
sfr T2CON = 0xC8;//Bit Addressable SFRs

/*  T2CON BIT Registers  */
sbit TF2  = 0xCF;
sbit EXF2 = 0xCE;
sbit RCLK = 0xCD;
sbit TCLK = 0xCC;
sbit EXEN2= 0xCB;
sbit TR2  = 0xCA;
sbit CT2  = 0xC9;
sbit CPRL2= 0xC8;

sfr T2MOD = 0xC9;
sfr TH2   = 0xCD;
sfr TL2   = 0xCC;
sfr RCAP2H= 0xCB;
sfr RCAP2L= 0xCA;

/*	Interface SFRs	*/
sfr SBUF  = 0x99;
sfr SCON  = 0x98;//Bit Addressable SFRs

/*  SCON BIT Registers  */
sbit SM0  = 0x9F;
sbit FE   = 0x9F;
sbit SM1  = 0x9E;
sbit SM2  = 0x9D;
sbit REN  = 0x9C;
sbit TB8  = 0x9B;
sbit RB8  = 0x9A;
sbit TI   = 0x99;
sbit RI   = 0x98;

sfr SADDR = 0xA9;
sfr SADEN = 0xB9;
sfr SPCR  = 0xD5;
sfr SPSR  = 0xAA;
sfr SPDR  = 0x86;
sfr P0	  = 0x80;//Bit Addressable SFRs
sfr P1	  = 0x90;//Bit Addressable SFRs

/*   P1  BIT Registers  */
sbit T2EX = 0x91;
sbit T2   = 0x90;

sfr P2	  = 0xA0;//Bit Addressable SFRs
sfr P3	  = 0xB0;//Bit Addressable SFRs

/*  P3  BIT Registers  */
sbit RD   = 0xB7;
sbit WR   = 0xB6;
sbit T1   = 0xB5;
sbit T0   = 0xB4;
sbit INT1 = 0xB3;
sbit INT0 = 0xB2;
sbit TXD  = 0xB1;
sbit RXD  = 0xB0;

sfr P4	  = 0xA5;

/*	PCA SFRs	*/
sfr CH	  = 0xF9;
sfr CL	  = 0xE9;
sfr CCON  = 0xD8;//Bit Addressable SFRs

/*  CCON BIT Registers   */
sbit CF    = 0xDF;
sbit CR    = 0xDE;
sbit CCF4  = 0xDC;
sbit CCF3  = 0xDB;
sbit CCF2  = 0xDA;
sbit CCF1  = 0xD9;
sbit CCF0  = 0xD8;

sfr CMOD  = 0xD9;
sfr CCAP0H= 0xFA;
sfr CCAP0L= 0xEA;
sfr CCAP1H= 0xFB;
sfr CCAP1L= 0xEB;
sfr CCAP2H= 0xFC;
sfr CCAP2L= 0xEC;
sfr CCAP3H= 0xFD;
sfr CCAP3L= 0xED;
sfr CCAP4H= 0xFE;
sfr CCAP4L= 0xEE;
sfr CCAPM0= 0xDA;
sfr CCAPM1= 0xDB;
sfr CCAPM2= 0xDC; 
sfr CCAPM3= 0xDD;
sfr CCAPM4= 0xDE;

/*   Universal I/O interface P0  */
sbit P00  = 0x80;
sbit P01  = 0x81;
sbit P02  = 0x82;
sbit P03  = 0x83;
sbit P04  = 0x84;
sbit P05  = 0x85;
sbit P06  = 0x86;
sbit P07  = 0x87;

/*   Universal I/O interface P1  */
sbit P10  = 0x90;
sbit P11  = 0x91;
sbit P12  = 0x92;
sbit P13  = 0x93;
sbit P14  = 0x94;
sbit P15  = 0x95;
sbit P16  = 0x96;
sbit P17  = 0x97;

/*   Universal I/O interface P2  */
sbit P20  = 0xA0;
sbit P21  = 0xA1;
sbit P22  = 0xA2;
sbit P23  = 0xA3;
sbit P24  = 0xA4;
sbit P25  = 0xA5;
sbit P26  = 0xA6;
sbit P27  = 0xA7;

/*   Universal I/O interface P3  */
sbit P30  = 0xB0;
sbit P31  = 0xB1;
sbit P32  = 0xB2;
sbit P33  = 0xB3;
sbit P34  = 0xB4;
sbit P35  = 0xB5;
sbit P36  = 0xB6;
sbit P37  = 0xB7;

/*   Universal I/O interface P0  */
sbit P0_0  = 0x80;
sbit P0_1  = 0x81;
sbit P0_2  = 0x82;
sbit P0_3  = 0x83;
sbit P0_4  = 0x84;
sbit P0_5  = 0x85;
sbit P0_6  = 0x86;
sbit P0_7  = 0x87;

/*   Universal I/O interface P1  */
sbit P1_0  = 0x90;
sbit P1_1  = 0x91;
sbit P1_2  = 0x92;
sbit P1_3  = 0x93;
sbit P1_4  = 0x94;
sbit P1_5  = 0x95;
sbit P1_6  = 0x96;
sbit P1_7  = 0x97;

/*   Universal I/O interface P2  */
sbit P2_0  = 0xA0;
sbit P2_1  = 0xA1;
sbit P2_2  = 0xA2;
sbit P2_3  = 0xA3;
sbit P2_4  = 0xA4;
sbit P2_5  = 0xA5;
sbit P2_6  = 0xA6;
sbit P2_7  = 0xA7;

/*   Universal I/O interface P3  */
sbit P3_0  = 0xB0;
sbit P3_1  = 0xB1;
sbit P3_2  = 0xB2;
sbit P3_3  = 0xB3;
sbit P3_4  = 0xB4;
sbit P3_5  = 0xB5;
sbit P3_6  = 0xB6;
sbit P3_7  = 0xB7;



/***********************************************************************************************************
* MCU特殊功能寄存器地址
**********************************************************************************************************
sfr SFCF = 0xB1; //FLASH配置位
sfr SFCM = 0xB2; /*FLASH命令位
sfr SFAL = 0xB3; //FLASH地址低位
sfr SFAH = 0xB4; //FLASH地址高位
sfr SFDT = 0xB5; //FLASH数据位
sfr SFST = 0xB6; //FLASH状态位
/***********************************************************************************************************
* MCU IAP命令
***********************************************************************************************************/
#define SFCM_SE 0x0B; //扇区擦除IAP指令
#define SFCM_VB 0x0C; //字节校读IAP指令
#define SFCM_PB 0x0E; //纸诒喑蘄AP指令
/***********************************************************************************************************/


#endif