📄 hcs635.asm
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;
; MICROCHIP HCS635 CODE HOPPING ENCODER
; Can be assembled for 12F635, 16F636, or 16F639
; with or without encryption
; with pull-ups of pull-downs on switch inputs
;
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;
; VERSION 1.2:
;
; Prepared by Chuck Simmers for standard PIC12F635, PIC16F636, or
; PIC16F639 (AFE A.1) on APR 29 2005
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;
; Eariler Versions:
;
; Prepared by Myron Loewen, based on an old HCS365 code revision
;
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;---------------------------------------------------------------------------
; Conditional assembly options
; Select Processor - Enable only one below
;#DEFINE P12F635 1 ; SET FOR CONDITIONAL COMPILE for desired processor
;#DEFINE P16F636 1 ; SET FOR CONDITIONAL COMPILE
#DEFINE P16F639 1 ; SET FOR CONDITIONAL COMPILE
; Select PORTA pushbuttons to be connected to ground with internal pull-ups
; OR, connected to VCC with internal pull-downs
#DEFINE pullup 1 ; Set to select pull-ups on PORT A. For pull-downs, comment out
; Since the In-Circuit-Emulator can not properly handle SLEEP
;#DEFINE ICEmul 1 ; Is set, device will not SLEEP, but will loop forever
; Select option not to Encrypt
#define NoEncryption 1
;---------------------------------------------------------------------------
page
LIST R=DEC
IFDEF P12F635
processor P12F635
#include P12F635.INC
#define ROMend 0x3FF
ENDIF
IFDEF P16F636
processor P16F636
#include P16F636.INC
#define ROMend 0x7FF
ENDIF
IFDEF P16F639
processor P16F639
#include P16F636.INC
#define ROMend 0x7FF
ENDIF
IFDEF P16F639
__CONFIG _MCLRE_OFF & _INTRC_OSC_NOCLKOUT & _WDT_OFF
ELSE
__CONFIG _MCLRE_OFF & _INTRC_OSC_NOCLKOUT & _WDT_OFF & _WUREN_ON
ENDIF
ERRORLEVEL 0, -205,-224,-302,-305,-306
; Message, Warning and Error Printed
; Ignore [224] => Use Of This Instruction is not recommended
; Ignore [302] => Register in operand not in bank 0.
; Ignore [306] => Crossing page boundary - ensure ...
ON EQU 1
OFF EQU 0
page
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; REGISTER Bank 0:
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; GENERAL PURPOSE REGISTERS
; GLOBAL WORK REGISTERS
IFDEF P16F639
cblock 0x20
AFEflags ; AFE system flags
INNER ; register used in DELAY routine
OUTER ; register used in DELAY routine
Delay_Delta ; register used in Delay routine
SPIBufL
SPIBufH
TEMP1
TEMP2
COUNTER
RXTX_REG
Count00
endc
#define AFEOK AFEflags,0 ; AFE is present and functional
#define ValidLFIFF AFEflags,1
ENDIF
cblock 0x58
FLAGS ; USER FLAG REGISTER
TX_CFG0 ; TRANSMITTER CONFIGURATION BYTE #0
BUTTON:2 ; CURRENT BUTTON VALUE, MSB SET ON REPEATED BUTTON PRESS
NSR8 ; EXTRA SPACE FOR SHIFT REGISTER
CNT0 ; LOOP COUNTER #0
CNT1 ; LOOP COUNTER #1
CNT2 ; LOOP COUNTER #2
TX_CFG1 ; TRANSMITTER CONFIGURATION BYTE #0
SYSCFG0 ; SYSTEM CONFIGURATION BYTE #0
SYSCFG1 ; SYSTEM CONFIGURATION BYTE #1
B_MASK ; BUTTON MASK REGISTER
TE_COMP ; TE DELAY OVERHEAD COMPENSATION REGISTER
CRC ; MSB AND LSB OF CRC REGISTER
QUEUE ; QUEUE BIT COUNTER
CLK_50 ; 50ms EVENT CLOCK COUNTER
CLK_HI ; OVERFLOW FOR CLK_50 COUNTER
CLK_LED ; LED TIMEOUT COUNTER
TEMP ; TEMPORARY STORAGE SPACE
CSR5 ; FALLING EDGE BUTTON DEBOUNCE REUSED FOR LFTE
CSR6 ; TRANSMISSION BITS REUSED TO MEASURE LF BIT WIDTHS
COMP ; TE COMPENSATION VALUE
CNT3 ; LOOP COUNTER #3
ButtonImage; Real button positions
endc
cblock 0x70 ;Shared Bank0-1-2-3 addresses
VLOWLEVEL ; TEMP LOCATION TO STORE EEPROM VLOW LATCH SETTING
UserDefined:2
endc
cblock 0x78
NSR0 ; KEELOQ ALGORTIHM CODE SHIFT REGISTERS
NSR1 ; KEELOQ ALGORTIHM CODE SHIFT REGISTERS
NSR2 ; KEELOQ ALGORTIHM CODE SHIFT REGISTERS
NSR3 ; KEELOQ ALGORTIHM CODE SHIFT REGISTERS
NSR4 ; KEELOQ ALGORTIHM KEY REGISTER
NSR5 ; TRANSMISSION SHIFT REGISTER
NSR6 ; TRANSMISSION SHIFT REGISTER
NSR7 ; TRANSMISSION SHIFT REGISTER
endc
#define COUNTA NSR5 ; COUNTER BITS 21-16 MSB
#define COUNTB NSR4 ; COUNTER BITS 15-8
#define COUNTC NSR3 ; COUNTER BITS 7-0 LSB
#define CHECKBC NSR2 ; B XOR C CHECKSUM
#define CHECKAB NSR1 ; A XOR B CHECKSUM
#define CHECKAC NSR0 ; A XOR C CHECKSUM
page
; ********* PORT BIT DEFINITIONS **************************
IFDEF P12F635
; _________
; Vdd | 1 8 | Vss
; S0 | 2 7 | LEDn 12F635
; S1 | 3 6 | DATA
; S2 | 4 5 | S3/SHIFT/RFEN
; ---------
#define LED PORTA,0 ; LED LINE
#define RFOUT PORTA,1 ; RF DATA OUTPUT
#define S0 PORTA,5 ; S0 BUTTON INPUT
#define S1 PORTA,4 ; S1 BUTTON INPUT
#define S2 PORTA,3 ; S2 BUTTON INPUT
#define S3 PORTA,2 ; S3 BUTTON INPUT
#DEFINE RFEN PORTA,2 ; RF ENABLE OUTPUT
#define RFENtris TRISA,2
#DEFINE SHIFT PORTA,2 ; SHIFT BUTTON INPUT
; ********* I/O PORT TRI-STATE VALUES **********************
RA_TRIS EQU B'00111100'
ENDIF
IFDEF P16F636
; _________
; Vdd | 1 14 | Vss
; S0 | 2 13 | S5
; S1 | 3 12 | S4 16F636
; S2 | 4 11 | S3/SHIFT/RFEN
; DATA | 5 10 | LED1n
; LED2n | 6 9 | RC1 (user)
; (user) RC3 | 7 8 | RC2 (user)
; ---------
#define S0 PORTA,5 ; S0 BUTTON INPUT
#define S1 PORTA,4 ; S1 BUTTON INPUT
#define S2 PORTA,3 ; S2 BUTTON INPUT
#define S3 PORTA,2 ; S3 BUTTON INPUT
#define S4 PORTA,1 ; S4 BUTTON INPUT
#define S5 PORTA,0 ; S5 BUTTON INPUT
#DEFINE RFEN PORTA,2 ; RF ENABLE OUTPUT
#define RFENtris TRISA,2
#DEFINE SHIFT PORTA,2 ; SHIFT BUTTON INPUT
#define LED PORTC,0 ; LED LINE
#define RFOUT PORTC,5 ; RF DATA OUTPUT
; ********* I/O PORT TRI-STATE VALUES **********************
RA_TRIS EQU B'00111111'
RC_TRIS EQU B'00001110'
ENDIF
IFDEF P16F639
; _________
; Vdd | 1 20 | Vss
; S0 | 2 19 | S5/SlowFall
; S1 | 3 18 | S4/LFDint
; S2 | 4 17 | S3/SHIFT/RFEN
; DATA | 5 16 | LED1n 16F639
; LED2n | 6 15 | RC1/CSn
; RC3/LFDATA/SDIO | 7 14 | RC2/SCLK/Alert
; Vddt | 8 13 | Vsst
; LCZ | 9 12 | LCCOM
; LCY | 10 11 | LCX
; ---------
#define S0 PORTA,5 ; S0 BUTTON INPUT
#define S1 PORTA,4 ; S1 BUTTON INPUT
#define S2 PORTA,3 ; S2 BUTTON INPUT
#define S3 PORTA,2 ; S3 BUTTON INPUT
#define S4 PORTA,1 ; S4 BUTTON INPUT
#define LFDint PORTA,1
#define S5 PORTA,0 ; S5 BUTTON INPUT
#DEFINE RFEN PORTA,2 ; RF ENABLE OUTPUT
#define RFENtris TRISA,2
#DEFINE SHIFT PORTA,2 ; SHIFT BUTTON INPUT
#define LED PORTC,0 ; LED output
#define AFECS PORTC,1 ; Chip select output
#define SCK PORTC,2 ; SPI Clock Output
#define SDIO PORTC,3 ; Serial Data Input/Output
#define LFDATA PORTC,3 ; Low Frequency Data IN
#define ValidLED PORTC,4 ; LED output
#define RFOUT PORTC,5 ; RF DATA OUTPUT
; ********* I/O PORT TRI-STATE VALUES **********************
RA_TRIS EQU B'00111111'
RC_TRIS EQU B'00001100'
ENDIF
page
#define VLOW PIR1,LVDIF ; LOW VOLTAGE INDICATION BIT
; ***** TRANSMITTER FLAGS BIT DEFINITIONS ***************
VLOWBAT EQU 0H ; INDICATE VOLTAGE LOW STATE
BUT_REL EQU 1H ; INDICATE BUTTON RELEASED
DO_GUARD EQU 2H ; INDICATE A GUARD TIME DELAY IS REQUIRED
TX_NUM EQU 3H ; INDICATE WHICH TRANSMITTER TO USE
FIRST EQU 4H ; INDICATE THAT THE FIRST EVENT COMPLETED
SEEDNOW EQU 5H ; INDICATE THAT WE SHOULD SEND THE SEED TX NOW
TEMPBIT EQU 6H ; TEMPORARY INDICATION BIT
BUT_DWN EQU 7H ; INDICATE THAT A NEW BUTTON WAS ADDED WHEN BIT = 0
; ****** TRANSMITTER CONFIGURATION BYTE #0 *****************
#DEFINE MSEL0 TX_CFG0,0H ; TRANSMISSION MODULATION SELECT BIT #0
#DEFINE MSEL1 TX_CFG0,1H ; TRANSMISSION MODULATION SELECT BIT #1
#DEFINE HSEL TX_CFG0,2H ; 4/10 Te HEADER SELECT BIT
#DEFINE XSER TX_CFG0,3H ; EXTENDED SERIAL NUMBER ENABLE
#DEFINE QUEN TX_CFG0,4H ; QUEUING BITS ENABLE OPTION
#DEFINE STRTSEL TX_CFG0,5H ; START/STOP BIT SELECT BIT
#DEFINE LEDL TX_CFG0,6H ; BATTERY LOW LED STATE SELECT BIT
#DEFINE LEDH TX_CFG0,7H ; LED BLINK RATE SELECT BIT
; ****** TRANSMITTER CONFIGURATION BYTE #1 *****************
#DEFINE SDLM TX_CFG1,0H ; LIMITED SEED TRANSMISSIONS (OFF/ON)
#DEFINE SDMD TX_CFG1,1H ; SEED MODE (USER/PRODUCTION)
#DEFINE SDTM0 TX_CFG1,2H ; TIME BEFORE SEED TRANSMISSION (LSB)
#DEFINE SDTM1 TX_CFG1,3H ; TIME BEFORE SEED TRANSMISSION (MSB)
#DEFINE BSL0 TX_CFG1,4H ; BAUD RATE SELECT BIT (LSB)
#DEFINE BSL1 TX_CFG1,5H ; BAUD RATE SELECT BIT (MSB)
#DEFINE GSEL0 TX_CFG1,6H ; GUARD TIME SELECT BIT #0
#DEFINE GSEL1 TX_CFG1,7H ; GUARD TIME SELECT BIT #1
; ****** SYSTEM CONFIGURATION BYTE #0 **********************
#DEFINE WSEL0 SYSCFG0,0H ; WAKEUP SELECT BIT #0
#DEFINE WSEL1 SYSCFG0,1H ; WAKEUP SELECT BIT #1
;#DEFINE CNTSEL SYSCFG0,2H ; 16/20 BIT COUNTER SELECT BIT
#DEFINE CNTSEL 2H ; 16/20 BIT COUNTER SELECT BIT
#DEFINE VLOWL SYSCFG0,3H ; VLOW LATCHED SELECT BIT
#DEFINE VTRIP SYSCFG0,4H ; VLOW TRIP POINT SELECT BIT
#DEFINE PLLSEL SYSCFG0,5H ; ASK/FSK PLL SELECTION BIT
; ****** SYSTEM CONFIGURATION BYTE #1 **********************
#DEFINE MTX0 SYSCFG1,0H ; MINIMUM NUMBER OF CODE WORD (LSB)
#DEFINE MTX1 SYSCFG1,1H ; MINIMUM NUMBER OF CODE WORD (MSB)
#DEFINE INDSEL SYSCFG1,2H ; INDEPENDED MODE SELECT BIT ON HCS365
#DEFINE RFENSEL SYSCFG1,3H ; RF ENABLE MODE SELECT BIT ON HCS365
#DEFINE TSEL0 SYSCFG1,4H ; TIMEOUT SELECT BIT #0
#DEFINE TSEL1 SYSCFG1,5H ; TIMEOUT SELECT BIT #1
; ***** TIME MEASUREMENT CONSTANT DEFINITIONS **************
T_50 EQU D'1' ; TIME COUNTER VALUE FOR 50 ms
T_100 EQU D'2' ; TIME COUNTER VALUE FOR 100 ms
T_200 EQU D'4' ; TIME COUNTER VALUE FOR 200 ms
T_500 EQU D'10' ; TIME COUNTER VALUE FOR 500 ms
T_800 EQU D'16' ; TIME COUNTER VALUE FOR 800 ms
T_1000 EQU D'20' ; TIME COUNTER VALUE FOR 1000 ms
T_1600 EQU D'32' ; TIME COUNTER VALUE FOR 1.6 SECONDS
T_2400 EQU D'48' ; TIME COUNTER VALUE FOR 2.4 SECONDS
T_3200 EQU D'64' ; TIME COUNTER VALUE FOR 3.2 SECONDS
T_25600 EQU D'4' ; TIME COUNTER VALUE FOR 25.6 SECONDS
; ***** EEPROM MEMORY MAP DEFINITIONS **********************
EE_CNT0 EQU 00H ; OFFSET FOR TX0'S EEPROM SYNC COUNTER
EE_CNT1 EQU 08H ; OFFSET FOR TX1'S EEPROM SYNC COUNTER
EE_VLOWL EQU 07H ; OFFSET FOR VLOW LATCH BYTE
EE_SER EQU 10H ; OFFSET OF TX'S 64 BIT SEED VALUE
EE_SEED EQU 14H ; OFFSET OF TX'S 64 BIT SEED VALUE
EE_DISC EQU 1CH ; OFFSET OF TX'S 16 BIT DISCRIMINATION VALUE
EE_KEY EQU 1EH ; OFFSET OF TX'S 64 BIT ENCRYPTION KEY
;B_EE_SER EQU 26H ; OFFSET OF TX'S 64 BIT SEED VALUE
;B_EE_SEED EQU 2AH ; OFFSET OF TX'S 64 BIT SEED VALUE
;B_EE_DISC EQU 32H ; OFFSET OF TX'S 16 BIT DISCRIMINATION VALUE
;B_EE_KEY EQU 34H ; OFFSET OF TX'S 64 BIT ENCRYPTION KEY
EE_CFG3 EQU 3CH ; OFFSER OF 16 BIT TRANSMITTER CONFIGURATION WORD
EE_CFG2 EQU 3DH ; OFFSER OF 16 BIT TRANSMITTER CONFIGURATION WORD
EE_CFG1 EQU 3EH ; OFFSER OF 16 BIT TRANSMITTER CONFIGURATION WORD
EE_CFG0 EQU 3FH
;The following function codes are stored as:
; 7 6 5 4 3 2 1 0
; 0 0 F F F F 0 0
S4_Button_Code equ 40H
S5_Button_Code equ 41H
PKE_Code equ 42H ; Offset for Function Code to transmit after LF Wake-up
page
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; RESET Vector address 000H
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ORG 000H
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;
; FUNCTION : RESET ()
;
; DESCRIPTION : PROGRAM RESET ROUTINE
;
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RESET
MOVLW b'00000111' ; disable analog sections-->move to all digitial
movwf CMCON0
clrf PORTA
bsf LED ; turn off LED
clrf TMR1L
clrf TMR1H
movlw b'00110001'
movwf T1CON
bsf STATUS,RP0 ; bank0--> RP0 = RP1 = 0
movlw RA_TRIS ; Setup port A
movwf TRISA ;
IFNDEF P12F635
movlw RC_TRIS ; Setup port C
movwf TRISC ;
ENDIF
movlw b'01100001' ; internal 4 MHz
movwf OSCCON
; movlw b'00000000'
; movwf OSCTUNE
MOVLW b'01000110' ; SET UP FOR TMR0'S PRESCALER VALUE TO 128
; (RAPU, bit7) = 0 to enable weak pull-up for 3 also
MOVWF OPTION_REG ; this is used for Delay loop only
movlw b'00111111' ;
movwf WDA ; pull-up selection register
IFDEF pullup
movlw b'00111111' ;
ELSE
movlw b'00000000'
ENDIF
movwf WPUDA ; pull-up direction register
movlw b'11111111' ;
movwf IOCA ; enable all RA port individual pin interupt
bcf STATUS,RP0
movlw 0xAB ; initialse user variables
movwf UserDefined
movlw 0xCD
movwf UserDefined+1
IFDEF P16F639
Init_AFE
clrf AFEflags
bsf AFECS ; CS pin high
bcf AFEOK ; assume AFE will not initialise
call Set_up_AFE_Registers
iorlw 0x00
btfsc STATUS,Z ; any registers fail to initialse
bsf AFEOK ; AFE initialised OK
; call Dump_AFE_Registers
; iorlw 0x00
; btfsc STATUS,Z ; any registers fail to initialse
; bsf AFEOK ; AFE initialised OK
bsf STATUS,RP0
movfw TRISC
iorlw b'00001100' ; Reset LFDATA,ALERT as input. CS as output
movwf TRISC ;
bcf STATUS,RP0
bsf AFECS
bcf SCK
bsf AFECS ; make sure cs pin high
ENDIF
NEWBUTTON:
; ****** LOAD SYSTEM CONIGURATION FROM EEPROM *********************************
GOTO DEBOUNCER ; DEBOUNCE BUTTONS AND READ EEPROM OPTIONS
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;
; FUNCTION : RFOUT_OFF()
;
; DESCRIPTION : SWITCH RF OUT OFF AND CONTINUE TO WAIT FOR ONE RF Te
;
; PAGE : 0
;
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RFOUT_OFF
INCF COMP,F ; SHORTEN PULSE WIDTH
RFOUT_OFF3
BCF RFOUT ; SET RF OUTPUT LOW
GOTO TE_DELAY ; DO TE DELAY TIME
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;
; FUNCTION : RFOUT_ON()
;
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