📄 count10.v
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module count10(out,cout,en,clr,clk);
output[31:0] out;
output cout;
input en,clk,clr;
reg[31:0] out;
reg[3:0] out1,out2,out3,out4,out5,out6,out7,out8;
reg cout1,cout2,cout3,cout4,cout5,cout6,cout7;
reg cout;
always @(posedge clk)
begin
if(clr) out1=0;
else if(en)
begin
if(out1==9) begin out1=0;cout1=1; end
else begin out1=out1+1;cout1=0; end
end
end
always @(posedge cout1)
begin
if(clr) out2=0;
else if(en)
begin
if(out2==9) begin out2=0;cout2=1; end
else begin out2=out2+1;cout2=0; end
end
end
always @(posedge cout2)
begin
if(clr) out3=0;
else if(en)
begin
if(out3==9) begin out3=0;cout3=1; end
else begin out3=out3+1;cout3=0; end
end
end
always @(posedge cout3)
begin
if(clr) out4=0;
else if(en)
begin
if(out4==9) begin out4=0;cout4=1; end
else begin out4=out4+1;cout4=0; end
end
end
always @(posedge cout4)
begin
if(clr) out5=0;
else if(en)
begin
if(out5==9) begin out5=0;cout5=1; end
else begin out5=out5+1;cout5=0; end
end
end
always @(posedge cout5)
begin
if(clr) out6=0;
else if(en)
begin
if(out6==9) begin out6=0;cout6=1; end
else begin out6=out6+1;cout6=0; end
end
end
always @(posedge cout6)
begin
if(clr) out7=0;
else if(en)
begin
if(out7==9) begin out7=0;cout7=1; end
else begin out7=out7+1;cout7=0; end
end
end
always @(posedge cout7)
begin
if(clr) out8=0;
else if(en)
begin
if(out8==9) begin out8=0;cout=1; end
else begin out8=out8+1;cout=0; end
end
end
always @(posedge clk)
begin
out={out8,out7,out6,out5,out4,out3,out2,out1};//assign
end
endmodule
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