📄 halstack.s51
字号:
MOV DPL,?XSP + 0
MOV DPH,?XSP + 1
MOV R0,#?V0 + 0
LCALL ?L_MOV_X
MOV R2,?V0 + 0
MOV R3,?V0 + 1
MOV R4,?V0 + 2
MOV R5,?V0 + 3
MOV A,#0x4
LCALL ?DEALLOC_XSTACK8
CFI CFA_XSP16 add(XSP16, 11)
MOV R7,#0x4
LJMP ?FUNC_LEAVE_XDATA
CFI EndBlock cfiBlock5
// 106 }
// 107
// 108
// 109
// 110 //only works as long as SYMBOLS_PER_MAC_TICK is not less than 1
RSEG NEAR_CODE:CODE:NOROOT(0)
// 111 UINT32 halMacTicksToUs(UINT32 ticks){
halMacTicksToUs:
CFI Block cfiBlock6 Using cfiCommon0
CFI Function halMacTicksToUs
MOV A,#-0xf
LCALL ?FUNC_ENTER_XDATA
CFI DPH0 load(1, XDATA, add(CFA_XSP16, literal(-1)))
CFI DPL0 load(1, XDATA, add(CFA_XSP16, literal(-2)))
CFI ?RET_HIGH load(1, XDATA, add(CFA_XSP16, literal(-3)))
CFI ?RET_LOW load(1, XDATA, add(CFA_XSP16, literal(-4)))
CFI R7 load(1, XDATA, add(CFA_XSP16, literal(-5)))
CFI V7 load(1, XDATA, add(CFA_XSP16, literal(-6)))
CFI V6 load(1, XDATA, add(CFA_XSP16, literal(-7)))
CFI V5 load(1, XDATA, add(CFA_XSP16, literal(-8)))
CFI V4 load(1, XDATA, add(CFA_XSP16, literal(-9)))
CFI V3 load(1, XDATA, add(CFA_XSP16, literal(-10)))
CFI V2 load(1, XDATA, add(CFA_XSP16, literal(-11)))
CFI V1 load(1, XDATA, add(CFA_XSP16, literal(-12)))
CFI V0 load(1, XDATA, add(CFA_XSP16, literal(-13)))
CFI VB load(1, XDATA, add(CFA_XSP16, literal(-14)))
CFI R6 load(1, XDATA, add(CFA_XSP16, literal(-15)))
CFI CFA_SP SP+0
CFI CFA_XSP16 add(XSP16, 15)
; Saved register size: 15
; Auto size: 8
MOV A,#-0x8
LCALL ?ALLOC_XSTACK8
CFI CFA_XSP16 add(XSP16, 23)
MOV A,#0x4
LCALL ?XSTACK_DISP0_8
MOV A,R2
MOVX @DPTR,A
INC DPTR
MOV A,R3
MOVX @DPTR,A
INC DPTR
MOV A,R4
MOVX @DPTR,A
INC DPTR
MOV A,R5
MOVX @DPTR,A
// 112
// 113 UINT32 rval;
// 114
// 115 rval = (ticks/SYMBOLS_PER_MAC_TICK())* (1000000/LRWPAN_SYMBOLS_PER_SECOND);
MOV A,#0x4
LCALL ?XSTACK_DISP0_8
MOV R0,#?V0 + 0
LCALL ?L_MOV_X
MOV DPTR,#__Constant_1
MOV R0,#?V0 + 4
LCALL ?L_MOV_X
MOV R0,#?V0 + 0
MOV R1,#?V0 + 4
LCALL ?UL_DIV_MOD
MOV DPTR,#__Constant_10
MOV R0,#?V0 + 4
LCALL ?L_MOV_X
MOV R0,#?V0 + 0
MOV R1,#?V0 + 4
LCALL ?L_MUL
MOV DPL,?XSP + 0
MOV DPH,?XSP + 1
MOV R0,#?V0 + 0
LCALL ?L_MOV_TO_X
// 116 return(rval);
MOV DPL,?XSP + 0
MOV DPH,?XSP + 1
MOV R0,#?V0 + 0
LCALL ?L_MOV_X
MOV R2,?V0 + 0
MOV R3,?V0 + 1
MOV R4,?V0 + 2
MOV R5,?V0 + 3
MOV A,#0x8
LCALL ?DEALLOC_XSTACK8
CFI CFA_XSP16 add(XSP16, 15)
MOV R7,#0x8
LJMP ?FUNC_LEAVE_XDATA
CFI EndBlock cfiBlock6
// 117 }
// 118
// 119 //assumes that Timer2 has been initialized and is running
RSEG NEAR_CODE:CODE:NOROOT(0)
// 120 UINT8 halGetRandomByte(void) {
halGetRandomByte:
CFI Block cfiBlock7 Using cfiCommon0
CFI Function halGetRandomByte
; Saved register size: 0
; Auto size: 0
// 121 return(T2OF0);
MOV R1,0xa1
RET
CFI EndBlock cfiBlock7
// 122 }
// 123
// 124 //write a character to serial port
// 125 // Uses UART initialized by halInitUart
// 126
RSEG NEAR_CODE:CODE:NOROOT(0)
// 127 void halPutch(char c){
halPutch:
CFI Block cfiBlock8 Using cfiCommon0
CFI Function halPutch
; Saved register size: 0
; Auto size: 0
// 128 while (!UTX0IF);
??halPutch_0:
MOV C,0xe8.1
JNC ??halPutch_0
// 129 UTX0IF = 0;
CLR 0xe8.1
// 130 U0DBUF = c;
MOV 0xc1,R1
// 131 }
RET
CFI EndBlock cfiBlock8
// 132
// 133
// 134 //set the radio frequency
RSEG NEAR_CODE:CODE:NOROOT(0)
// 135 LRWPAN_STATUS_ENUM halSetRadioIEEEFrequency(PHY_FREQ_ENUM frequency, BYTE channel)
halSetRadioIEEEFrequency:
CFI Block cfiBlock9 Using cfiCommon0
CFI Function halSetRadioIEEEFrequency
// 136 {
MOV A,#-0x8
LCALL ?FUNC_ENTER_XDATA
CFI DPH0 load(1, XDATA, add(CFA_XSP16, literal(-1)))
CFI DPL0 load(1, XDATA, add(CFA_XSP16, literal(-2)))
CFI ?RET_HIGH load(1, XDATA, add(CFA_XSP16, literal(-3)))
CFI ?RET_LOW load(1, XDATA, add(CFA_XSP16, literal(-4)))
CFI R7 load(1, XDATA, add(CFA_XSP16, literal(-5)))
CFI V0 load(1, XDATA, add(CFA_XSP16, literal(-6)))
CFI VB load(1, XDATA, add(CFA_XSP16, literal(-7)))
CFI R6 load(1, XDATA, add(CFA_XSP16, literal(-8)))
CFI CFA_SP SP+0
CFI CFA_XSP16 add(XSP16, 8)
; Saved register size: 8
; Auto size: 0
MOV A,R1
MOV R6,A
MOV A,R2
MOV R4,A
// 137 UINT16 afreq;
// 138
// 139 //DEBUG_STRING(DBG_TX,"halSetRadioIEEEFrequency() -set channel:");
// 140 //DEBUG_UINT8(DBG_TX,channel); DEBUG_STRING(DBG_TX,"\n");
// 141
// 142 if (frequency != PHY_FREQ_2405M) return(LRWPAN_STATUS_PHY_FAILED);
MOV A,R6
JZ ??halSetRadioIEEEFrequency_0
MOV R1,#0x1
SJMP ??halSetRadioIEEEFrequency_1
// 143 if ((channel < 11) || (channel > 26)) return(LRWPAN_STATUS_PHY_FAILED);
??halSetRadioIEEEFrequency_0:
MOV A,R4
CLR C
SUBB A,#0xb
JC ??halSetRadioIEEEFrequency_2
MOV A,R4
CLR C
SUBB A,#0x1b
JC ??halSetRadioIEEEFrequency_3
??halSetRadioIEEEFrequency_2:
MOV R1,#0x1
SJMP ??halSetRadioIEEEFrequency_1
// 144 afreq = 357 + 5*(channel - 11) ;
??halSetRadioIEEEFrequency_3:
MOV A,R4
MOV R0,A
MOV R1,#0x0
MOV A,R0
MOV B,#0x5
MUL AB
XCH A,R0
MOV R5,B
MOV B,#0x0
MUL AB
ADD A,R5
MOV R5,A
MOV B,#0x5
MOV A,R1
MUL AB
ADD A,R5
MOV R1,A
MOV A,#0x2e
ADD A,R0
MOV R0,A
MOV A,#0x1
ADDC A,R1
MOV R1,A
MOV A,R0
MOV R2,A
MOV A,R1
MOV R3,A
// 145 FSCTRLL = (BYTE) afreq;
MOV A,R2
MOV DPTR,#-0x20ef
MOVX @DPTR,A
// 146 FSCTRLH = ((FSCTRLH & ~0x03) | (BYTE)((afreq >> 8) & 0x03));
MOV A,R3
MOV R1,A
MOV A,R1
MOV R0,A
ANL A,#0x3
PUSH A
CFI CFA_SP SP+-1
MOV DPTR,#-0x20f0
MOVX A,@DPTR
ANL A,#0xfc
MOV R5,A
POP A
CFI CFA_SP SP+0
ORL A,R5
MOV DPTR,#-0x20f0
MOVX @DPTR,A
// 147 return(LRWPAN_STATUS_SUCCESS);
MOV R1,#0x0
??halSetRadioIEEEFrequency_1:
MOV R7,#0x1
LJMP ?FUNC_LEAVE_XDATA
CFI EndBlock cfiBlock9
// 148 }
// 149
// 150 //this assumes 2.4GHz frequency
RSEG NEAR_CODE:CODE:NOROOT(0)
// 151 LRWPAN_STATUS_ENUM halSetChannel(BYTE channel){
halSetChannel:
CFI Block cfiBlock10 Using cfiCommon0
CFI Function halSetChannel
FUNCALL halSetChannel, halSetRadioIEEEFrequency
LOCFRAME ISTACK, 1, STACK
ARGFRAME ISTACK, 1, STACK
MOV A,R6
CFI R6 A
PUSH A
CFI R6 Frame(CFA_SP, 3)
CFI CFA_SP SP+-3
; Saved register size: 1
; Auto size: 0
MOV A,R1
// 152 return(halSetRadioIEEEFrequency(PHY_FREQ_2405M, channel));
; Setup parameters for call to function halSetRadioIEEEFrequency
MOV R2,A
MOV R1,#0x0
LCALL halSetRadioIEEEFrequency
POP A
CFI R6 A
CFI CFA_SP SP+-2
MOV R6,A
CFI R6 SameValue
RET
CFI EndBlock cfiBlock10
// 153 }
// 154
// 155
RSEG NEAR_CODE:CODE:NOROOT(0)
// 156 void halGetProcessorIEEEAddress(BYTE *buf) {
halGetProcessorIEEEAddress:
CFI Block cfiBlock11 Using cfiCommon0
CFI Function halGetProcessorIEEEAddress
PUSH DPL
CFI DPL0 Frame(CFA_SP, 3)
CFI CFA_SP SP+-3
PUSH DPH
CFI DPH0 Frame(CFA_SP, 4)
CFI CFA_SP SP+-4
; Saved register size: 2
; Auto size: 0
// 157 #if (CC2430_FLASH_SIZE == 128)
// 158 unsigned char bank;
// 159 bank = MEMCTR;
MOV A,0xc7
MOV R4,A
// 160 //switch to bank 3
// 161 MEMCTR |= 0x30;
ORL 0xc7,#0x30
MOV A,0xc7
// 162 #endif
// 163 //note that the flash programmer stores these in BIG ENDIAN order for some reason!!!
// 164 buf[7] = *(unsigned char __code *)(IEEE_ADDRESS_ARRAY+0);
MOV DPTR,#-0x8
CLR A
MOVC A,@A+DPTR
MOV DPL,R2
MOV DPH,R3
INC DPTR
INC DPTR
INC DPTR
INC DPTR
INC DPTR
INC DPTR
INC DPTR
MOVX @DPTR,A
// 165 buf[6] = *(unsigned char __code *)(IEEE_ADDRESS_ARRAY+1);
MOV DPTR,#-0x7
CLR A
MOVC A,@A+DPTR
MOV DPL,R2
MOV DPH,R3
INC DPTR
INC DPTR
INC DPTR
INC DPTR
INC DPTR
INC DPTR
MOVX @DPTR,A
// 166 buf[5] = *(unsigned char __code *)(IEEE_ADDRESS_ARRAY+2);
MOV DPTR,#-0x6
CLR A
MOVC A,@A+DPTR
MOV DPL,R2
MOV DPH,R3
INC DPTR
INC DPTR
INC DPTR
INC DPTR
INC DPTR
MOVX @DPTR,A
// 167 buf[4] = *(unsigned char __code *)(IEEE_ADDRESS_ARRAY+3);
MOV DPTR,#-0x5
CLR A
MOVC A,@A+DPTR
MOV DPL,R2
MOV DPH,R3
INC DPTR
INC DPTR
INC DPTR
INC DPTR
MOVX @DPTR,A
// 168 buf[3] = *(unsigned char __code *)(IEEE_ADDRESS_ARRAY+4);
MOV DPTR,#-0x4
CLR A
MOVC A,@A+DPTR
MOV DPL,R2
MOV DPH,R3
INC DPTR
INC DPTR
INC DPTR
MOVX @DPTR,A
// 169 buf[2] = *(unsigned char __code *)(IEEE_ADDRESS_ARRAY+5);
MOV DPTR,#-0x3
CLR A
MOVC A,@A+DPTR
MOV DPL,R2
MOV DPH,R3
INC DPTR
INC DPTR
MOVX @DPTR,A
// 170 buf[1] = *(unsigned char __code *)(IEEE_ADDRESS_ARRAY+6);
MOV DPTR,#-0x2
CLR A
MOVC A,@A+DPTR
MOV DPL,R2
MOV DPH,R3
INC DPTR
MOVX @DPTR,A
// 171 buf[0] = *(unsigned char __code *)(IEEE_ADDRESS_ARRAY+7);
MOV DPTR,#-0x1
CLR A
MOVC A,@A+DPTR
MOV DPL,R2
MOV DPH,R3
MOVX @DPTR,A
// 172 #if (CC2430_FLASH_SIZE == 128)
// 173 //resore old bank settings
// 174 MEMCTR = bank;
MOV 0xc7,R4
// 175 #endif
// 176 }
POP DPH
CFI DPH0 SameValue
CFI CFA_SP SP+-3
POP DPL
CFI DPL0 SameValue
CFI CFA_SP SP+-2
RET
CFI EndBlock cfiBlock11
// 177
// 178
RSEG NEAR_CODE:CODE:NOROOT(0)
// 179 void halGetProcessorIEEEAddress_ASC(BYTE *buf) {
halGetProcessorIEEEAddress_ASC:
CFI Block cfiBlock12 Using cfiCommon0
CFI Function halGetProcessorIEEEAddress_ASC
PUSH DPL
CFI DPL0 Frame(CFA_SP, 3)
CFI CFA_SP SP+-3
PUSH DPH
CFI DPH0 Frame(CFA_SP, 4)
CFI CFA_SP SP+-4
; Saved register size: 2
; Auto size: 0
// 180 #if (CC2430_FLASH_SIZE == 128)
// 181 unsigned char bank;
// 182 bank = MEMCTR;
MOV A,0xc7
MOV R4,A
// 183 //switch to bank 3
// 184 MEMCTR |= 0x30;
ORL 0xc7,#0x30
MOV A,0xc7
// 185 #endif
// 186 //note that the flash programmer stores these in BIG ENDIAN order for some reason!!!
// 187 buf[0] = *(unsigned char __code *)(IEEE_ADDRESS_ARRAY+0);
MOV DPTR,#-0x8
CLR A
MOVC A,@A+DPTR
MOV DPL,R2
MOV DPH,R3
MOVX @DPTR,A
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -