halstack.s51

无线单片机cc2430简化协议的无线收发程序

IEN2:
        DS 1

        ASEGN SFR_AN:DATA:NOROOT,09bH
// unsigned char volatile __sfr S1CON
S1CON:
        DS 1

        ASEGN SFR_AN:DATA:NOROOT,0a1H
// unsigned char volatile __sfr T2OF0
T2OF0:
        DS 1

        ASEGN SFR_AN:DATA:NOROOT,0a2H
// unsigned char volatile __sfr T2OF1
T2OF1:
        DS 1

        ASEGN SFR_AN:DATA:NOROOT,0a3H
// unsigned char volatile __sfr T2OF2
T2OF2:
        DS 1

        ASEGN SFR_AN:DATA:NOROOT,0a4H
// unsigned char volatile __sfr T2CAPLPL
T2CAPLPL:
        DS 1

        ASEGN SFR_AN:DATA:NOROOT,0a5H
// unsigned char volatile __sfr T2CAPHPH
T2CAPHPH:
        DS 1

        ASEGN SFR_AN:DATA:NOROOT,0b4H
// unsigned char volatile __sfr ADCCON1
ADCCON1:
        DS 1

        ASEGN SFR_AN:DATA:NOROOT,0b6H
// unsigned char volatile __sfr ADCCON3
ADCCON3:
        DS 1

        ASEGN SFR_AN:DATA:NOROOT,0baH
// unsigned char volatile __sfr ADCL
ADCL:
        DS 1

        ASEGN SFR_AN:DATA:NOROOT,0bbH
// unsigned char volatile __sfr ADCH
ADCH:
        DS 1

        ASEGN SFR_AN:DATA:NOROOT,0beH
// unsigned char volatile __sfr SLEEP
SLEEP:
        DS 1

        ASEGN SFR_AN:DATA:NOROOT,0c1H
// unsigned char volatile __sfr U0DBUF
U0DBUF:
        DS 1

        ASEGN SFR_AN:DATA:NOROOT,0c2H
// unsigned char volatile __sfr U0BAUD
U0BAUD:
        DS 1

        ASEGN SFR_AN:DATA:NOROOT,0c3H
// unsigned char volatile __sfr T2CNF
T2CNF:
        DS 1

        ASEGN SFR_AN:DATA:NOROOT,0c4H
// unsigned char volatile __sfr U0UCR
U0UCR:
        DS 1

        ASEGN SFR_AN:DATA:NOROOT,0c5H
// unsigned char volatile __sfr U0GCR
U0GCR:
        DS 1

        ASEGN SFR_AN:DATA:NOROOT,0c6H
// unsigned char volatile __sfr CLKCON
CLKCON:
        DS 1

        ASEGN SFR_AN:DATA:NOROOT,0c7H
// unsigned char volatile __sfr MEMCTR
MEMCTR:
        DS 1

        ASEGN SFR_AN:DATA:NOROOT,0d9H
// unsigned char volatile __sfr RFD
RFD:
        DS 1

        ASEGN SFR_AN:DATA:NOROOT,0e1H
// unsigned char volatile __sfr RFST
RFST:
        DS 1

        ASEGN SFR_AN:DATA:NOROOT,0e9H
// unsigned char volatile __sfr RFIF
RFIF:
        DS 1

        ASEGN SFR_AN:DATA:NOROOT,0f1H
// unsigned char volatile __sfr PERCFG
PERCFG:
        DS 1

        ASEGN SFR_AN:DATA:NOROOT,0f2H
// unsigned char volatile __sfr ADCCFG
ADCCFG:
        DS 1

        ASEGN SFR_AN:DATA:NOROOT,0f3H
// unsigned char volatile __sfr P0SEL
P0SEL:
        DS 1

        ASEGN SFR_AN:DATA:NOROOT,0f4H
// unsigned char volatile __sfr P1SEL
P1SEL:
        DS 1
//    7 #include "halstack.h"
//    8 #include "console.h"
//    9 #include "ieee_lrwpan_defs.h"
//   10 #include "phy.h"
//   11 #include "mac.h"
//   12 
//   13 
//   14 

        RSEG XDATA_Z:XDATA:NOROOT(0)
        REQUIRE __INIT_XDATA_Z
//   15 RADIO_FLAGS local_radio_flags;
local_radio_flags:
        DS 2
//   16 
//   17 
//   18 
//   19 
//   20 
//   21 //halInit contains both processor specific initialization

        RSEG NEAR_CODE:CODE:NOROOT(0)
//   22 void halInit(void)
halInit:
        CFI Block cfiBlock0 Using cfiCommon0
        CFI Function halInit
//   23 {
        FUNCALL halInit, halInitUart
        LOCFRAME ISTACK, 2, STACK
        ARGFRAME ISTACK, 2, STACK
        FUNCALL halInit, halInitMACTimer
        LOCFRAME ISTACK, 2, STACK
        ARGFRAME ISTACK, 2, STACK
        PUSH	DPL
        CFI DPL0 Frame(CFA_SP, 3)
        CFI CFA_SP SP+-3
        PUSH	DPH
        CFI DPH0 Frame(CFA_SP, 4)
        CFI CFA_SP SP+-4
        ; Saved register size: 2
        ; Auto size: 0
//   24   //Set clock source
//   25   local_radio_flags.val = 0;
        MOV	A,#0x0
        MOV	DPTR,#local_radio_flags
        MOVX	@DPTR,A
//   26   SET_MAIN_CLOCK_SOURCE(CRYSTAL);
        ANL	0xbe,#0xfb
??halInit_0:
        MOV	A,0xbe
        MOV	C,0xE0 /* A   */.6
        JNC	??halInit_0
        NOP
        ANL	0xc6,#0xb8
        MOV	A,0xc6
        ORL	0xbe,#0x4
//   27   halInitUart();
        ; Setup parameters for call to function halInitUart
        LCALL	halInitUart
//   28   halSetBaud(LRWPAN_DEFAULT_BAUDRATE);
        MOV	A,0xf1
        MOV	C,0xE0 /* A   */.0
        JNC	??halInit_1
        ORL	0xf4,#0x30
        MOV	A,0xf4
        SJMP	??halInit_2
??halInit_1:
        ORL	0xf3,#0xc
        MOV	A,0xf3
??halInit_2:
        MOV	A,#0x7
        ANL	A,0xc6
        ADD	A,#0xa
        MOV	0xc5,A
        MOV	0xc2,#-0x28
        ORL	0x86,#0x80
        ORL	0xc4,#0x82
        MOV	A,0xc4
//   29   halInitMACTimer();
        ; Setup parameters for call to function halInitMACTimer
        LCALL	halInitMACTimer
//   30 }
        POP	DPH
        CFI DPH0 SameValue
        CFI CFA_SP SP+-3
        POP	DPL
        CFI DPL0 SameValue
        CFI CFA_SP SP+-2
        RET
        CFI EndBlock cfiBlock0
//   31 
//   32 
//   33 //initialize UART to be used by

        RSEG NEAR_CODE:CODE:NOROOT(0)
//   34 void halInitUart(void) {
halInitUart:
        CFI Block cfiBlock1 Using cfiCommon0
        CFI Function halInitUart
        ; Saved register size: 0
        ; Auto size: 0
//   35   // Setup for UART0
//   36    IO_PER_LOC_UART0_AT_PORT0_PIN2345();
        ANL	0xf1,#0xfe
//   37    UTX0IF = 1;
        SETB	0xe8.1
//   38 }
        RET
        CFI EndBlock cfiBlock1
//   39 
//   40 //get a character from serial port

        RSEG NEAR_CODE:CODE:NOROOT(0)
//   41 char halGetch(void){
halGetch:
        CFI Block cfiBlock2 Using cfiCommon0
        CFI Function halGetch
        ; Saved register size: 0
        ; Auto size: 0
//   42    char c;
//   43    // Turning on reception
//   44    U0CSR |= UART_ENABLE_RECEIVE;
        ORL	0x86,#0x40
//   45 
//   46    while (!URX0IF);
??halGetch_0:
        MOV	C,0x88.3
        JNC	??halGetch_0
//   47    c = U0DBUF;
        MOV	A,0xc1
        MOV	R1,A
//   48    URX0IF = FALSE;
        CLR	0x88.3
//   49 
//   50    return c;
        RET
        CFI EndBlock cfiBlock2
//   51 }
//   52 

        RSEG NEAR_CODE:CODE:NOROOT(0)
//   53 void halUtilMemCopy(BYTE *dst, BYTE *src, BYTE len) {
halUtilMemCopy:
        CFI Block cfiBlock3 Using cfiCommon0
        CFI Function halUtilMemCopy
        MOV	A,#-0x8
        LCALL	?FUNC_ENTER_XDATA
        CFI R6 load(1, XDATA, add(CFA_XSP16, literal(-8)))
        CFI VB load(1, XDATA, add(CFA_XSP16, literal(-7)))
        CFI V0 load(1, XDATA, add(CFA_XSP16, literal(-6)))
        CFI R7 load(1, XDATA, add(CFA_XSP16, literal(-5)))
        CFI ?RET_LOW load(1, XDATA, add(CFA_XSP16, literal(-4)))
        CFI ?RET_HIGH load(1, XDATA, add(CFA_XSP16, literal(-3)))
        CFI DPL0 load(1, XDATA, add(CFA_XSP16, literal(-2)))
        CFI DPH0 load(1, XDATA, add(CFA_XSP16, literal(-1)))
        CFI CFA_SP SP+0
        CFI CFA_XSP16 add(XSP16, 8)
        ; Saved register size: 8
        ; Auto size: 0
//   54   while (len) {
??halUtilMemCopy_0:
        MOV	A,R1
        JZ	??halUtilMemCopy_1
//   55     *dst = *src;
        MOV	DPL,R4
        MOV	DPH,R5
        MOVX	A,@DPTR
        MOV	DPL,R2
        MOV	DPH,R3
        MOVX	@DPTR,A
//   56     dst++;src++;
        MOV	DPL,R2
        MOV	DPH,R3
        INC	DPTR
        MOV	R2,DPL
        MOV	R3,DPH
        MOV	DPL,R4
        MOV	DPH,R5
        INC	DPTR
        MOV	R4,DPL
        MOV	R5,DPH
//   57     len--;
        DEC	R1
        SJMP	??halUtilMemCopy_0
//   58   }
//   59 }
??halUtilMemCopy_1:
        MOV	R7,#0x1
        LJMP	?FUNC_LEAVE_XDATA
        CFI EndBlock cfiBlock3
//   60 
//   61 // assuming 16us period, have 1/16us = 62500 tics per seocnd
//   62 #define T2CMPVAL (62500/SLOWTICKS_PER_SECOND)
//   63 
//   64 //use timer2, will set it up for one tick per symbol
//   65 //assuming 2.4GHZ and a 32 MHZ clock.
//   66 // this is a 20 bit counter, will overflow in ~16 seconds
//   67 //should be long enough for MAC timeout cases

        RSEG NEAR_CODE:CODE:NOROOT(0)
//   68 void halInitMACTimer(void) {
halInitMACTimer:
        CFI Block cfiBlock4 Using cfiCommon0
        CFI Function halInitMACTimer
        ; Saved register size: 0
        ; Auto size: 0
//   69 
//   70   T2CNF = 0x00; //ensure timer is idle
        MOV	0xc3,#0x0
//   71 
//   72   T2CAPHPH = 0x02;  // setting for 16 u-second periods
        MOV	0xa5,#0x2
//   73   T2CAPLPL = 0x00;  // (0x0200) / 32 = 16 u-seconds
        MOV	0xa4,#0x0
//   74   //set the interrupt compare to its maximum value
//   75 
//   76 #ifdef LRWPAN_ENABLE_SLOW_TIMER
//   77   T2PEROF0 = (BYTE) (T2CMPVAL);
//   78   T2PEROF1 = (BYTE) (T2CMPVAL>>8);
//   79   //enable overflow count compare interrupt
//   80   T2PEROF2 = ((BYTE) (T2CMPVAL>>16)) | 0x20;
//   81 #endif
//   82 
//   83   //turn on timer
//   84   //configure timer
//   85   T2CNF = 0x03; //start timer
        MOV	0xc3,#0x3
//   86 
//   87   INT_SETFLAG_T2(INT_CLR); //clear processor interrupt flag
        CLR	0xc0.2
//   88   //enable T2 processor interrupt
//   89 #ifdef LRWPAN_ENABLE_SLOW_TIMER
//   90   INT_ENABLE_T2(INT_ON);
//   91 #endif
//   92 
//   93 }
        RET
        CFI EndBlock cfiBlock4
//   94 

        RSEG NEAR_CODE:CODE:NOROOT(0)
//   95 UINT32 halGetMACTimer(void){
halGetMACTimer:
        CFI Block cfiBlock5 Using cfiCommon0
        CFI Function halGetMACTimer
        MOV	A,#-0xb
        LCALL	?FUNC_ENTER_XDATA
        CFI DPH0 load(1, XDATA, add(CFA_XSP16, literal(-1)))
        CFI DPL0 load(1, XDATA, add(CFA_XSP16, literal(-2)))
        CFI ?RET_HIGH load(1, XDATA, add(CFA_XSP16, literal(-3)))
        CFI ?RET_LOW load(1, XDATA, add(CFA_XSP16, literal(-4)))
        CFI R7 load(1, XDATA, add(CFA_XSP16, literal(-5)))
        CFI V3 load(1, XDATA, add(CFA_XSP16, literal(-6)))
        CFI V2 load(1, XDATA, add(CFA_XSP16, literal(-7)))
        CFI V1 load(1, XDATA, add(CFA_XSP16, literal(-8)))
        CFI V0 load(1, XDATA, add(CFA_XSP16, literal(-9)))
        CFI VB load(1, XDATA, add(CFA_XSP16, literal(-10)))
        CFI R6 load(1, XDATA, add(CFA_XSP16, literal(-11)))
        CFI CFA_SP SP+0
        CFI CFA_XSP16 add(XSP16, 11)
        ; Saved register size: 11
        ; Auto size: 4
        MOV	A,#-0x4
        LCALL	?ALLOC_XSTACK8
        CFI CFA_XSP16 add(XSP16, 15)
//   96   UINT32_UNION t;
//   97   BOOL gie_status;
//   98 
//   99   SAVE_AND_DISABLE_GLOBAL_INTERRUPT(gie_status);
        MOV	C,0xa8.7
        CLR	A
        MOV	0xE0 /* A   */.0,C
        MOV	R6,A
        CLR	0xa8.7
//  100   t.bytes[UINT32_LOWORD_LSB] = T2OF0;
        MOV	A,0xa1
        MOV	DPL,?XSP + 0
        MOV	DPH,?XSP + 1
        MOVX	@DPTR,A
//  101   t.bytes[UINT32_LOWORD_MSB] = T2OF1;
        MOV	A,0xa2
        PUSH	A
        CFI CFA_SP SP+-1
        MOV	A,#0x1
        LCALL	?XSTACK_DISP0_8
        POP	A
        CFI CFA_SP SP+0
        MOVX	@DPTR,A
//  102   t.bytes[UINT32_HIWORD_LSB] = T2OF2 & 0x0F;
        MOV	A,#0xf
        ANL	A,0xa3
        PUSH	A
        CFI CFA_SP SP+-1
        MOV	A,#0x2
        LCALL	?XSTACK_DISP0_8
        POP	A
        CFI CFA_SP SP+0
        MOVX	@DPTR,A
//  103   t.bytes[UINT32_HIWORD_MSB] = 0;
        MOV	A,#0x0
        PUSH	A
        CFI CFA_SP SP+-1
        MOV	A,#0x3
        LCALL	?XSTACK_DISP0_8
        POP	A
        CFI CFA_SP SP+0
        MOVX	@DPTR,A
//  104   RESTORE_GLOBAL_INTERRUPT(gie_status);
        MOV	A,R6
        MOV	C,0xE0 /* A   */.0
        MOV	0xa8.7,C
//  105   return (t.val);