📄 emissions.c
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/*! * \file emissions.c * \brief FCC/CE certification test routine * * This is the test routine that runs during the FCC and CE test * certification procedure. * * \author Michael Norman * \version $Revision: 1.5 $ */#include "common.h"#include "fec.h"#include "dspi.h"#include "emissions.h"#include "cy22393.h"/********************************************************************//* Default FEC Config Info */FEC_CONFIG fec_cfg ={ /* FEC channel */ 0, /* Transceiver mode */ FEC_MODE_RMII, /* Ethernet Speed */ MII_100BASE_TX, /* Ethernet Duplex */ MII_FDX, /* Promiscuous Mode */ FALSE, /* Ethernet Address */ {0x00,0xCF,0xCF,0xCF,0xCF,0x00}, /* PHY address */ 0, /* Init PHY? */ YES, /* Number of RxBDs */ 1, /* Number of TxBDs */ 2};int test_data[] = { 0x11111111,0x22222222,0x44444444,0x88888888, 0x55555555,0x66666666,0x77777777,0x88888888, 0x99999999,0x00000000,0xaaaaaaaa,0xbbbbbbbb, 0xcccccccc,0xdddddddd,0xeeeeeeee,0xffffffff, /* 64 Bytes */ 0x11111111,0x22222222,0x33333333,0x44444444, 0x55555555,0x66666666,0x77777777,0x88888888, 0x12345678,0x90abcdef,0x78162435,0xbd895b14, 0xcccccccc,0xdddddddd,0xeeeeeeee,0xffffffff, /* 128 Bytes */ 0x11111111,0x22222222,0x33333333,0x44444444, 0x55555555,0x66666666,0x77777777,0x88888888, 0x99999999,0x00000000,0xaaaaaaaa,0xbbbbbbbb, 0xcccccccc,0xdddddddd,0xeeeeeeee,0xffffffff, /* 192 Bytes */ 0x99a152a3,0x54a556a7,0x58a95aab,0x5cad5eaf, 0x99a152a3,0x54a556a7,0x58a95aab,0x5cad5eaf, 0x99a152a3,0x54a556a7,0x58a95aab,0x5cad5eaf, 0x99a152a3,0x54a556a7,0x58a95aab,0x5cad5eaf /* 256 Bytes */};#define NBUF_NUMBER 3 #define NBUF_SIZE 256ETH_ADDR src = {0x00,0xCF,0x54,0x45,0xCF,0x00};ETH_ADDR dst = {0x00,0xCF,0x54,0x45,0xCF,0x00};/********************************************************************/void main (void){ fcc_test(); //test_a(); //test_b(); //test_c(); //test_d(); //test_e(); //test_f(); //test_g();}/********************************************************************/voidburst_writes(int dest){ int i, j; for (j = 0; j < 100; j++) for (i = 0; i < sizeof(test_data); i+=16) mcf5xxx_move_line((ADDRESS)&test_data[i], dest + i);}/********************************************************************/voideth_tx (void){ NBUF *pNbuf; /* Alloc a free network buffer */ pNbuf = nbuf_alloc(); pNbuf->length = sizeof(test_data); ASSERT(pNbuf != NULL); ASSERT(fec_send(0,dst,src,ETH_FRM_TEST,pNbuf) == 0);}/********************************************************************/voidulpi_init(void){ int i, err_cnt = 0; uint8 data; /* Initialize the USB Clock, use ext clk PLL isn't a multiple of 60MHz */ if (FSYS_MHZ % 60) { MCF_CCM_MISCCR &= ~MCF_CCM_MISCCR_USBSRC; MCF_GPIO_PAR_DMA = MCF_GPIO_PAR_DMA & MCF_GPIO_PAR_DMA_DREQ1_MASK | MCF_GPIO_PAR_DMA_DREQ1_USB_CLKIN; } else { MCF_CCM_MISCCR |= MCF_CCM_MISCCR_USBSRC; } /* Enable the required ULPI signals */ MCF_GPIO_PAR_DMA = MCF_GPIO_PAR_DMA & MCF_GPIO_PAR_DMA_DACK1_MASK | MCF_GPIO_PAR_DMA_DACK1_ULPI_DIR; MCF_GPIO_PAR_USB = 0 | MCF_GPIO_PAR_USB_VBUSEN_ULPI_NXT | MCF_GPIO_PAR_USB_VBUSOC_ULPI_STP; MCF_GPIO_PAR_FEC = MCF_GPIO_PAR_FEC & MCF_GPIO_PAR_FEC_FEC0_MASK | MCF_GPIO_PAR_FEC_FEC0_RMII_ULPI; /* Enable Host mode */ MCF_USB_USBMODE = 0 | MCF_USB_USBMODE_ES | MCF_USB_USBMODE_CM_HOST; /* Enable ULPI and apply power to the port */ MCF_USB_PORTSC = 0 | MCF_USB_PORTSC_PTS_ULPI | MCF_USB_PORTSC_PP;}/********************************************************************/voidulpi_read(void){ uint8 data; /* Read the first register */ MCF_USB_ULPI_VIEWPORT = 0 | MCF_USB_ULPI_VIEWPORT_ULPI_RUN | MCF_USB_ULPI_VIEWPORT_ULPI_ADDR(0x0); while (MCF_USB_ULPI_VIEWPORT & MCF_USB_ULPI_VIEWPORT_ULPI_RUN); data = MCF_USB_ULPI_VIEWPORT>>8 &0xFF; ASSERT(data == 0x24); /* Read the second register */ MCF_USB_ULPI_VIEWPORT = 0 | MCF_USB_ULPI_VIEWPORT_ULPI_RUN | MCF_USB_ULPI_VIEWPORT_ULPI_ADDR(0x1); while (MCF_USB_ULPI_VIEWPORT & MCF_USB_ULPI_VIEWPORT_ULPI_RUN); data = MCF_USB_ULPI_VIEWPORT>>8 &0xFF; ASSERT(data == 0x04); /* Read the third register */ MCF_USB_ULPI_VIEWPORT = 0 | MCF_USB_ULPI_VIEWPORT_ULPI_RUN | MCF_USB_ULPI_VIEWPORT_ULPI_ADDR(0x2); while (MCF_USB_ULPI_VIEWPORT & MCF_USB_ULPI_VIEWPORT_ULPI_RUN); data = MCF_USB_ULPI_VIEWPORT>>8 &0xFF; ASSERT(data == 0x04); /* Read the fourth register */ MCF_USB_ULPI_VIEWPORT = 0 | MCF_USB_ULPI_VIEWPORT_ULPI_RUN | MCF_USB_ULPI_VIEWPORT_ULPI_ADDR(0x3); while (MCF_USB_ULPI_VIEWPORT & MCF_USB_ULPI_VIEWPORT_ULPI_RUN); data = MCF_USB_ULPI_VIEWPORT>>8 &0xFF; ASSERT(data == 0x00);}/********************************************************************/voidfec_tx_callback(NBUF *pNbuf){ /* Resend the packet, continue the loop */ ASSERT(fec_send(0,dst,src,ETH_FRM_TEST,pNbuf) == 0);}/********************************************************************/voideth_init(void){ int i; NBUF *pNbuf; /* Initialize the network buffers */ if (nbuf_init(NBUF_NUMBER, NBUF_SIZE)) { printf("Fatal: Unable to initialize the network buffers\n"); ASSERT(FALSE); } for (i=0; i < NBUF_NUMBER; ++i) { pNbuf = nbuf_alloc(); if (pNbuf == NULL) { printf("Error: nbuf_alloc() failed\n"); ASSERT(FALSE); } memcpy(pNbuf->data,test_data,NBUF_SIZE); nbuf_free(pNbuf); } printf("Starting FEC0..."); if (fec_eth_start(&fec_cfg, FSYS_MHZ)) printf("Failed\n"); else { printf("Done\n"); fec_rmii_speed(fec_cfg.ch, fec_cfg.speed);// ASSERT(eth_phy_get_speed(fec_cfg.phyaddr, &spd) == 0);// printf("Speed negotiated to %dMbps\n",// (spd == MII_10BASE_T) ? 10 : 100);//// ASSERT(eth_phy_get_duplex(fec_cfg.phyaddr, &dpx) == 0);// printf("Duplex negotiated to \"%s\"\n",// (dpx == MII_FDX) ? "FULL" : "HALF"); } /* Setup the network interface */ nif_init(&nif[0]); nif_set_hwa(&nif[0], &fec_cfg.mac[0]); nif_set_ch(&nif[0], 0); }/********************************************************************/voidfcc_test (void){ int i, hashi; int spd, dpx; char hash[5]; hash[0]=8; /* Backspace */ hash[1]=124;/* "|" */ hash[2]=47; /* "/" */ hash[3]=45; /* "-" */ hash[4]=92; /* "\" */ /* Turn on i-cache for Flexbus and SDRAM regions */ cpu_icache_enable(0, SIZE_2G); cpu_bcache_enable(); printf("\nEmissions Testing\n"); /* * Turn off 60MHz USB clock. This clock isn't used. Instead, the USB_CLKIN * gets a clock from the ULPI PHY. */ cy22393_init(); cy22393_disable_clk(CY22393_CLKC); /* Enable interrupts in the core */ mcf5xxx_irq_enable(); eth_init(); ulpi_init(); dspi_init(); /* * For continuous FEC Tx, add the following lines before * the while loop and remove the eth_tx() calls from inside * the loop. The callback function will resend the packet as * soon as it clears the FEC. This will result in nearly * continuous transmissions activity. * * nif_set_txcallback(&nif[0], fec_tx_callback); * eth_tx(); */ i = 0; hashi = 0; //FPGA_SEVEN_LED = 0; CPLD_LEDS = 0; while (1) { int j; /* Increment the CPLD LED display */ ++i; FPGA_7SEGMENT = i / 20; CPLD_LEDS = i / 20; /* Twirlies on the UART0 output */ out_char(hash[0]); out_char(hash[hashi]); hashi = (hashi + 1) % 5; for (j = 0; j < 20; j++) { eth_tx(); burst_writes(SDRAM_ADDRESS); ASSERT(*(uint8*)FLASH0_ADDRESS != 0xDEADBEEF); ASSERT(*(uint8*)FLASH1_ADDRESS != 0xDEADBEEF); ulpi_read(); dspi_tx(0x05, 1, 0x80); dspi_rx(); //nop(); } }}/********************************************************************/voidtest_a (void){ int i, hashi; int spd, dpx; char hash[5]; hash[0]=8; /* Backspace */ hash[1]=124;/* "|" */ hash[2]=47; /* "/" */ hash[3]=45; /* "-" */ hash[4]=92; /* "\" */ /* Turn on I-cache and B-cache */ /* mcf5xxx_wr_cacr(0 | MCF5XXX_CACR_BEC | MCF5XXX_CACR_BCINVA | MCF5XXX_CACR_IEC | MCF5XXX_CACR_ICINVA); */ printf("\nEmissions Testing Routine A\n"); /* Enable interrupts in the core */ mcf5xxx_irq_enable(); eth_init(); ulpi_init(); dspi_init(); /* * For continuous FEC Tx, add the following lines before * the while loop and remove the eth_tx() calls from inside * the loop. The callback function will resend the packet as * soon as it clears the FEC. This will result in nearly * continuous transmissions activity. * * nif_set_txcallback(&nif[0], fec_tx_callback); * eth_tx(); */ i = 0; hashi = 0; while (1) { /* Increment the CPLD LED display */ platform_led_display(i++); /* Twirlies on the UART/USB output */ out_char(hash[0]); out_char(hash[hashi]); hashi = (hashi + 1) % 5; eth_tx(); burst_writes(FLASH0_ADDRESS); burst_writes(FLASH1_ADDRESS); burst_writes(SDRAM_ADDRESS); eth_tx(); burst_writes(FLASH0_ADDRESS); burst_writes(FLASH1_ADDRESS); burst_writes(SDRAM_ADDRESS); eth_tx(); ulpi_read(); dspi_tx(0x05, 1, 0x80); dspi_rx(); eth_tx(); burst_writes(FLASH0_ADDRESS); burst_writes(FLASH1_ADDRESS); burst_writes(SDRAM_ADDRESS); }}/********************************************************************/voidtest_b (void){ printf("\nEmissions Testing Routine B\n"); /* Setup the low-power control registers for RUN mode */ MCF_PMM_LPCR = 0 | MCF_PMM_LPCR_FWKUP | MCF_PMM_LPCR_STPMD(0); MCF_PMM_WCR = 0 | MCF_PMM_WCR_PRILVL(0) | MCF_PMM_WCR_LPMD_RUN | MCF_PMM_WCR_ENBWCR; /* Wait for the UART to finish transmitting */ while(!(MCF_UART_UCSR(TERM_PORT) & MCF_UART_USR_TXEMP)); /* Execute the stop instruction */ stop_2000();}/********************************************************************/voidtest_c (void){ printf("\nEmissions Testing Routine C\n"); printf("CLK B (PCI_REF) Off\n"); cy22393_init(); cy22393_disable_clk(CY22393_CLKB); cy22393_dump(); /* Setup the low-power control registers for RUN mode */ MCF_PMM_LPCR = 0 | MCF_PMM_LPCR_FWKUP | MCF_PMM_LPCR_STPMD(0); MCF_PMM_WCR = 0 | MCF_PMM_WCR_PRILVL(0) | MCF_PMM_WCR_LPMD_RUN | MCF_PMM_WCR_ENBWCR; /* Wait for the UART to finish transmitting */ while(!(MCF_UART_UCSR(TERM_PORT) & MCF_UART_USR_TXEMP)); /* Execute the stop instruction */ stop_2000();}/********************************************************************/voidtest_d (void){ printf("\nEmissions Testing Routine D\n"); printf("CLK C (USBCLK_60) Off\n"); cy22393_init(); cy22393_disable_clk(CY22393_CLKC); cy22393_dump(); /* Setup the low-power control registers for RUN mode */ MCF_PMM_LPCR = 0 | MCF_PMM_LPCR_FWKUP | MCF_PMM_LPCR_STPMD(0); MCF_PMM_WCR = 0 | MCF_PMM_WCR_PRILVL(0) | MCF_PMM_WCR_LPMD_RUN | MCF_PMM_WCR_ENBWCR; /* Wait for the UART to finish transmitting */ while(!(MCF_UART_UCSR(TERM_PORT) & MCF_UART_USR_TXEMP)); /* Execute the stop instruction */ stop_2000();}/********************************************************************/voidtest_e (void){ printf("\nEmissions Testing Routine E\n"); printf("CLK D (USBCLK_24) Off\n"); cy22393_init(); cy22393_disable_clk(CY22393_CLKD); cy22393_dump(); /* Setup the low-power control registers for RUN mode */ MCF_PMM_LPCR = 0 | MCF_PMM_LPCR_FWKUP | MCF_PMM_LPCR_STPMD(0); MCF_PMM_WCR = 0 | MCF_PMM_WCR_PRILVL(0) | MCF_PMM_WCR_LPMD_RUN | MCF_PMM_WCR_ENBWCR; /* Wait for the UART to finish transmitting */ while(!(MCF_UART_UCSR(TERM_PORT) & MCF_UART_USR_TXEMP)); /* Execute the stop instruction */ stop_2000();}/********************************************************************/voidtest_f (void){ printf("\nEmissions Testing Routine F\n"); printf("CLK E (RMII_REF) Off\n"); cy22393_init(); cy22393_disable_clk(CY22393_CLKE); cy22393_dump(); /* Setup the low-power control registers for RUN mode */ MCF_PMM_LPCR = 0 | MCF_PMM_LPCR_FWKUP | MCF_PMM_LPCR_STPMD(0); MCF_PMM_WCR = 0 | MCF_PMM_WCR_PRILVL(0) | MCF_PMM_WCR_LPMD_RUN | MCF_PMM_WCR_ENBWCR; /* Wait for the UART to finish transmitting */ while(!(MCF_UART_UCSR(TERM_PORT) & MCF_UART_USR_TXEMP)); /* Execute the stop instruction */ stop_2000();}/********************************************************************/voidtest_g (void){ /* Run this test from the 25MHz crystal */ printf("\nEmissions Testing Routine G\n"); printf("Running from 25MHz crystal\n"); /* Setup the low-power control registers for RUN mode */ MCF_PMM_LPCR = 0 | MCF_PMM_LPCR_FWKUP | MCF_PMM_LPCR_STPMD(0); MCF_PMM_WCR = 0 | MCF_PMM_WCR_PRILVL(0) | MCF_PMM_WCR_LPMD_RUN | MCF_PMM_WCR_ENBWCR; /* Wait for the UART to finish transmitting */ while(!(MCF_UART_UCSR(TERM_PORT) & MCF_UART_USR_TXEMP)); /* Execute the stop instruction */ stop_2000();}/********************************************************************/
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