mcf5445x_edma.h

Freescale MCF5445evb 参考测试代码

/*
 * File:    mcf5445x_edma.h
 * Purpose: Register and bit definitions
 */

#ifndef __MCF5445X_EDMA_H__
#define __MCF5445X_EDMA_H__

/*********************************************************************
*
* Enhanced DMA (EDMA)
*
*********************************************************************/

/* Register read/write macros */
#define MCF_EDMA_CR                     (*(vuint32*)(0xFC044000))   
#define MCF_EDMA_ES                     (*(vuint32*)(0xFC044004))   
#define MCF_EDMA_ERQ                    (*(vuint16*)(0xFC04400E))   
#define MCF_EDMA_EEI                    (*(vuint16*)(0xFC044016))   
#define MCF_EDMA_SERQ                   (*(vuint8 *)(0xFC044018))   
#define MCF_EDMA_CERQ                   (*(vuint8 *)(0xFC044019))   
#define MCF_EDMA_SEEI                   (*(vuint8 *)(0xFC04401A))   
#define MCF_EDMA_CEEI                   (*(vuint8 *)(0xFC04401B))   
#define MCF_EDMA_CINT                   (*(vuint8 *)(0xFC04401C))   
#define MCF_EDMA_CERR                   (*(vuint8 *)(0xFC04401D))   
#define MCF_EDMA_SSRT                   (*(vuint8 *)(0xFC04401E))   
#define MCF_EDMA_CDNE                   (*(vuint8 *)(0xFC04401F))   
#define MCF_EDMA_INTR                   (*(vuint16*)(0xFC044026))   
#define MCF_EDMA_ERR                    (*(vuint16*)(0xFC04402E))   
#define MCF_EDMA_DCHPRI0                (*(vuint8 *)(0xFC044100))   
#define MCF_EDMA_DCHPRI1                (*(vuint8 *)(0xFC044101))   
#define MCF_EDMA_DCHPRI2                (*(vuint8 *)(0xFC044102))   
#define MCF_EDMA_DCHPRI3                (*(vuint8 *)(0xFC044103))   
#define MCF_EDMA_DCHPRI4                (*(vuint8 *)(0xFC044104))   
#define MCF_EDMA_DCHPRI5                (*(vuint8 *)(0xFC044105))   
#define MCF_EDMA_DCHPRI6                (*(vuint8 *)(0xFC044106))   
#define MCF_EDMA_DCHPRI7                (*(vuint8 *)(0xFC044107))   
#define MCF_EDMA_DCHPRI8                (*(vuint8 *)(0xFC044108))   
#define MCF_EDMA_DCHPRI9                (*(vuint8 *)(0xFC044109))   
#define MCF_EDMA_DCHPRI10               (*(vuint8 *)(0xFC04410A))   
#define MCF_EDMA_DCHPRI11               (*(vuint8 *)(0xFC04410B))   
#define MCF_EDMA_DCHPRI12               (*(vuint8 *)(0xFC04410C))   
#define MCF_EDMA_DCHPRI13               (*(vuint8 *)(0xFC04410D))   
#define MCF_EDMA_DCHPRI14               (*(vuint8 *)(0xFC04410E))   
#define MCF_EDMA_DCHPRI15               (*(vuint8 *)(0xFC04410F))   
#define MCF_EDMA_TCD0_SADDR             (*(vuint32*)(0xFC045000))   
#define MCF_EDMA_TCD0_ATTR              (*(vuint16*)(0xFC045004))   
#define MCF_EDMA_TCD0_SOFF              (*(vuint16*)(0xFC045006))   
#define MCF_EDMA_TCD0_NBYTES            (*(vuint32*)(0xFC045008))   
#define MCF_EDMA_TCD0_SLAST             (*(vuint32*)(0xFC04500C))   
#define MCF_EDMA_TCD0_DADDR             (*(vuint32*)(0xFC045010))   
#define MCF_EDMA_TCD0_CITER_ELINK       (*(vuint16*)(0xFC045014))   
#define MCF_EDMA_TCD0_CITER             (*(vuint16*)(0xFC045014))   
#define MCF_EDMA_TCD0_DOFF              (*(vuint16*)(0xFC045016))   
#define MCF_EDMA_TCD0_DLAST_SGA         (*(vuint32*)(0xFC045018))   
#define MCF_EDMA_TCD0_BITER_ELINK       (*(vuint16*)(0xFC04501C))   
#define MCF_EDMA_TCD0_BITER             (*(vuint16*)(0xFC04501C))   
#define MCF_EDMA_TCD0_CSR               (*(vuint16*)(0xFC04501E))   
#define MCF_EDMA_TCD1_SADDR             (*(vuint32*)(0xFC045020))   
#define MCF_EDMA_TCD1_ATTR              (*(vuint16*)(0xFC045024))   
#define MCF_EDMA_TCD1_SOFF              (*(vuint16*)(0xFC045026))   
#define MCF_EDMA_TCD1_NBYTES            (*(vuint32*)(0xFC045028))   
#define MCF_EDMA_TCD1_SLAST             (*(vuint32*)(0xFC04502C))   
#define MCF_EDMA_TCD1_DADDR             (*(vuint32*)(0xFC045030))   
#define MCF_EDMA_TCD1_CITER_ELINK       (*(vuint16*)(0xFC045034))   
#define MCF_EDMA_TCD1_CITER             (*(vuint16*)(0xFC045034))   
#define MCF_EDMA_TCD1_DOFF              (*(vuint16*)(0xFC045036))   
#define MCF_EDMA_TCD1_DLAST_SGA         (*(vuint32*)(0xFC045038))   
#define MCF_EDMA_TCD1_BITER             (*(vuint16*)(0xFC04503C))   
#define MCF_EDMA_TCD1_BITER_ELINK       (*(vuint16*)(0xFC04503C))   
#define MCF_EDMA_TCD1_CSR               (*(vuint16*)(0xFC04503E))   
#define MCF_EDMA_TCD2_SADDR             (*(vuint32*)(0xFC045040))   
#define MCF_EDMA_TCD2_ATTR              (*(vuint16*)(0xFC045044))   
#define MCF_EDMA_TCD2_SOFF              (*(vuint16*)(0xFC045046))   
#define MCF_EDMA_TCD2_NBYTES            (*(vuint32*)(0xFC045048))   
#define MCF_EDMA_TCD2_SLAST             (*(vuint32*)(0xFC04504C))   
#define MCF_EDMA_TCD2_DADDR             (*(vuint32*)(0xFC045050))   
#define MCF_EDMA_TCD2_CITER             (*(vuint16*)(0xFC045054))   
#define MCF_EDMA_TCD2_CITER_ELINK       (*(vuint16*)(0xFC045054))   
#define MCF_EDMA_TCD2_DOFF              (*(vuint16*)(0xFC045056))   
#define MCF_EDMA_TCD2_DLAST_SGA         (*(vuint32*)(0xFC045058))   
#define MCF_EDMA_TCD2_BITER_ELINK       (*(vuint16*)(0xFC04505C))   
#define MCF_EDMA_TCD2_BITER             (*(vuint16*)(0xFC04505C))   
#define MCF_EDMA_TCD2_CSR               (*(vuint16*)(0xFC04505E))   
#define MCF_EDMA_TCD3_SADDR             (*(vuint32*)(0xFC045060))   
#define MCF_EDMA_TCD3_ATTR              (*(vuint16*)(0xFC045064))   
#define MCF_EDMA_TCD3_SOFF              (*(vuint16*)(0xFC045066))   
#define MCF_EDMA_TCD3_NBYTES            (*(vuint32*)(0xFC045068))   
#define MCF_EDMA_TCD3_SLAST             (*(vuint32*)(0xFC04506C))   
#define MCF_EDMA_TCD3_DADDR             (*(vuint32*)(0xFC045070))   
#define MCF_EDMA_TCD3_CITER             (*(vuint16*)(0xFC045074))   
#define MCF_EDMA_TCD3_CITER_ELINK       (*(vuint16*)(0xFC045074))   
#define MCF_EDMA_TCD3_DOFF              (*(vuint16*)(0xFC045076))   
#define MCF_EDMA_TCD3_DLAST_SGA         (*(vuint32*)(0xFC045078))   
#define MCF_EDMA_TCD3_BITER_ELINK       (*(vuint16*)(0xFC04507C))   
#define MCF_EDMA_TCD3_BITER             (*(vuint16*)(0xFC04507C))   
#define MCF_EDMA_TCD3_CSR               (*(vuint16*)(0xFC04507E))   
#define MCF_EDMA_TCD4_SADDR             (*(vuint32*)(0xFC045080))   
#define MCF_EDMA_TCD4_ATTR              (*(vuint16*)(0xFC045084))   
#define MCF_EDMA_TCD4_SOFF              (*(vuint16*)(0xFC045086))   
#define MCF_EDMA_TCD4_NBYTES            (*(vuint32*)(0xFC045088))   
#define MCF_EDMA_TCD4_SLAST             (*(vuint32*)(0xFC04508C))   
#define MCF_EDMA_TCD4_DADDR             (*(vuint32*)(0xFC045090))   
#define MCF_EDMA_TCD4_CITER             (*(vuint16*)(0xFC045094))   
#define MCF_EDMA_TCD4_CITER_ELINK       (*(vuint16*)(0xFC045094))   
#define MCF_EDMA_TCD4_DOFF              (*(vuint16*)(0xFC045096))   
#define MCF_EDMA_TCD4_DLAST_SGA         (*(vuint32*)(0xFC045098))   
#define MCF_EDMA_TCD4_BITER             (*(vuint16*)(0xFC04509C))   
#define MCF_EDMA_TCD4_BITER_ELINK       (*(vuint16*)(0xFC04509C))   
#define MCF_EDMA_TCD4_CSR               (*(vuint16*)(0xFC04509E))   
#define MCF_EDMA_TCD5_SADDR             (*(vuint32*)(0xFC0450A0))   
#define MCF_EDMA_TCD5_ATTR              (*(vuint16*)(0xFC0450A4))   
#define MCF_EDMA_TCD5_SOFF              (*(vuint16*)(0xFC0450A6))   
#define MCF_EDMA_TCD5_NBYTES            (*(vuint32*)(0xFC0450A8))   
#define MCF_EDMA_TCD5_SLAST             (*(vuint32*)(0xFC0450AC))   
#define MCF_EDMA_TCD5_DADDR             (*(vuint32*)(0xFC0450B0))   
#define MCF_EDMA_TCD5_CITER             (*(vuint16*)(0xFC0450B4))   
#define MCF_EDMA_TCD5_CITER_ELINK       (*(vuint16*)(0xFC0450B4))   
#define MCF_EDMA_TCD5_DOFF              (*(vuint16*)(0xFC0450B6))   
#define MCF_EDMA_TCD5_DLAST_SGA         (*(vuint32*)(0xFC0450B8))   
#define MCF_EDMA_TCD5_BITER_ELINK       (*(vuint16*)(0xFC0450BC))   
#define MCF_EDMA_TCD5_BITER             (*(vuint16*)(0xFC0450BC))   
#define MCF_EDMA_TCD5_CSR               (*(vuint16*)(0xFC0450BE))   
#define MCF_EDMA_TCD6_SADDR             (*(vuint32*)(0xFC0450C0))   
#define MCF_EDMA_TCD6_ATTR              (*(vuint16*)(0xFC0450C4))   
#define MCF_EDMA_TCD6_SOFF              (*(vuint16*)(0xFC0450C6))   
#define MCF_EDMA_TCD6_NBYTES            (*(vuint32*)(0xFC0450C8))   
#define MCF_EDMA_TCD6_SLAST             (*(vuint32*)(0xFC0450CC))   
#define MCF_EDMA_TCD6_DADDR             (*(vuint32*)(0xFC0450D0))   
#define MCF_EDMA_TCD6_CITER             (*(vuint16*)(0xFC0450D4))   
#define MCF_EDMA_TCD6_CITER_ELINK       (*(vuint16*)(0xFC0450D4))   
#define MCF_EDMA_TCD6_DOFF              (*(vuint16*)(0xFC0450D6))   
#define MCF_EDMA_TCD6_DLAST_SGA         (*(vuint32*)(0xFC0450D8))   
#define MCF_EDMA_TCD6_BITER_ELINK       (*(vuint16*)(0xFC0450DC))   
#define MCF_EDMA_TCD6_BITER             (*(vuint16*)(0xFC0450DC))   
#define MCF_EDMA_TCD6_CSR               (*(vuint16*)(0xFC0450DE))   
#define MCF_EDMA_TCD7_SADDR             (*(vuint32*)(0xFC0450E0))   
#define MCF_EDMA_TCD7_ATTR              (*(vuint16*)(0xFC0450E4))   
#define MCF_EDMA_TCD7_SOFF              (*(vuint16*)(0xFC0450E6))   
#define MCF_EDMA_TCD7_NBYTES            (*(vuint32*)(0xFC0450E8))   
#define MCF_EDMA_TCD7_SLAST             (*(vuint32*)(0xFC0450EC))   
#define MCF_EDMA_TCD7_DADDR             (*(vuint32*)(0xFC0450F0))   
#define MCF_EDMA_TCD7_CITER             (*(vuint16*)(0xFC0450F4))   
#define MCF_EDMA_TCD7_CITER_ELINK       (*(vuint16*)(0xFC0450F4))   
#define MCF_EDMA_TCD7_DOFF              (*(vuint16*)(0xFC0450F6))   
#define MCF_EDMA_TCD7_DLAST_SGA         (*(vuint32*)(0xFC0450F8))   
#define MCF_EDMA_TCD7_BITER_ELINK       (*(vuint16*)(0xFC0450FC))   
#define MCF_EDMA_TCD7_BITER             (*(vuint16*)(0xFC0450FC))   
#define MCF_EDMA_TCD7_CSR               (*(vuint16*)(0xFC0450FE))   
#define MCF_EDMA_TCD8_SADDR             (*(vuint32*)(0xFC045100))   
#define MCF_EDMA_TCD8_ATTR              (*(vuint16*)(0xFC045104))   
#define MCF_EDMA_TCD8_SOFF              (*(vuint16*)(0xFC045106))   
#define MCF_EDMA_TCD8_NBYTES            (*(vuint32*)(0xFC045108))   
#define MCF_EDMA_TCD8_SLAST             (*(vuint32*)(0xFC04510C))   
#define MCF_EDMA_TCD8_DADDR             (*(vuint32*)(0xFC045110))   
#define MCF_EDMA_TCD8_CITER             (*(vuint16*)(0xFC045114))   
#define MCF_EDMA_TCD8_CITER_ELINK       (*(vuint16*)(0xFC045114))   
#define MCF_EDMA_TCD8_DOFF              (*(vuint16*)(0xFC045116))   
#define MCF_EDMA_TCD8_DLAST_SGA         (*(vuint32*)(0xFC045118))   
#define MCF_EDMA_TCD8_BITER_ELINK       (*(vuint16*)(0xFC04511C))   
#define MCF_EDMA_TCD8_BITER             (*(vuint16*)(0xFC04511C))   
#define MCF_EDMA_TCD8_CSR               (*(vuint16*)(0xFC04511E))   
#define MCF_EDMA_TCD9_SADDR             (*(vuint32*)(0xFC045120))   
#define MCF_EDMA_TCD9_ATTR              (*(vuint16*)(0xFC045124))   
#define MCF_EDMA_TCD9_SOFF              (*(vuint16*)(0xFC045126))   
#define MCF_EDMA_TCD9_NBYTES            (*(vuint32*)(0xFC045128))   
#define MCF_EDMA_TCD9_SLAST             (*(vuint32*)(0xFC04512C))   
#define MCF_EDMA_TCD9_DADDR             (*(vuint32*)(0xFC045130))   
#define MCF_EDMA_TCD9_CITER_ELINK       (*(vuint16*)(0xFC045134))   
#define MCF_EDMA_TCD9_CITER             (*(vuint16*)(0xFC045134))   
#define MCF_EDMA_TCD9_DOFF              (*(vuint16*)(0xFC045136))   
#define MCF_EDMA_TCD9_DLAST_SGA         (*(vuint32*)(0xFC045138))   
#define MCF_EDMA_TCD9_BITER_ELINK       (*(vuint16*)(0xFC04513C))   
#define MCF_EDMA_TCD9_BITER             (*(vuint16*)(0xFC04513C))   
#define MCF_EDMA_TCD9_CSR               (*(vuint16*)(0xFC04513E))   
#define MCF_EDMA_TCD10_SADDR            (*(vuint32*)(0xFC045140))   
#define MCF_EDMA_TCD10_ATTR             (*(vuint16*)(0xFC045144))   
#define MCF_EDMA_TCD10_SOFF             (*(vuint16*)(0xFC045146))   
#define MCF_EDMA_TCD10_NBYTES           (*(vuint32*)(0xFC045148))   
#define MCF_EDMA_TCD10_SLAST            (*(vuint32*)(0xFC04514C))   
#define MCF_EDMA_TCD10_DADDR            (*(vuint32*)(0xFC045150))   
#define MCF_EDMA_TCD10_CITER_ELINK      (*(vuint16*)(0xFC045154))   
#define MCF_EDMA_TCD10_CITER            (*(vuint16*)(0xFC045154))   
#define MCF_EDMA_TCD10_DOFF             (*(vuint16*)(0xFC045156))   
#define MCF_EDMA_TCD10_DLAST_SGA        (*(vuint32*)(0xFC045158))   
#define MCF_EDMA_TCD10_BITER            (*(vuint16*)(0xFC04515C))   
#define MCF_EDMA_TCD10_BITER_ELINK      (*(vuint16*)(0xFC04515C))   
#define MCF_EDMA_TCD10_CSR              (*(vuint16*)(0xFC04515E))   
#define MCF_EDMA_TCD11_SADDR            (*(vuint32*)(0xFC045160))   
#define MCF_EDMA_TCD11_ATTR             (*(vuint16*)(0xFC045164))   
#define MCF_EDMA_TCD11_SOFF             (*(vuint16*)(0xFC045166))   
#define MCF_EDMA_TCD11_NBYTES           (*(vuint32*)(0xFC045168))   
#define MCF_EDMA_TCD11_SLAST            (*(vuint32*)(0xFC04516C))   
#define MCF_EDMA_TCD11_DADDR            (*(vuint32*)(0xFC045170))   
#define MCF_EDMA_TCD11_CITER            (*(vuint16*)(0xFC045174))   
#define MCF_EDMA_TCD11_CITER_ELINK      (*(vuint16*)(0xFC045174))   
#define MCF_EDMA_TCD11_DOFF             (*(vuint16*)(0xFC045176))   
#define MCF_EDMA_TCD11_DLAST_SGA        (*(vuint32*)(0xFC045178))   
#define MCF_EDMA_TCD11_BITER            (*(vuint16*)(0xFC04517C))   
#define MCF_EDMA_TCD11_BITER_ELINK      (*(vuint16*)(0xFC04517C))   
#define MCF_EDMA_TCD11_CSR              (*(vuint16*)(0xFC04517E))   
#define MCF_EDMA_TCD12_SADDR            (*(vuint32*)(0xFC045180))   
#define MCF_EDMA_TCD12_ATTR             (*(vuint16*)(0xFC045184))   
#define MCF_EDMA_TCD12_SOFF             (*(vuint16*)(0xFC045186))   
#define MCF_EDMA_TCD12_NBYTES           (*(vuint32*)(0xFC045188))   
#define MCF_EDMA_TCD12_SLAST            (*(vuint32*)(0xFC04518C))   
#define MCF_EDMA_TCD12_DADDR            (*(vuint32*)(0xFC045190))   
#define MCF_EDMA_TCD12_CITER            (*(vuint16*)(0xFC045194))   
#define MCF_EDMA_TCD12_CITER_ELINK      (*(vuint16*)(0xFC045194))   
#define MCF_EDMA_TCD12_DOFF             (*(vuint16*)(0xFC045196))   
#define MCF_EDMA_TCD12_DLAST_SGA        (*(vuint32*)(0xFC045198))   
#define MCF_EDMA_TCD12_BITER            (*(vuint16*)(0xFC04519C))   
#define MCF_EDMA_TCD12_BITER_ELINK      (*(vuint16*)(0xFC04519C))   
#define MCF_EDMA_TCD12_CSR              (*(vuint16*)(0xFC04519E))   
#define MCF_EDMA_TCD13_SADDR            (*(vuint32*)(0xFC0451A0))   
#define MCF_EDMA_TCD13_ATTR             (*(vuint16*)(0xFC0451A4))   
#define MCF_EDMA_TCD13_SOFF             (*(vuint16*)(0xFC0451A6))   
#define MCF_EDMA_TCD13_NBYTES           (*(vuint32*)(0xFC0451A8))   
#define MCF_EDMA_TCD13_SLAST            (*(vuint32*)(0xFC0451AC))   
#define MCF_EDMA_TCD13_DADDR            (*(vuint32*)(0xFC0451B0))   
#define MCF_EDMA_TCD13_CITER_ELINK      (*(vuint16*)(0xFC0451B4))   
#define MCF_EDMA_TCD13_CITER            (*(vuint16*)(0xFC0451B4))   
#define MCF_EDMA_TCD13_DOFF             (*(vuint16*)(0xFC0451B6))   
#define MCF_EDMA_TCD13_DLAST_SGA        (*(vuint32*)(0xFC0451B8))   
#define MCF_EDMA_TCD13_BITER_ELINK      (*(vuint16*)(0xFC0451BC))   
#define MCF_EDMA_TCD13_BITER            (*(vuint16*)(0xFC0451BC))   
#define MCF_EDMA_TCD13_CSR              (*(vuint16*)(0xFC0451BE))   
#define MCF_EDMA_TCD14_SADDR            (*(vuint32*)(0xFC0451C0))   
#define MCF_EDMA_TCD14_ATTR             (*(vuint16*)(0xFC0451C4))   
#define MCF_EDMA_TCD14_SOFF             (*(vuint16*)(0xFC0451C6))   
#define MCF_EDMA_TCD14_NBYTES           (*(vuint32*)(0xFC0451C8))   
#define MCF_EDMA_TCD14_SLAST            (*(vuint32*)(0xFC0451CC))   
#define MCF_EDMA_TCD14_DADDR            (*(vuint32*)(0xFC0451D0))   
#define MCF_EDMA_TCD14_CITER            (*(vuint16*)(0xFC0451D4))   
#define MCF_EDMA_TCD14_CITER_ELINK      (*(vuint16*)(0xFC0451D4))   
#define MCF_EDMA_TCD14_DOFF             (*(vuint16*)(0xFC0451D6))   
#define MCF_EDMA_TCD14_DLAST_SGA        (*(vuint32*)(0xFC0451D8))   
#define MCF_EDMA_TCD14_BITER_ELINK      (*(vuint16*)(0xFC0451DC))   
#define MCF_EDMA_TCD14_BITER            (*(vuint16*)(0xFC0451DC))   
#define MCF_EDMA_TCD14_CSR              (*(vuint16*)(0xFC0451DE))   
#define MCF_EDMA_TCD15_SADDR            (*(vuint32*)(0xFC0451E0))   
#define MCF_EDMA_TCD15_ATTR             (*(vuint16*)(0xFC0451E4))   
#define MCF_EDMA_TCD15_SOFF             (*(vuint16*)(0xFC0451E6))   
#define MCF_EDMA_TCD15_NBYTES           (*(vuint32*)(0xFC0451E8))   
#define MCF_EDMA_TCD15_SLAST            (*(vuint32*)(0xFC0451EC))   
#define MCF_EDMA_TCD15_DADDR            (*(vuint32*)(0xFC0451F0))   
#define MCF_EDMA_TCD15_CITER_ELINK      (*(vuint16*)(0xFC0451F4))   
#define MCF_EDMA_TCD15_CITER            (*(vuint16*)(0xFC0451F4))   
#define MCF_EDMA_TCD15_DOFF             (*(vuint16*)(0xFC0451F6))   
#define MCF_EDMA_TCD15_DLAST_SGA        (*(vuint32*)(0xFC0451F8))   
#define MCF_EDMA_TCD15_BITER            (*(vuint16*)(0xFC0451FC))   
#define MCF_EDMA_TCD15_BITER_ELINK      (*(vuint16*)(0xFC0451FC))   
#define MCF_EDMA_TCD15_CSR              (*(vuint16*)(0xFC0451FE))   

/* Parameterized register read/write macros for multiple registers */
#define MCF_EDMA_DCHPRI(x)              (*(vuint8 *)(0xFC044100 + ((x)*0x001)))     
#define MCF_EDMA_TCD_SADDR(x)           (*(vuint32*)(0xFC045000 + ((x)*0x020)))     
#define MCF_EDMA_TCD_ATTR(x)            (*(vuint16*)(0xFC045004 + ((x)*0x020)))     
#define MCF_EDMA_TCD_SOFF(x)            (*(vuint16*)(0xFC045006 + ((x)*0x020)))     
#define MCF_EDMA_TCD_NBYTES(x)          (*(vuint32*)(0xFC045008 + ((x)*0x020)))     
#define MCF_EDMA_TCD_SLAST(x)           (*(vuint32*)(0xFC04500C + ((x)*0x020)))     
#define MCF_EDMA_TCD_DADDR(x)           (*(vuint32*)(0xFC045010 + ((x)*0x020)))     
#define MCF_EDMA_TCD_CITER_ELINK(x)     (*(vuint16*)(0xFC045014 + ((x)*0x020)))     
#define MCF_EDMA_TCD_CITER(x)           (*(vuint16*)(0xFC045014 + ((x)*0x020)))     
#define MCF_EDMA_TCD_DOFF(x)            (*(vuint16*)(0xFC045016 + ((x)*0x020)))     
#define MCF_EDMA_TCD_DLAST_SGA(x)       (*(vuint32*)(0xFC045018 + ((x)*0x020)))     
#define MCF_EDMA_TCD_BITER_ELINK(x)     (*(vuint16*)(0xFC04501C + ((x)*0x020)))     
#define MCF_EDMA_TCD_BITER(x)           (*(vuint16*)(0xFC04501C + ((x)*0x020)))     
#define MCF_EDMA_TCD_CSR(x)             (*(vuint16*)(0xFC04501E + ((x)*0x020)))     

/* Bit definitions and macros for CR */