📄 mcf5445x_fec.h
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#define MCF_FEC_FRBR(x) (*(vuint32*)(0xFC03014C + ((x)*0x4000))) #define MCF_FEC_FRSR(x) (*(vuint32*)(0xFC030150 + ((x)*0x4000))) #define MCF_FEC_ERDSR(x) (*(vuint32*)(0xFC030180 + ((x)*0x4000))) #define MCF_FEC_ETDSR(x) (*(vuint32*)(0xFC030184 + ((x)*0x4000))) #define MCF_FEC_EMRBR(x) (*(vuint32*)(0xFC030188 + ((x)*0x4000))) #define MCF_FEC_RMON_T_DROP(x) (*(vuint32*)(0xFC030200 + ((x)*0x4000))) #define MCF_FEC_RMON_T_PACKETS(x) (*(vuint32*)(0xFC030204 + ((x)*0x4000))) #define MCF_FEC_RMON_T_BC_PKT(x) (*(vuint32*)(0xFC030208 + ((x)*0x4000))) #define MCF_FEC_RMON_T_MC_PKT(x) (*(vuint32*)(0xFC03020C + ((x)*0x4000))) #define MCF_FEC_RMON_T_CRC_ALIGN(x) (*(vuint32*)(0xFC030210 + ((x)*0x4000))) #define MCF_FEC_RMON_T_UNDERSIZE(x) (*(vuint32*)(0xFC030214 + ((x)*0x4000))) #define MCF_FEC_RMON_T_OVERSIZE(x) (*(vuint32*)(0xFC030218 + ((x)*0x4000))) #define MCF_FEC_RMON_T_FRAG(x) (*(vuint32*)(0xFC03021C + ((x)*0x4000))) #define MCF_FEC_RMON_T_JAB(x) (*(vuint32*)(0xFC030220 + ((x)*0x4000))) #define MCF_FEC_RMON_T_COL(x) (*(vuint32*)(0xFC030224 + ((x)*0x4000))) #define MCF_FEC_RMON_T_P64(x) (*(vuint32*)(0xFC030228 + ((x)*0x4000))) #define MCF_FEC_RMON_T_P65TO127(x) (*(vuint32*)(0xFC03022C + ((x)*0x4000))) #define MCF_FEC_RMON_T_P128TO255(x) (*(vuint32*)(0xFC030230 + ((x)*0x4000))) #define MCF_FEC_RMON_T_P256TO511(x) (*(vuint32*)(0xFC030234 + ((x)*0x4000))) #define MCF_FEC_RMON_T_P512TO1023(x) (*(vuint32*)(0xFC030238 + ((x)*0x4000))) #define MCF_FEC_RMON_T_P1024TO2047(x) (*(vuint32*)(0xFC03023C + ((x)*0x4000))) #define MCF_FEC_RMON_T_P_GTE2048(x) (*(vuint32*)(0xFC030240 + ((x)*0x4000))) #define MCF_FEC_RMON_T_OCTETS(x) (*(vuint32*)(0xFC030244 + ((x)*0x4000))) #define MCF_FEC_IEEE_T_DROP(x) (*(vuint32*)(0xFC030248 + ((x)*0x4000))) #define MCF_FEC_IEEE_T_FRAME_OK(x) (*(vuint32*)(0xFC03024C + ((x)*0x4000))) #define MCF_FEC_IEEE_T_1COL(x) (*(vuint32*)(0xFC030250 + ((x)*0x4000))) #define MCF_FEC_IEEE_T_MCOL(x) (*(vuint32*)(0xFC030254 + ((x)*0x4000))) #define MCF_FEC_IEEE_T_DEF(x) (*(vuint32*)(0xFC030258 + ((x)*0x4000))) #define MCF_FEC_IEEE_T_LCOL(x) (*(vuint32*)(0xFC03025C + ((x)*0x4000))) #define MCF_FEC_IEEE_T_EXCOL(x) (*(vuint32*)(0xFC030260 + ((x)*0x4000))) #define MCF_FEC_IEEE_T_MACERR(x) (*(vuint32*)(0xFC030264 + ((x)*0x4000))) #define MCF_FEC_IEEE_T_CSERR(x) (*(vuint32*)(0xFC030268 + ((x)*0x4000))) #define MCF_FEC_IEEE_T_SQE(x) (*(vuint32*)(0xFC03026C + ((x)*0x4000))) #define MCF_FEC_IEEE_T_FDXFC(x) (*(vuint32*)(0xFC030270 + ((x)*0x4000))) #define MCF_FEC_IEEE_T_OCTETS_OK(x) (*(vuint32*)(0xFC030274 + ((x)*0x4000))) #define MCF_FEC_RMON_R_PACKETS(x) (*(vuint32*)(0xFC030284 + ((x)*0x4000))) #define MCF_FEC_RMON_R_BC_PKT(x) (*(vuint32*)(0xFC030288 + ((x)*0x4000))) #define MCF_FEC_RMON_R_MC_PKT(x) (*(vuint32*)(0xFC03028C + ((x)*0x4000))) #define MCF_FEC_RMON_R_CRC_ALIGN(x) (*(vuint32*)(0xFC030290 + ((x)*0x4000))) #define MCF_FEC_RMON_R_UNDERSIZE(x) (*(vuint32*)(0xFC030294 + ((x)*0x4000))) #define MCF_FEC_RMON_R_OVERSIZE(x) (*(vuint32*)(0xFC030298 + ((x)*0x4000))) #define MCF_FEC_RMON_R_FRAG(x) (*(vuint32*)(0xFC03029C + ((x)*0x4000))) #define MCF_FEC_RMON_R_JAB(x) (*(vuint32*)(0xFC0302A0 + ((x)*0x4000))) #define MCF_FEC_RMON_R_RESVD_0(x) (*(vuint32*)(0xFC0302A4 + ((x)*0x4000))) #define MCF_FEC_RMON_R_P64(x) (*(vuint32*)(0xFC0302A8 + ((x)*0x4000))) #define MCF_FEC_RMON_R_P65TO127(x) (*(vuint32*)(0xFC0302AC + ((x)*0x4000))) #define MCF_FEC_RMON_R_P128TO255(x) (*(vuint32*)(0xFC0302B0 + ((x)*0x4000))) #define MCF_FEC_RMON_R_P256TO511(x) (*(vuint32*)(0xFC0302B4 + ((x)*0x4000))) #define MCF_FEC_RMON_R_512TO1023(x) (*(vuint32*)(0xFC0302B8 + ((x)*0x4000))) #define MCF_FEC_RMON_R_1024TO2047(x) (*(vuint32*)(0xFC0302BC + ((x)*0x4000))) #define MCF_FEC_RMON_R_P_GTE2048(x) (*(vuint32*)(0xFC0302C0 + ((x)*0x4000))) #define MCF_FEC_RMON_R_OCTETS(x) (*(vuint32*)(0xFC0302C4 + ((x)*0x4000))) #define MCF_FEC_IEEE_R_DROP(x) (*(vuint32*)(0xFC0302C8 + ((x)*0x4000))) #define MCF_FEC_IEEE_R_FRAME_OK(x) (*(vuint32*)(0xFC0302CC + ((x)*0x4000))) #define MCF_FEC_IEEE_R_CRC(x) (*(vuint32*)(0xFC0302D0 + ((x)*0x4000))) #define MCF_FEC_IEEE_R_ALIGN(x) (*(vuint32*)(0xFC0302D4 + ((x)*0x4000))) #define MCF_FEC_IEEE_R_MACERR(x) (*(vuint32*)(0xFC0302D8 + ((x)*0x4000))) #define MCF_FEC_IEEE_R_FDXFC(x) (*(vuint32*)(0xFC0302DC + ((x)*0x4000))) #define MCF_FEC_IEEE_R_OCTETS_OK(x) (*(vuint32*)(0xFC0302E0 + ((x)*0x4000))) /* Bit definitions and macros for EIR */#define MCF_FEC_EIR_UN (0x00080000) #define MCF_FEC_EIR_RL (0x00100000) #define MCF_FEC_EIR_LC (0x00200000) #define MCF_FEC_EIR_EBERR (0x00400000) #define MCF_FEC_EIR_MII (0x00800000) #define MCF_FEC_EIR_RXB (0x01000000) #define MCF_FEC_EIR_RXF (0x02000000) #define MCF_FEC_EIR_TXB (0x04000000) #define MCF_FEC_EIR_TXF (0x08000000) #define MCF_FEC_EIR_GRA (0x10000000) #define MCF_FEC_EIR_BABT (0x20000000) #define MCF_FEC_EIR_BABR (0x40000000) #define MCF_FEC_EIR_HBERR (0x80000000) #define MCF_FEC_EIR_CLEAR_ALL (0xFFFFFFFF) /* Bit definitions and macros for EIMR */#define MCF_FEC_EIMR_UN (0x00080000) #define MCF_FEC_EIMR_RL (0x00100000) #define MCF_FEC_EIMR_LC (0x00200000) #define MCF_FEC_EIMR_EBERR (0x00400000) #define MCF_FEC_EIMR_MII (0x00800000) #define MCF_FEC_EIMR_RXB (0x01000000) #define MCF_FEC_EIMR_RXF (0x02000000) #define MCF_FEC_EIMR_TXB (0x04000000) #define MCF_FEC_EIMR_TXF (0x08000000) #define MCF_FEC_EIMR_GRA (0x10000000) #define MCF_FEC_EIMR_BABT (0x20000000) #define MCF_FEC_EIMR_BABR (0x40000000) #define MCF_FEC_EIMR_HBERR (0x80000000) #define MCF_FEC_EIMR_MASK_ALL (0x00000000) #define MCF_FEC_EIMR_UNMASK_ALL (0xFFFFFFFF) /* Bit definitions and macros for RDAR */#define MCF_FEC_RDAR_R_DES_ACTIVE (0x01000000) /* Bit definitions and macros for TDAR */#define MCF_FEC_TDAR_X_DES_ACTIVE (0x01000000) /* Bit definitions and macros for ECR */#define MCF_FEC_ECR_RESET (0x00000001) #define MCF_FEC_ECR_ETHER_EN (0x00000002) /* Bit definitions and macros for MMFR */#define MCF_FEC_MMFR_DATA(x) (((x)&0x0000FFFF)) #define MCF_FEC_MMFR_TA(x) (((x)&0x00000003)<<16) #define MCF_FEC_MMFR_RA(x) (((x)&0x0000001F)<<18) #define MCF_FEC_MMFR_PA(x) (((x)&0x0000001F)<<23) #define MCF_FEC_MMFR_OP(x) (((x)&0x00000003)<<28) #define MCF_FEC_MMFR_ST(x) (((x)&0x00000003)<<30) #define MCF_FEC_MMFR_ST_01 (0x40000000) #define MCF_FEC_MMFR_OP_READ (0x20000000) #define MCF_FEC_MMFR_OP_WRITE (0x10000000) #define MCF_FEC_MMFR_TA_10 (0x00020000) /* Bit definitions and macros for MSCR */#define MCF_FEC_MSCR_MII_SPEED(x) (((x)&0x0000003F)<<1) #define MCF_FEC_MSCR_DIS_PREAMBLE (0x00000080) /* Bit definitions and macros for MIBC */#define MCF_FEC_MIBC_MIB_IDLE (0x40000000) #define MCF_FEC_MIBC_MIB_DISABLE (0x80000000) /* Bit definitions and macros for RCR */#define MCF_FEC_RCR_LOOP (0x00000001) #define MCF_FEC_RCR_DRT (0x00000002) #define MCF_FEC_RCR_MII_MODE (0x00000004) #define MCF_FEC_RCR_PROM (0x00000008) #define MCF_FEC_RCR_BC_REJ (0x00000010) #define MCF_FEC_RCR_FCE (0x00000020) #define MCF_FEC_RCR_RMII_MODE (0x00000100) #define MCF_FEC_RCR_RMII_10T (0x00000200) #define MCF_FEC_RCR_RMII_LOOP (0x00000400) #define MCF_FEC_RCR_RMII_ECHO (0x00000800) #define MCF_FEC_RCR_MAX_FL(x) (((x)&0x000007FF)<<16) /* Bit definitions and macros for TCR */#define MCF_FEC_TCR_GTS (0x00000001) #define MCF_FEC_TCR_HBC (0x00000002) #define MCF_FEC_TCR_FDEN (0x00000004) #define MCF_FEC_TCR_TFC_PAUSE (0x00000008) #define MCF_FEC_TCR_RFC_PAUSE (0x00000010) /* Bit definitions and macros for PALR */#define MCF_FEC_PALR_PADDR1(x) (x) /* Bit definitions and macros for PAUR */#define MCF_FEC_PAUR_TYPE(x) (((x)&0x0000FFFF)) #define MCF_FEC_PAUR_PADDR2(x) (((x)&0x0000FFFF)<<16) /* Bit definitions and macros for OPD */#define MCF_FEC_OPD_PAUSE_DUR(x) (((x)&0x0000FFFF)) #define MCF_FEC_OPD_OPCODE(x) (((x)&0x0000FFFF)<<16) /* Bit definitions and macros for IAUR */#define MCF_FEC_IAUR_IADDR1(x) (x) /* Bit definitions and macros for IALR */#define MCF_FEC_IALR_IADDR2(x) (x) /* Bit definitions and macros for GAUR */#define MCF_FEC_GAUR_GADDR1(x) (x) /* Bit definitions and macros for GALR */#define MCF_FEC_GALR_GADDR2(x) (x) /* Bit definitions and macros for TFWR */#define MCF_FEC_TFWR_X_WMRK(x) (((x)&0x00000003)) /* Bit definitions and macros for FRBR */#define MCF_FEC_FRBR_R_BOUND(x) (((x)&0x000000FF)<<2) /* Bit definitions and macros for FRSR */#define MCF_FEC_FRSR_R_FSTART(x) (((x)&0x000000FF)<<2) /* Bit definitions and macros for ERDSR */#define MCF_FEC_ERDSR_R_DES_START(x) (((x)&0x3FFFFFFF)<<2) /* Bit definitions and macros for ETDSR */#define MCF_FEC_ETDSR_X_DES_START(x) (((x)&0x3FFFFFFF)<<2) /* Bit definitions and macros for EMRBR */#define MCF_FEC_EMRBR_R_BUF_SIZE(x) (((x)&0x0000007F)<<4) /********************************************************************/#endif /* __MCF5445X_FEC_H__ */⌨️ 快捷键说明
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