mcf5445x_fec.h

Freescale MCF5445evb 参考测试代码

/*
 * File:    mcf5445x_fec.h
 * Purpose: Register and bit definitions
 */

#ifndef __MCF5445X_FEC_H__
#define __MCF5445X_FEC_H__

/*********************************************************************
*
* Fast Ethernet Controller (FEC)
*
*********************************************************************/

/* Register read/write macros */
#define MCF_FEC0_EIR                    (*(vuint32*)(0xFC030004))   
#define MCF_FEC0_EIMR                   (*(vuint32*)(0xFC030008))   
#define MCF_FEC0_RDAR                   (*(vuint32*)(0xFC030010))   
#define MCF_FEC0_TDAR                   (*(vuint32*)(0xFC030014))   
#define MCF_FEC0_ECR                    (*(vuint32*)(0xFC030024))   
#define MCF_FEC0_MMFR                   (*(vuint32*)(0xFC030040))   
#define MCF_FEC0_MSCR                   (*(vuint32*)(0xFC030044))   
#define MCF_FEC0_MIBC                   (*(vuint32*)(0xFC030064))   
#define MCF_FEC0_RCR                    (*(vuint32*)(0xFC030084))   
#define MCF_FEC0_TCR                    (*(vuint32*)(0xFC0300C4))   
#define MCF_FEC0_PALR                   (*(vuint32*)(0xFC0300E4))   
#define MCF_FEC0_PAUR                   (*(vuint32*)(0xFC0300E8))   
#define MCF_FEC0_OPD                    (*(vuint32*)(0xFC0300EC))   
#define MCF_FEC0_IAUR                   (*(vuint32*)(0xFC030118))   
#define MCF_FEC0_IALR                   (*(vuint32*)(0xFC03011C))   
#define MCF_FEC0_GAUR                   (*(vuint32*)(0xFC030120))   
#define MCF_FEC0_GALR                   (*(vuint32*)(0xFC030124))   
#define MCF_FEC0_TFWR                   (*(vuint32*)(0xFC030144))   
#define MCF_FEC0_FRBR                   (*(vuint32*)(0xFC03014C))   
#define MCF_FEC0_FRSR                   (*(vuint32*)(0xFC030150))   
#define MCF_FEC0_ERDSR                  (*(vuint32*)(0xFC030180))   
#define MCF_FEC0_ETDSR                  (*(vuint32*)(0xFC030184))   
#define MCF_FEC0_EMRBR                  (*(vuint32*)(0xFC030188))   
#define MCF_FEC0_RMON_T_DROP            (*(vuint32*)(0xFC030200))   
#define MCF_FEC0_RMON_T_PACKETS         (*(vuint32*)(0xFC030204))   
#define MCF_FEC0_RMON_T_BC_PKT          (*(vuint32*)(0xFC030208))   
#define MCF_FEC0_RMON_T_MC_PKT          (*(vuint32*)(0xFC03020C))   
#define MCF_FEC0_RMON_T_CRC_ALIGN       (*(vuint32*)(0xFC030210))   
#define MCF_FEC0_RMON_T_UNDERSIZE       (*(vuint32*)(0xFC030214))   
#define MCF_FEC0_RMON_T_OVERSIZE        (*(vuint32*)(0xFC030218))   
#define MCF_FEC0_RMON_T_FRAG            (*(vuint32*)(0xFC03021C))   
#define MCF_FEC0_RMON_T_JAB             (*(vuint32*)(0xFC030220))   
#define MCF_FEC0_RMON_T_COL             (*(vuint32*)(0xFC030224))   
#define MCF_FEC0_RMON_T_P64             (*(vuint32*)(0xFC030228))   
#define MCF_FEC0_RMON_T_P65TO127        (*(vuint32*)(0xFC03022C))   
#define MCF_FEC0_RMON_T_P128TO255       (*(vuint32*)(0xFC030230))   
#define MCF_FEC0_RMON_T_P256TO511       (*(vuint32*)(0xFC030234))   
#define MCF_FEC0_RMON_T_P512TO1023      (*(vuint32*)(0xFC030238))   
#define MCF_FEC0_RMON_T_P1024TO2047     (*(vuint32*)(0xFC03023C))   
#define MCF_FEC0_RMON_T_P_GTE2048       (*(vuint32*)(0xFC030240))   
#define MCF_FEC0_RMON_T_OCTETS          (*(vuint32*)(0xFC030244))   
#define MCF_FEC0_IEEE_T_DROP            (*(vuint32*)(0xFC030248))   
#define MCF_FEC0_IEEE_T_FRAME_OK        (*(vuint32*)(0xFC03024C))   
#define MCF_FEC0_IEEE_T_1COL            (*(vuint32*)(0xFC030250))   
#define MCF_FEC0_IEEE_T_MCOL            (*(vuint32*)(0xFC030254))   
#define MCF_FEC0_IEEE_T_DEF             (*(vuint32*)(0xFC030258))   
#define MCF_FEC0_IEEE_T_LCOL            (*(vuint32*)(0xFC03025C))   
#define MCF_FEC0_IEEE_T_EXCOL           (*(vuint32*)(0xFC030260))   
#define MCF_FEC0_IEEE_T_MACERR          (*(vuint32*)(0xFC030264))   
#define MCF_FEC0_IEEE_T_CSERR           (*(vuint32*)(0xFC030268))   
#define MCF_FEC0_IEEE_T_SQE             (*(vuint32*)(0xFC03026C))   
#define MCF_FEC0_IEEE_T_FDXFC           (*(vuint32*)(0xFC030270))   
#define MCF_FEC0_IEEE_T_OCTETS_OK       (*(vuint32*)(0xFC030274))   
#define MCF_FEC0_RMON_R_PACKETS         (*(vuint32*)(0xFC030284))   
#define MCF_FEC0_RMON_R_BC_PKT          (*(vuint32*)(0xFC030288))   
#define MCF_FEC0_RMON_R_MC_PKT          (*(vuint32*)(0xFC03028C))   
#define MCF_FEC0_RMON_R_CRC_ALIGN       (*(vuint32*)(0xFC030290))   
#define MCF_FEC0_RMON_R_UNDERSIZE       (*(vuint32*)(0xFC030294))   
#define MCF_FEC0_RMON_R_OVERSIZE        (*(vuint32*)(0xFC030298))   
#define MCF_FEC0_RMON_R_FRAG            (*(vuint32*)(0xFC03029C))   
#define MCF_FEC0_RMON_R_JAB             (*(vuint32*)(0xFC0302A0))   
#define MCF_FEC0_RMON_R_RESVD_0         (*(vuint32*)(0xFC0302A4))   
#define MCF_FEC0_RMON_R_P64             (*(vuint32*)(0xFC0302A8))   
#define MCF_FEC0_RMON_R_P65TO127        (*(vuint32*)(0xFC0302AC))   
#define MCF_FEC0_RMON_R_P128TO255       (*(vuint32*)(0xFC0302B0))   
#define MCF_FEC0_RMON_R_P256TO511       (*(vuint32*)(0xFC0302B4))   
#define MCF_FEC0_RMON_R_512TO1023       (*(vuint32*)(0xFC0302B8))   
#define MCF_FEC0_RMON_R_1024TO2047      (*(vuint32*)(0xFC0302BC))   
#define MCF_FEC0_RMON_R_P_GTE2048       (*(vuint32*)(0xFC0302C0))   
#define MCF_FEC0_RMON_R_OCTETS          (*(vuint32*)(0xFC0302C4))   
#define MCF_FEC0_IEEE_R_DROP            (*(vuint32*)(0xFC0302C8))   
#define MCF_FEC0_IEEE_R_FRAME_OK        (*(vuint32*)(0xFC0302CC))   
#define MCF_FEC0_IEEE_R_CRC             (*(vuint32*)(0xFC0302D0))   
#define MCF_FEC0_IEEE_R_ALIGN           (*(vuint32*)(0xFC0302D4))   
#define MCF_FEC0_IEEE_R_MACERR          (*(vuint32*)(0xFC0302D8))   
#define MCF_FEC0_IEEE_R_FDXFC           (*(vuint32*)(0xFC0302DC))   
#define MCF_FEC0_IEEE_R_OCTETS_OK       (*(vuint32*)(0xFC0302E0))   
#define MCF_FEC1_EIR                    (*(vuint32*)(0xFC034004))   
#define MCF_FEC1_EIMR                   (*(vuint32*)(0xFC034008))   
#define MCF_FEC1_RDAR                   (*(vuint32*)(0xFC034010))   
#define MCF_FEC1_TDAR                   (*(vuint32*)(0xFC034014))   
#define MCF_FEC1_ECR                    (*(vuint32*)(0xFC034024))   
#define MCF_FEC1_MMFR                   (*(vuint32*)(0xFC034040))   
#define MCF_FEC1_MSCR                   (*(vuint32*)(0xFC034044))   
#define MCF_FEC1_MIBC                   (*(vuint32*)(0xFC034064))   
#define MCF_FEC1_RCR                    (*(vuint32*)(0xFC034084))   
#define MCF_FEC1_TCR                    (*(vuint32*)(0xFC0340C4))   
#define MCF_FEC1_PALR                   (*(vuint32*)(0xFC0340E4))   
#define MCF_FEC1_PAUR                   (*(vuint32*)(0xFC0340E8))   
#define MCF_FEC1_OPD                    (*(vuint32*)(0xFC0340EC))   
#define MCF_FEC1_IAUR                   (*(vuint32*)(0xFC034118))   
#define MCF_FEC1_IALR                   (*(vuint32*)(0xFC03411C))   
#define MCF_FEC1_GAUR                   (*(vuint32*)(0xFC034120))   
#define MCF_FEC1_GALR                   (*(vuint32*)(0xFC034124))   
#define MCF_FEC1_TFWR                   (*(vuint32*)(0xFC034144))   
#define MCF_FEC1_FRBR                   (*(vuint32*)(0xFC03414C))   
#define MCF_FEC1_FRSR                   (*(vuint32*)(0xFC034150))   
#define MCF_FEC1_ERDSR                  (*(vuint32*)(0xFC034180))   
#define MCF_FEC1_ETDSR                  (*(vuint32*)(0xFC034184))   
#define MCF_FEC1_EMRBR                  (*(vuint32*)(0xFC034188))   
#define MCF_FEC1_RMON_T_DROP            (*(vuint32*)(0xFC034200))   
#define MCF_FEC1_RMON_T_PACKETS         (*(vuint32*)(0xFC034204))   
#define MCF_FEC1_RMON_T_BC_PKT          (*(vuint32*)(0xFC034208))   
#define MCF_FEC1_RMON_T_MC_PKT          (*(vuint32*)(0xFC03420C))   
#define MCF_FEC1_RMON_T_CRC_ALIGN       (*(vuint32*)(0xFC034210))   
#define MCF_FEC1_RMON_T_UNDERSIZE       (*(vuint32*)(0xFC034214))   
#define MCF_FEC1_RMON_T_OVERSIZE        (*(vuint32*)(0xFC034218))   
#define MCF_FEC1_RMON_T_FRAG            (*(vuint32*)(0xFC03421C))   
#define MCF_FEC1_RMON_T_JAB             (*(vuint32*)(0xFC034220))   
#define MCF_FEC1_RMON_T_COL             (*(vuint32*)(0xFC034224))   
#define MCF_FEC1_RMON_T_P64             (*(vuint32*)(0xFC034228))   
#define MCF_FEC1_RMON_T_P65TO127        (*(vuint32*)(0xFC03422C))   
#define MCF_FEC1_RMON_T_P128TO255       (*(vuint32*)(0xFC034230))   
#define MCF_FEC1_RMON_T_P256TO511       (*(vuint32*)(0xFC034234))   
#define MCF_FEC1_RMON_T_P512TO1023      (*(vuint32*)(0xFC034238))   
#define MCF_FEC1_RMON_T_P1024TO2047     (*(vuint32*)(0xFC03423C))   
#define MCF_FEC1_RMON_T_P_GTE2048       (*(vuint32*)(0xFC034240))   
#define MCF_FEC1_RMON_T_OCTETS          (*(vuint32*)(0xFC034244))   
#define MCF_FEC1_IEEE_T_DROP            (*(vuint32*)(0xFC034248))   
#define MCF_FEC1_IEEE_T_FRAME_OK        (*(vuint32*)(0xFC03424C))   
#define MCF_FEC1_IEEE_T_1COL            (*(vuint32*)(0xFC034250))   
#define MCF_FEC1_IEEE_T_MCOL            (*(vuint32*)(0xFC034254))   
#define MCF_FEC1_IEEE_T_DEF             (*(vuint32*)(0xFC034258))   
#define MCF_FEC1_IEEE_T_LCOL            (*(vuint32*)(0xFC03425C))   
#define MCF_FEC1_IEEE_T_EXCOL           (*(vuint32*)(0xFC034260))   
#define MCF_FEC1_IEEE_T_MACERR          (*(vuint32*)(0xFC034264))   
#define MCF_FEC1_IEEE_T_CSERR           (*(vuint32*)(0xFC034268))   
#define MCF_FEC1_IEEE_T_SQE             (*(vuint32*)(0xFC03426C))   
#define MCF_FEC1_IEEE_T_FDXFC           (*(vuint32*)(0xFC034270))   
#define MCF_FEC1_IEEE_T_OCTETS_OK       (*(vuint32*)(0xFC034274))   
#define MCF_FEC1_RMON_R_PACKETS         (*(vuint32*)(0xFC034284))   
#define MCF_FEC1_RMON_R_BC_PKT          (*(vuint32*)(0xFC034288))   
#define MCF_FEC1_RMON_R_MC_PKT          (*(vuint32*)(0xFC03428C))   
#define MCF_FEC1_RMON_R_CRC_ALIGN       (*(vuint32*)(0xFC034290))   
#define MCF_FEC1_RMON_R_UNDERSIZE       (*(vuint32*)(0xFC034294))   
#define MCF_FEC1_RMON_R_OVERSIZE        (*(vuint32*)(0xFC034298))   
#define MCF_FEC1_RMON_R_FRAG            (*(vuint32*)(0xFC03429C))   
#define MCF_FEC1_RMON_R_JAB             (*(vuint32*)(0xFC0342A0))   
#define MCF_FEC1_RMON_R_RESVD_0         (*(vuint32*)(0xFC0342A4))   
#define MCF_FEC1_RMON_R_P64             (*(vuint32*)(0xFC0342A8))   
#define MCF_FEC1_RMON_R_P65TO127        (*(vuint32*)(0xFC0342AC))   
#define MCF_FEC1_RMON_R_P128TO255       (*(vuint32*)(0xFC0342B0))   
#define MCF_FEC1_RMON_R_P256TO511       (*(vuint32*)(0xFC0342B4))   
#define MCF_FEC1_RMON_R_512TO1023       (*(vuint32*)(0xFC0342B8))   
#define MCF_FEC1_RMON_R_1024TO2047      (*(vuint32*)(0xFC0342BC))   
#define MCF_FEC1_RMON_R_P_GTE2048       (*(vuint32*)(0xFC0342C0))   
#define MCF_FEC1_RMON_R_OCTETS          (*(vuint32*)(0xFC0342C4))   
#define MCF_FEC1_IEEE_R_DROP            (*(vuint32*)(0xFC0342C8))   
#define MCF_FEC1_IEEE_R_FRAME_OK        (*(vuint32*)(0xFC0342CC))   
#define MCF_FEC1_IEEE_R_CRC             (*(vuint32*)(0xFC0342D0))   
#define MCF_FEC1_IEEE_R_ALIGN           (*(vuint32*)(0xFC0342D4))   
#define MCF_FEC1_IEEE_R_MACERR          (*(vuint32*)(0xFC0342D8))   
#define MCF_FEC1_IEEE_R_FDXFC           (*(vuint32*)(0xFC0342DC))   
#define MCF_FEC1_IEEE_R_OCTETS_OK       (*(vuint32*)(0xFC0342E0))   

/* Parameterized register read/write macros for multiple modules */
#define MCF_FEC_EIR(x)                  (*(vuint32*)(0xFC030004 + ((x)*0x4000)))    
#define MCF_FEC_EIMR(x)                 (*(vuint32*)(0xFC030008 + ((x)*0x4000)))    
#define MCF_FEC_RDAR(x)                 (*(vuint32*)(0xFC030010 + ((x)*0x4000)))    
#define MCF_FEC_TDAR(x)                 (*(vuint32*)(0xFC030014 + ((x)*0x4000)))    
#define MCF_FEC_ECR(x)                  (*(vuint32*)(0xFC030024 + ((x)*0x4000)))    
#define MCF_FEC_MMFR(x)                 (*(vuint32*)(0xFC030040 + ((x)*0x4000)))    
#define MCF_FEC_MSCR(x)                 (*(vuint32*)(0xFC030044 + ((x)*0x4000)))    
#define MCF_FEC_MIBC(x)                 (*(vuint32*)(0xFC030064 + ((x)*0x4000)))    
#define MCF_FEC_RCR(x)                  (*(vuint32*)(0xFC030084 + ((x)*0x4000)))    
#define MCF_FEC_TCR(x)                  (*(vuint32*)(0xFC0300C4 + ((x)*0x4000)))    
#define MCF_FEC_PALR(x)                 (*(vuint32*)(0xFC0300E4 + ((x)*0x4000)))    
#define MCF_FEC_PAUR(x)                 (*(vuint32*)(0xFC0300E8 + ((x)*0x4000)))    
#define MCF_FEC_OPD(x)                  (*(vuint32*)(0xFC0300EC + ((x)*0x4000)))    
#define MCF_FEC_IAUR(x)                 (*(vuint32*)(0xFC030118 + ((x)*0x4000)))    
#define MCF_FEC_IALR(x)                 (*(vuint32*)(0xFC03011C + ((x)*0x4000)))    
#define MCF_FEC_GAUR(x)                 (*(vuint32*)(0xFC030120 + ((x)*0x4000)))    
#define MCF_FEC_GALR(x)                 (*(vuint32*)(0xFC030124 + ((x)*0x4000)))    
#define MCF_FEC_TFWR(x)                 (*(vuint32*)(0xFC030144 + ((x)*0x4000)))