ssi.h

Freescale MCF5445evb 参考测试代码

/*!
 * \file    ssi.h
 * \brief   SSI Driver
 *
 * This driver provides an SSI initialization routine as well as the basic 
 * codec I/O functions
 *
 * \version $Revision: 1.1 $
 * \author  Adam Sochacki
 */
/********************************************************************/
/*!
 * \brief   SSI Configuration Information
 * 
 * This structure is used to pass SSI configuration information to
 * the the SSI driver.
 */

#ifndef _SSI_H_
#define _SSI_H_


/* TLV320DAC23 audio chip registers */

#define CODEC_LEFT_IN_REG			(uint8)	0x00
#define CODEC_RIGHT_IN_REG			(uint8)	0x01
#define CODEC_LEFT_HP_VOL_REG		(uint8)	0x02
#define CODEC_RIGHT_HP_VOL_REG	(uint8)	0x03
#define CODEC_ANALOG_APATH_REG	(uint8)	0x04
#define CODEC_DIGITAL_APATH_REG	(uint8)	0x05
#define CODEC_POWER_DOWN_REG	(uint8)	0x06
#define CODEC_DIGITAL_IF_FMT_REG	(uint8)	0x07
#define CODEC_SAMPLE_RATE_REG	(uint8)	0x08
#define CODEC_DIGITAL_IF_ACT_REG	(uint8)	0x09
#define CODEC_RESET_REG			(uint8)	0x0F

#define CODEC_SAMPLE_8KHZ			0x00C
#define CODEC_SAMPLE_16KHZ		0x058
#define CODEC_SAMPLE_22KHZ		0x062
#define CODEC_SAMPLE_32KHZ		0x018
#define CODEC_SAMPLE_44KHZ		0x022
#define CODEC_SAMPLE_48KHZ		0x000 

#define SSI_BUFFER_SIZE	44000			/* buffers size must be multiple of fifo treshold level */


#define RX_FIFO_FILL	8	/* on how many words in Rx Fifo should we interrupt */
#define TX_FIFO_FILL	8	/* on how many free positions in Tx Fifo should we interrupt */

#define DMA_TCD_RX0 9
#define DMA_TCD_RX1 10
#define DMA_TCD_TX0 11
#define DMA_TCD_TX1 12


//#define POOLING
#define INTERUPTS
//#define DMA
//#define METH1
#define METH2
#define FIFOS

#define FCLK_47kHz  32
#define FCLK_50kHz  30



uint16 codec_init_data []=
						{
(	((CODEC_LEFT_IN_REG & 0x7F)<<9)			|	(0x017 	& 0x1FF)),  /// Activate left line in 
(	((CODEC_RIGHT_IN_REG & 0x7F)<<9)		|	(0x017 	& 0x1FF)), // Activate right line in 
(	((CODEC_POWER_DOWN_REG & 0x7F)<<9)	|	(0x000 	& 0x1FF)),  //// Turn on all 
(	((CODEC_DIGITAL_IF_FMT_REG & 0x7F)<<9)	|	(0x00A 	& 0x1FF)),  //  I2S slave mode, 16 bit,R-ch on - LRCIN high
(	((CODEC_DIGITAL_APATH_REG & 0x7F)<<9)	|	(0x007 	& 0x1FF)), // Set A path 
(	((CODEC_SAMPLE_RATE_REG & 0x7F)<<9)	|	(0x000 	& 0x1FF)),  // set sample rate
(	((CODEC_LEFT_HP_VOL_REG & 0x7F)<<9)	|	(0x075 	& 0x1FF)), // set volume
(	((CODEC_RIGHT_HP_VOL_REG & 0x7F)<<9)	|	(0x075 	& 0x1FF)),// set volume
(	((CODEC_DIGITAL_IF_ACT_REG & 0x7F)<<9)	|	(0x001 	& 0x1FF)) // Activate digital interface 
						};
 
 
 void enable_ssi(void);
 void disable_ssi(void);
 void	dspi_init_ssi(void);
 void dspi_init(void);
 void	chip_init(void);
 void	init_ssi(void);
 void	init_codec(void);
 void dspi_tx(uint16, uint8, uint8);
 void init_dma (void); 
__interrupt__ void audio_isr(void);
void audio_dmaisr (void);
void start_dma (void);

void dma_RX0_isr (void);
void dma_RX1_isr (void);
void dma_TX0_isr (void);
void dma_TX1_isr (void);
void link_audio_dma_channels (void);

#endif