📄 pci.c
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/*** ===================================================================** File: pci.c**** Description: This File contains functions to test and validate ** the PCI module for Rigoletto on the Verdi ** validation board.**** ===================================================================*/#include "common.h"#include "pcihdr.h"#include "pci.h"/*#include "dma/dma.h"*/#define STATUS intextern char targ0;extern char targ1;extern char targ2;extern char targ3;extern char targ4;extern char targ5;int pciGetVendorName (pci_device * device, char **vendorshort, char **vendorfull);int pciGetDevName (pci_device * device, char **devname, char **devdesc);int pciGetClassName (pci_device * device, char **basedesc, char **subdesc, char **progdesc);int pciGetConfHeader (int slot, int fctnum, pci_device * device);typedef struct{ int pkt_start; int pkt_done; int dma_start; int dma_done; uint32 fifo_indx; uint32 dma_indx; uint32 length; uint8* src_indx; uint8* dst_indx; } DMATX_TASK;DMATX_TASK dmatx_task;typedef struct{ int pkt_start; int pkt_done; int dma_start; int dma_done; uint32 fifo_indx; uint32 dma_indx; uint32 length; uint8* src_indx; uint8* dst_indx; } DMARX_TASK;DMARX_TASK dmarx_task;/*** ===================================================================** Function : initPci**** Description : initializes the PCI Arbitor and PCI Controller **** Parameters : none** ** Return Value: none** ** ===================================================================*/void initPci(void){ int i; /* Set up the arbiter */ MCF_PCIARB_PACR = 0 // | MCF_PCIARB_PACR_PKMD | MCF_PCIARB_PACR_INTMPRI | MCF_PCIARB_PACR_INTMINTEN | MCF_PCIARB_PACR_EXTMPRI(0x1F) | MCF_PCIARB_PACR_EXTMINTEN(0x1F); #if 0 /* rtmtbd */ /* PCI Arbitor interrupt */ MCF_INTC_ICR41 = MCF_INTC_ICR_IL(5) | MCF_INTC_ICR_IP(3); /* Comm Bus PCI Interrupt */ MCF_INTC_ICR42 = MCF_INTC_ICR_IL(4) | MCF_INTC_ICR_IP(3); /* XLB PCI interrupt */ MCF_INTC_ICR43 = MCF_INTC_ICR_IL(6) | MCF_INTC_ICR_IP(3); /* unmask some interrupts */ /* clear bits 9,10,11 */ MCF_INTC_IMRH &= ~(0x00000E00); /* make sure bit 1 is clear */ MCF_INTC_IMRL &= ~(0x00000001);#endif #if 0 /* Set Max Write retries to 3 and enable some interrupts */ MCF_PCI_PCIICR = 0 | MCF_PCI_PCIICR_TAE | MCF_PCI_PCIICR_IAE | MCF_PCI_PCIICR_REE | MCF_PCI_PCIICR_MAXRETRY(3);#endif /* enable BG and BR signals */ MCF_GPIO_PAR_PCI = MCF_GPIO_PAR_PCI_GNT3_GNT3 | MCF_GPIO_PAR_PCI_GNT2_GNT2 | MCF_GPIO_PAR_PCI_GNT1_GNT1 | MCF_GPIO_PAR_PCI_GNT0_GNT0 | MCF_GPIO_PAR_PCI_REQ3_REQ3 | MCF_GPIO_PAR_PCI_REQ2_REQ2 | MCF_GPIO_PAR_PCI_REQ1_REQ1 | MCF_GPIO_PAR_PCI_REQ0_REQ0; /*MCF_CCM_CCR_360 |= MCF_CCM_CCR_360_PCIMODE | MCF_CCM_CCR_360_PCISLEW;*/// MCF_GPIO_MSCR_PCI = 0; /* try this setting for dbg - rtm */ /* set up initiator windows */ MCF_PCI_PCIIW0BTAR = (PCI_HOST_MEM & 0xFF000000); MCF_PCI_PCIIW1BTAR = (PCI_HOST_IO & 0xFF000000); MCF_PCI_PCIIW2BTAR = (PCI_HOST_CFG & 0xFF000000); MCF_PCI_PCIIWCR = 0 | MCF_PCI_PCIIWCR_WINCTRL0_MEMREAD | MCF_PCI_PCIIWCR_WINCTRL1_IO | MCF_PCI_PCIIWCR_WINCTRL2_IO; /* set up lat timer and other PCI hdr characteristics lat timer master enable*/ /* Set up Target registers */ MCF_PCI_PCISCR |= MCF_PCI_PCISCR_B | MCF_PCI_PCISCR_M | MCF_PCI_PCISCR_MW; /* tbd - this should probably be 4 */ MCF_PCI_PCICR1 = MCF_PCI_PCICR1_CACHELINESIZE(8); /*MCF_PCI_PCICR1 = MCF_PCI_PCICR1_CACHELINESIZE(4);*/ MCF_PCI_PCIBAR0 = PCI_TARG0_BAR0; /*MCF_PCI_PCIBAR1 = PCI_TARG0_BAR1;*/ MCF_PCI_PCIBAR4 = PCI_TARG0_BAR1; /*MCF_PCI_PCIBAR5 = PCI_TARG0_BAR1;*/ /*MCF_PCI_PCIBAR1 = 0xffffffff;*/ MCF_PCI_PCICR2 = 0x00000000; MCF_PCI_PCITBATR0 = SDRAM_ADDRESS | 1; /*MCF_PCI_PCITBATR4 = SDRAM_ADDRESS | 1;*/ MCF_PCI_PCITBATR4 = SDRAM_ADDRESS | 1; //mwn added 05/24/06 - prefetch reads MCF_PCI_PCITCR |= MCF_PCI_PCITCR_P; //MCF_PCI_PCITCR |= MCF_PCI_PCITCR_PID; //MCF_PCI_PCITCR |= MCF_PCI_PCITCR_PID | MCF_PCI_PCITCR_WCD; /* rtmtbd - need to enable specific windows, not sure if they are enabled out of reset, only enable the first two for now, but will need to test the rest later */ /*MCF_PCI_PCITCR2 = MCF_PCI_PCITCR2_B0E | MCF_PCI_PCITCR2_B4E;*/ MCF_PCI_PCITCR2 = MCF_PCI_PCITCR2_B0E | MCF_PCI_PCITCR2_B4E; /* deassert reset bit*/ MCF_PCI_PCIGSCR = 0; /* wait a some time */ printf("waiting for devices to reset...\n");#if 0 for(i=0;i<100000;i++);#else for(i=0;i<1000000;i++);#endif }/*** ===================================================================** Function : swap32**** Description : Utility function to byte swap an unsigned int**** Parameters** ---------- ** -data : 32-bit value to be byte swapped**** Return Value: 32-bit byte swapped data** ** ===================================================================*/unsigned int swap32(unsigned int data){ unsigned int swapped = 0; swapped |= data & 0x000000ff; swapped <<= 8; data >>= 8; swapped |= data & 0x000000ff; swapped <<= 8; data >>= 8; swapped |= data & 0x000000ff; swapped <<= 8; data >>= 8; swapped |= data & 0x000000ff; return(swapped);}/*** ===================================================================** Function : swap16**** Description : Utility function to byte swap an unsigned int**** Parameters** ---------- ** -data : 16-bit value to be byte swapped**** Return Value: 16-bit, byte swapped data** ** ===================================================================*/unsigned short swap16(unsigned short data){ unsigned short swapped = 0; swapped |= data & 0x000ff; swapped <<= 8; data >>= 8; swapped |= data & 0x000ff; return(swapped);}/*** ===================================================================** Function : pciInitDevices**** Description : Checks to see if anything is in each of the four ** Slots on the Verdi Board. If a device is found,** it configures the BAR registers 0 and 1 with pre-** defined values. This was done to simplify the ** initialization process. In a real system, the size** of the memory would be checked and addresses ** assigned by space required vs. space available. **** Parameters : none** ** Return Value: none** ** ===================================================================*/void pciInitDevices(void){ int i; unsigned int cfgID; /* turn off initiator abort interrupt */ MCF_PCI_PCIICR &= ~(MCF_PCI_PCIICR_IAE);/* Target Device 1 */ /* Check to see if there is anything out on Slot 1 */ /* Form config address for Slot 1*/ MCF_PCI_PCICAR = (0 | MCF_PCI_PCICAR_DEVNUM(PCI_TARG1_IDSEL)| MCF_PCI_PCICAR_FUNCNUM(0)| MCF_PCI_PCICAR_BUSNUM(0)| MCF_PCI_PCICAR_E); /* Check to see if there is anything out on Slot 1 */ MCF_PCI_PCICAR = (MCF_PCI_PCICAR & 0xFFFFFF00); cfgID = swap32(*(uint32*)PCI_HOST_CFG); if(!(MCF_PCI_PCIISR & MCF_PCI_PCIISR_IA)) { /* There is a device here... configure it */ printf("Target 1(AD17): Found Device with cfgID = 0x%08X\n",cfgID); /* set control to mem, io, and master */ MCF_PCI_PCICAR = (MCF_PCI_PCICAR & 0xFFFFFF00) + 4; *(uint32*)PCI_HOST_CFG = swap32(0x00000007); /* setup Bar0 and 1 */ MCF_PCI_PCICAR = (MCF_PCI_PCICAR & 0xFFFFFF00) + 0x10; *(uint32*)PCI_HOST_CFG = swap32(PCI_TARG1_BAR0); MCF_PCI_PCICAR = (MCF_PCI_PCICAR & 0xFFFFFF00) + 0x14; *(uint32*)PCI_HOST_CFG = swap32(PCI_TARG1_BAR1); MCF_PCI_PCICAR = (MCF_PCI_PCICAR & 0xFFFFFF00) + 0x18; *(uint32*)PCI_HOST_CFG = swap32(PCI_TARG1_BAR2); targ1 = PCI_OK; } else { /* it is empty */ printf("Target 1(AD17): No device found\n",cfgID); /* clear IA bit */ MCF_PCI_PCIISR |= MCF_PCI_PCIISR_IA; }/* Target Device 2 */ /* Check to see if there is anything out on Slot 2 */ /* Form config address for Slot 2*/ MCF_PCI_PCICAR = (0 | MCF_PCI_PCICAR_DEVNUM(PCI_TARG2_IDSEL)| MCF_PCI_PCICAR_FUNCNUM(0)| MCF_PCI_PCICAR_BUSNUM(0)| MCF_PCI_PCICAR_E); /* Check to see if there is anything out on Slot 2 */ MCF_PCI_PCICAR = (MCF_PCI_PCICAR & 0xFFFFFF00); cfgID = swap32(*(uint32*)PCI_HOST_CFG); if(!(MCF_PCI_PCIISR & MCF_PCI_PCIISR_IA)) { /* There is a device here... configure it */ printf("Target 2(AD18): Found Device with cfgID = 0x%08X\n",cfgID); /* set control to mem, io, and master */ MCF_PCI_PCICAR = (MCF_PCI_PCICAR & 0xFFFFFF00) + 4; *(uint32*)PCI_HOST_CFG = swap32(0x00000007); /* setup Bar0 and 1 */ MCF_PCI_PCICAR = (MCF_PCI_PCICAR & 0xFFFFFF00) + 0x10; *(uint32*)PCI_HOST_CFG = swap32(PCI_TARG2_BAR0); MCF_PCI_PCICAR = (MCF_PCI_PCICAR & 0xFFFFFF00) + 0x14; *(uint32*)PCI_HOST_CFG = swap32(PCI_TARG2_BAR1); targ2 = PCI_OK; } else { /* it is empty */ printf("Target 2(AD18): No device found\n",cfgID); /* clear IA bit */ MCF_PCI_PCIISR |= MCF_PCI_PCIISR_IA; }/* Target Device 3 */ /* Check to see if there is anything out on Slot 3 */ /* Form config address for Slot 3*/ MCF_PCI_PCICAR = (0 | MCF_PCI_PCICAR_DEVNUM(PCI_TARG3_IDSEL)| MCF_PCI_PCICAR_FUNCNUM(0)| MCF_PCI_PCICAR_BUSNUM(0)| MCF_PCI_PCICAR_E); /* Check to see if there is anything out on Slot 3 */ MCF_PCI_PCICAR = (MCF_PCI_PCICAR & 0xFFFFFF00); cfgID = swap32(*(uint32*)PCI_HOST_CFG); if(!(MCF_PCI_PCIISR & MCF_PCI_PCIISR_IA)) { /* There is a device here... configure it */ printf("Target 3(AD19): Found Device with cfgID = 0x%08X\n",cfgID); /* set control to mem, io, and master */ MCF_PCI_PCICAR = (MCF_PCI_PCICAR & 0xFFFFFF00) + 4;
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