📄 mcf537x_fec.h
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/* * File: mcf537x_fec.h * Purpose: Register and bit definitions */#ifndef __MCF537X_FEC_H__#define __MCF537X_FEC_H__/*********************************************************************** Fast Ethernet Controller (FEC)**********************************************************************//* Register read/write macros */#define MCF_FEC_EIR (*(vuint32*)(0xFC030004))#define MCF_FEC_EIMR (*(vuint32*)(0xFC030008))#define MCF_FEC_RDAR (*(vuint32*)(0xFC030010))#define MCF_FEC_TDAR (*(vuint32*)(0xFC030014))#define MCF_FEC_ECR (*(vuint32*)(0xFC030024))#define MCF_FEC_MMFR (*(vuint32*)(0xFC030040))#define MCF_FEC_MSCR (*(vuint32*)(0xFC030044))#define MCF_FEC_MIBC (*(vuint32*)(0xFC030064))#define MCF_FEC_RCR (*(vuint32*)(0xFC030084))#define MCF_FEC_TCR (*(vuint32*)(0xFC0300C4))#define MCF_FEC_PALR (*(vuint32*)(0xFC0300E4))#define MCF_FEC_PAUR (*(vuint32*)(0xFC0300E8))#define MCF_FEC_OPD (*(vuint32*)(0xFC0300EC))#define MCF_FEC_IAUR (*(vuint32*)(0xFC030118))#define MCF_FEC_IALR (*(vuint32*)(0xFC03011C))#define MCF_FEC_GAUR (*(vuint32*)(0xFC030120))#define MCF_FEC_GALR (*(vuint32*)(0xFC030124))#define MCF_FEC_TFWR (*(vuint32*)(0xFC030144))#define MCF_FEC_FRBR (*(vuint32*)(0xFC03014C))#define MCF_FEC_FRSR (*(vuint32*)(0xFC030150))#define MCF_FEC_ERDSR (*(vuint32*)(0xFC030180))#define MCF_FEC_ETDSR (*(vuint32*)(0xFC030184))#define MCF_FEC_EMRBR (*(vuint32*)(0xFC030188))#define MCF_FEC_RMON_T_DROP (*(vuint32*)(0xFC030200))#define MCF_FEC_RMON_T_PACKETS (*(vuint32*)(0xFC030204))#define MCF_FEC_RMON_T_BC_PKT (*(vuint32*)(0xFC030208))#define MCF_FEC_RMON_T_MC_PKT (*(vuint32*)(0xFC03020C))#define MCF_FEC_RMON_T_CRC_ALIGN (*(vuint32*)(0xFC030210))#define MCF_FEC_RMON_T_UNDERSIZE (*(vuint32*)(0xFC030214))#define MCF_FEC_RMON_T_OVERSIZE (*(vuint32*)(0xFC030218))#define MCF_FEC_RMON_T_FRAG (*(vuint32*)(0xFC03021C))#define MCF_FEC_RMON_T_JAB (*(vuint32*)(0xFC030220))#define MCF_FEC_RMON_T_COL (*(vuint32*)(0xFC030224))#define MCF_FEC_RMON_T_P64 (*(vuint32*)(0xFC030228))#define MCF_FEC_RMON_T_P65TO127 (*(vuint32*)(0xFC03022C))#define MCF_FEC_RMON_T_P128TO255 (*(vuint32*)(0xFC030230))#define MCF_FEC_RMON_T_P256TO511 (*(vuint32*)(0xFC030234))#define MCF_FEC_RMON_T_P512TO1023 (*(vuint32*)(0xFC030238))#define MCF_FEC_RMON_T_P1024TO2047 (*(vuint32*)(0xFC03023C))#define MCF_FEC_RMON_T_P_GTE2048 (*(vuint32*)(0xFC030240))#define MCF_FEC_RMON_T_OCTETS (*(vuint32*)(0xFC030244))#define MCF_FEC_IEEE_T_DROP (*(vuint32*)(0xFC030248))#define MCF_FEC_IEEE_T_FRAME_OK (*(vuint32*)(0xFC03024C))#define MCF_FEC_IEEE_T_1COL (*(vuint32*)(0xFC030250))#define MCF_FEC_IEEE_T_MCOL (*(vuint32*)(0xFC030254))#define MCF_FEC_IEEE_T_DEF (*(vuint32*)(0xFC030258))#define MCF_FEC_IEEE_T_LCOL (*(vuint32*)(0xFC03025C))#define MCF_FEC_IEEE_T_EXCOL (*(vuint32*)(0xFC030260))#define MCF_FEC_IEEE_T_MACERR (*(vuint32*)(0xFC030264))#define MCF_FEC_IEEE_T_CSERR (*(vuint32*)(0xFC030268))#define MCF_FEC_IEEE_T_SQE (*(vuint32*)(0xFC03026C))#define MCF_FEC_IEEE_T_FDXFC (*(vuint32*)(0xFC030270))#define MCF_FEC_IEEE_T_OCTETS_OK (*(vuint32*)(0xFC030274))#define MCF_FEC_RMON_R_PACKETS (*(vuint32*)(0xFC030284))#define MCF_FEC_RMON_R_BC_PKT (*(vuint32*)(0xFC030288))#define MCF_FEC_RMON_R_MC_PKT (*(vuint32*)(0xFC03028C))#define MCF_FEC_RMON_R_CRC_ALIGN (*(vuint32*)(0xFC030290))#define MCF_FEC_RMON_R_UNDERSIZE (*(vuint32*)(0xFC030294))#define MCF_FEC_RMON_R_OVERSIZE (*(vuint32*)(0xFC030298))#define MCF_FEC_RMON_R_FRAG (*(vuint32*)(0xFC03029C))#define MCF_FEC_RMON_R_JAB (*(vuint32*)(0xFC0302A0))#define MCF_FEC_RMON_R_RESVD_0 (*(vuint32*)(0xFC0302A4))#define MCF_FEC_RMON_R_P64 (*(vuint32*)(0xFC0302A8))#define MCF_FEC_RMON_R_P65TO127 (*(vuint32*)(0xFC0302AC))#define MCF_FEC_RMON_R_P128TO255 (*(vuint32*)(0xFC0302B0))#define MCF_FEC_RMON_R_P256TO511 (*(vuint32*)(0xFC0302B4))#define MCF_FEC_RMON_R_512TO1023 (*(vuint32*)(0xFC0302B8))#define MCF_FEC_RMON_R_P_GTE2048 (*(vuint32*)(0xFC0302C0))#define MCF_FEC_RMON_R_1024TO2047 (*(vuint32*)(0xFC0302BC))#define MCF_FEC_RMON_R_OCTETS (*(vuint32*)(0xFC0302C4))#define MCF_FEC_IEEE_R_DROP (*(vuint32*)(0xFC0302C8))#define MCF_FEC_IEEE_R_FRAME_OK (*(vuint32*)(0xFC0302CC))#define MCF_FEC_IEEE_R_CRC (*(vuint32*)(0xFC0302D0))#define MCF_FEC_IEEE_R_ALIGN (*(vuint32*)(0xFC0302D4))#define MCF_FEC_IEEE_R_MACERR (*(vuint32*)(0xFC0302D8))#define MCF_FEC_IEEE_R_FDXFC (*(vuint32*)(0xFC0302DC))#define MCF_FEC_IEEE_R_OCTETS_OK (*(vuint32*)(0xFC0302E0))/* Bit definitions and macros for MCF_FEC_EIR */#define MCF_FEC_EIR_UN (0x00080000)#define MCF_FEC_EIR_RL (0x00100000)#define MCF_FEC_EIR_LC (0x00200000)#define MCF_FEC_EIR_EBERR (0x00400000)#define MCF_FEC_EIR_MII (0x00800000)#define MCF_FEC_EIR_RXB (0x01000000)#define MCF_FEC_EIR_RXF (0x02000000)#define MCF_FEC_EIR_TXB (0x04000000)#define MCF_FEC_EIR_TXF (0x08000000)#define MCF_FEC_EIR_GRA (0x10000000)#define MCF_FEC_EIR_BABT (0x20000000)#define MCF_FEC_EIR_BABR (0x40000000)#define MCF_FEC_EIR_HBERR (0x80000000)#define MCF_FEC_EIR_CLEAR_ALL (0xFFFFFFFF)/* Bit definitions and macros for MCF_FEC_EIMR */#define MCF_FEC_EIMR_UN (0x00080000)#define MCF_FEC_EIMR_RL (0x00100000)#define MCF_FEC_EIMR_LC (0x00200000)#define MCF_FEC_EIMR_EBERR (0x00400000)#define MCF_FEC_EIMR_MII (0x00800000)#define MCF_FEC_EIMR_RXB (0x01000000)#define MCF_FEC_EIMR_RXF (0x02000000)#define MCF_FEC_EIMR_TXB (0x04000000)#define MCF_FEC_EIMR_TXF (0x08000000)#define MCF_FEC_EIMR_GRA (0x10000000)#define MCF_FEC_EIMR_BABT (0x20000000)#define MCF_FEC_EIMR_BABR (0x40000000)#define MCF_FEC_EIMR_HBERR (0x80000000)#define MCF_FEC_EIMR_MASK_ALL (0x00000000)#define MCF_FEC_EIMR_UNMASK_ALL (0xFFFFFFFF)/* Bit definitions and macros for MCF_FEC_RDAR */#define MCF_FEC_RDAR_R_DES_ACTIVE (0x01000000)/* Bit definitions and macros for MCF_FEC_TDAR */#define MCF_FEC_TDAR_X_DES_ACTIVE (0x01000000)/* Bit definitions and macros for MCF_FEC_ECR */#define MCF_FEC_ECR_RESET (0x00000001)#define MCF_FEC_ECR_ETHER_EN (0x00000002)/* Bit definitions and macros for MCF_FEC_MMFR */#define MCF_FEC_MMFR_DATA(x) (((x)&0x0000FFFF)<<0)#define MCF_FEC_MMFR_TA(x) (((x)&0x00000003)<<16)#define MCF_FEC_MMFR_RA(x) (((x)&0x0000001F)<<18)#define MCF_FEC_MMFR_PA(x) (((x)&0x0000001F)<<23)#define MCF_FEC_MMFR_OP(x) (((x)&0x00000003)<<28)#define MCF_FEC_MMFR_ST(x) (((x)&0x00000003)<<30)#define MCF_FEC_MMFR_ST_01 (0x40000000)#define MCF_FEC_MMFR_OP_READ (0x20000000)#define MCF_FEC_MMFR_OP_WRITE (0x10000000)#define MCF_FEC_MMFR_TA_10 (0x00020000)/* Bit definitions and macros for MCF_FEC_MSCR */#define MCF_FEC_MSCR_MII_SPEED(x) (((x)&0x0000003F)<<1)#define MCF_FEC_MSCR_DIS_PREAMBLE (0x00000080)/* Bit definitions and macros for MCF_FEC_MIBC */#define MCF_FEC_MIBC_MIB_IDLE (0x40000000)#define MCF_FEC_MIBC_MIB_DISABLE (0x80000000)/* Bit definitions and macros for MCF_FEC_RCR */#define MCF_FEC_RCR_LOOP (0x00000001)#define MCF_FEC_RCR_DRT (0x00000002)#define MCF_FEC_RCR_MII_MODE (0x00000004)#define MCF_FEC_RCR_PROM (0x00000008)#define MCF_FEC_RCR_BC_REJ (0x00000010)#define MCF_FEC_RCR_FCE (0x00000020)#define MCF_FEC_RCR_MAX_FL(x) (((x)&0x000007FF)<<16)/* Bit definitions and macros for MCF_FEC_TCR */#define MCF_FEC_TCR_GTS (0x00000001)#define MCF_FEC_TCR_HBC (0x00000002)#define MCF_FEC_TCR_FDEN (0x00000004)#define MCF_FEC_TCR_TFC_PAUSE (0x00000008)#define MCF_FEC_TCR_RFC_PAUSE (0x00000010)/* Bit definitions and macros for MCF_FEC_PALR */#define MCF_FEC_PALR_PADDR1(x) (((x)&0xFFFFFFFF)<<0)/* Bit definitions and macros for MCF_FEC_PAUR */#define MCF_FEC_PAUR_TYPE(x) (((x)&0x0000FFFF)<<0)#define MCF_FEC_PAUR_PADDR2(x) (((x)&0x0000FFFF)<<16)/* Bit definitions and macros for MCF_FEC_OPD */#define MCF_FEC_OPD_PAUSE_DUR(x) (((x)&0x0000FFFF)<<0)#define MCF_FEC_OPD_OPCODE(x) (((x)&0x0000FFFF)<<16)/* Bit definitions and macros for MCF_FEC_IAUR */#define MCF_FEC_IAUR_IADDR1(x) (((x)&0xFFFFFFFF)<<0)/* Bit definitions and macros for MCF_FEC_IALR */#define MCF_FEC_IALR_IADDR2(x) (((x)&0xFFFFFFFF)<<0)/* Bit definitions and macros for MCF_FEC_GAUR */#define MCF_FEC_GAUR_GADDR1(x) (((x)&0xFFFFFFFF)<<0)/* Bit definitions and macros for MCF_FEC_GALR */#define MCF_FEC_GALR_GADDR2(x) (((x)&0xFFFFFFFF)<<0)/* Bit definitions and macros for MCF_FEC_TFWR */#define MCF_FEC_TFWR_X_WMRK(x) (((x)&0x00000003)<<0)/* Bit definitions and macros for MCF_FEC_FRBR */#define MCF_FEC_FRBR_R_BOUND(x) (((x)&0x000000FF)<<2)/* Bit definitions and macros for MCF_FEC_FRSR */#define MCF_FEC_FRSR_R_FSTART(x) (((x)&0x000000FF)<<2)/* Bit definitions and macros for MCF_FEC_ERDSR */#define MCF_FEC_ERDSR_R_DES_START(x) (((x)&0x3FFFFFFF)<<2)/* Bit definitions and macros for MCF_FEC_ETDSR */#define MCF_FEC_ETDSR_X_DES_START(x) (((x)&0x3FFFFFFF)<<2)/* Bit definitions and macros for MCF_FEC_EMRBR */#define MCF_FEC_EMRBR_R_BUF_SIZE(x) (((x)&0x0000007F)<<4)/********************************************************************/#endif /* __MCF537X_FEC_H__ */⌨️ 快捷键说明
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