sacmv32.lst
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//////////////////////////////////////////////////////
// SACM initial functions
//////////////////////////////////////////////////////
.public F_SP_SACM_A1600_Init_
.PUBLIC F_SP_SACM_A2000_Init_
.PUBLIC F_SP_SACM_S530_Init_
.PUBLIC F_SP_SACM_S480_Init_
.PUBLIC F_SP_SACM_S240_Init_
.public F_SP_SACM_S200_Init_
.PUBLIC F_SP_SACM_MS01_Init_
.PUBLIC F_SP_PlayMode0_
.PUBLIC F_SP_PlayMode1_
.PUBLIC F_SP_PlayMode2_
.PUBLIC F_SP_PlayMode3_
.PUBLIC F_SP_SACM_DVR_Init_
.PUBLIC F_SP_SACM_DVR_Rec_Init_
.PUBLIC F_SP_SACM_DVR_Play_Init_
//----------------------------------------------------
// A1600
//----------------------------------------------------
///////////////////////////////////////////////////////////////////////////////
// Function: The partial code of hardware setting of SACM_A1600_Initial()
// or F_SACM_A1600_Initial:
// Note: The following functions are the partial code of original
// initial subroutine. (H/W setting part)
//
// Ex: F_SACM_A1600_Initial:
// ...
// call F_SP_SACM_A1600_Init_ : S480/S240/MS01 is same
// ...
// retf
////////////////////////////////////////////////////////////////////////////////
F_SP_SACM_A1600_Init_:
0000BFA2 09 93 80 00 R1 = C_SystemClock; // 24MHz, Fcpu=Fosc
0000BFA4 19 D3 13 70 [P_SystemClock]=R1 // Frequency 20MHz
0000BFA6 70 92 R1 = 0x0030 // TimerA CKA=Fosc/2 CKB=1 Tout:off
0000BFA7 19 D3 0B 70 [P_TimerA_Ctrl] = R1 // Initial Timer A
0000BFA9 09 93 FF F9 R1 = C_A1600_Timer_Setting // 16K
0000BFAB 19 D3 0A 70 [P_TimerA_Data] = R1
0000BFAD 09 93 A8 00 R1 = 0x00A8 // Set the DAC Ctrl
0000BFAF 19 D3 2A 70 [P_DAC_Ctrl] = R1
0000BFB1 09 93 FF FF R1 = 0xffff
0000BFB3 19 D3 11 70 [P_INT_Clear] = R1 // Clear interrupt occuiped events
0000BFB5 40 92 R1 =0x0000 //
.if BODY_TYPE == SPCE061A
0000BFB6 11 93 2D 70 R1 = [P_INT_Mask] //
.endif
// .if BODY_TYPE == SPCE500A
// R1 = [R_InterruptStatus] //
// .endif
0000BFB8 09 A3 00 20 R1 |= C_FIQ_TMA // Enable Timer A FIQ
//R1 |= C_IRQ4_1KHz
// [R_InterruptStatus] = R1 //
0000BFBA 19 D3 10 70 [P_INT_Ctrl] = R1 //
0000BFBC 90 9A RETF
//----------------------------------------------------
// A2000
//----------------------------------------------------
///////////////////////////////////////////////////////////////////////////////
// Function: The partial code of hardware setting of SACM_A2000_Initial()
// or F_SACM_A2000_Initial:
// Note: The following functions are the partial code of original
// initial subroutine. (H/W setting part)
//
// Ex: F_SACM_A2000_Initial:
// ...
// call F_SP_SACM_A2000_Init_ : S480/S240/MS01 is same
// ...
// retf
////////////////////////////////////////////////////////////////////////////////
F_SP_SACM_A2000_Init_:
0000BFBD 09 93 80 00 R1=C_SystemClock; // 24MHz, Fcpu=Fosc
0000BFBF 19 D3 13 70 [P_SystemClock]=R1 // Frequency 20MHz
0000BFC1 70 92 R1 = 0x0030 // TimerA CKA=Fosc/2 CKB=1 Tout:off
0000BFC2 19 D3 0B 70 [P_TimerA_Ctrl] = R1 // Initial Timer A
0000BFC4 09 93 FF F9 R1 = C_A2000_Timer_Setting // 16K
0000BFC6 19 D3 0A 70 [P_TimerA_Data] = R1
0000BFC8 09 93 A8 00 R1 = 0x00A8 // Set the DAC Ctrl
0000BFCA 19 D3 2A 70 [P_DAC_Ctrl] = R1
0000BFCC 09 93 FF FF R1 = 0xffff
0000BFCE 19 D3 11 70 [P_INT_Clear] = R1 // Clear interrupt occuiped events
.if BODY_TYPE == SPCE061A
0000BFD0 11 93 2D 70 R1 = [P_INT_Mask] //
.endif
// .if BODY_TYPE == SPCE500A
// R1 = [R_InterruptStatus] //
// .endif
0000BFD2 09 A3 00 20 R1 |= C_FIQ_TMA // Enable Timer A FIQ
// [R_InterruptStatus] = R1 //
0000BFD4 19 D3 10 70 [P_INT_Ctrl] = R1 //
0000BFD6 90 9A RETF
//----------------------------------------------------
// A3200 1ch
//----------------------------------------------------
.public F_SP_SACM_A3200_Init_
.public F_SACM_A3200_SetTimerSrc
.public F_SACM_A3200_SetIntSrc
.public F_SACM_A3200_SendDecodedData
//////////////////////////////////////////////////////////////////
// Function: The partial code of hardware setting of
// SACM_A3200_Initial() or F_SACM_A3200_Initial:
// Single Channel A3200
//////////////////////////////////////////////////////////////////
F_SP_SACM_A3200_Init_: .proc
// R1 = 0x0020; // 20MHz
// R1 = 0x0000; // 24MHz
// R1 = 0x0040; // 32MHz
// R1 = 0x0060; // 40MHz
// R1 = 0x0080; // 49MHz
0000BFD7 09 93 80 00 R1 = C_SystemClock
0000BFD9 19 D3 13 70 [P_SystemClock] = R1;
0000BFDB 09 93 A4 00 R1 = 0x00A4; // Latch DAR1 data to DAC1 by TimerA
0000BFDD 19 D3 2A 70 [P_DAC_Ctrl] = R1; // Latch DAR2 data to DAC2 by TimerA
0000BFDF 90 9A RETF;
.endp
//--------------------------------------------------------------------
//-- Function: F_SACM_A3200_SetTimerSrc
//-- Parameter: R1 : TimerData
//-- Return: NONE
//-- Description: This function called by A3200 library to set timer A
//--------------------------------------------------------------------
F_SACM_A3200_SetTimerSrc: .proc
0000BFE0 88 D4 push R2 to [sp];
0000BFE1 70 94 R2 = 0x0030;
0000BFE2 1A D5 0B 70 [P_TimerA_Ctrl] = R2; // select Fosc/2 as Timer A clock source
0000BFE4 19 D3 0A 70 [P_TimerA_Data] = R1;
0000BFE6 88 92 pop R2 from [sp];
0000BFE7 90 9A retf;
.endp
//--------------------------------------------------------------------
//-- Function: F_SACM_A3200_SetIntSrc
//-- Parameter: NONE
//-- Return: NONE
//-- Description: This function called by A3200 library to set
// interrupt
//--------------------------------------------------------------------
F_SACM_A3200_SetIntSrc: .proc
0000BFE8 88 D2 push R1 to [SP];
.if BODY_TYPE == SPCE061A
0000BFE9 11 93 2D 70 R1 = [P_INT_Mask] //
.endif
// .if BODY_TYPE == SPCE500A
// R1 = [R_InterruptStatus] //
// .endif
0000BFEB 09 A3 00 10 R1 |= C_IRQ1_TMA;
// [R_InterruptStatus] = R1;
0000BFED 19 D3 10 70 [P_INT_Ctrl] = R1;
0000BFEF 88 90 pop R1 from [SP];
0000BFF0 90 9A RETF;
.endp
//--------------------------------------------------------------------
//-- Function: F_SACM_A3200_SendDecodedData
//-- Parameter: R1 : decoded sample
//-- Return: NONE
//-- Description: This function called by A3200 library to send
// decoded data to DACs
//--------------------------------------------------------------------
F_SACM_A3200_SendDecodedData: .proc
0000BFF1 19 D3 17 70 [P_DAC1] = R1;
0000BFF3 19 D3 16 70 [P_DAC2] = R1;
0000BFF5 90 9A RETF;
.endp
//----------------------------------------------------
// A3200 2ch
//----------------------------------------------------
.public F_SP_SACM_2Ch_A3200_Init_
.public F_SACM_A3200_Ch1_SetTimerSrc
.public F_SACM_A3200_Ch1_SetIntSrc
.public F_SACM_A3200_Ch1_SendDecodedData
.public F_SACM_A3200_Ch2_SetTimerSrc
.public F_SACM_A3200_Ch2_SetIntSrc
.public F_SACM_A3200_Ch2_SendDecodedData
//////////////////////////////////////////////////////////////////
// Function: The partial code of hardware setting of
// SACM_2Ch_A3200_Initial() or F_SACM_2Ch_A3200_Initial:
// 2 Channel A3200
//////////////////////////////////////////////////////////////////
F_SP_SACM_2Ch_A3200_Init_:
// R1 = 0x0020; // 20MHz
// R1 = 0x0000; // 24MHz
// R1 = 0x0040; // 32MHz
// R1 = 0x0060; // 40MHz
// R1 = 0x0080; // 49MHz
0000BFF6 09 93 80 00 R1 = C_SystemClock
0000BFF8 19 D3 13 70 [P_SystemClock] = R1;
0000BFFA 09 93 C4 00 R1 = 0x00C4; // Latch DAR1 data to DAC1 by TimerA
0000BFFC 19 D3 2A 70 [P_DAC_Ctrl] = R1; // Latch DAR2 data to DAC2 by TimerB
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