hcu5.c

u-boot 源代码

/*
 *(C) Copyright 2005-2007 Netstal Maschinen AG
 *    Niklaus Giger ([e-mail])
 *
 *    This source code is free software; you can redistribute it
 *    and/or modify it in source code form under the terms of the GNU
 *    General Public License as published by the Free Software
 *    Foundation; either version 2 of the License, or (at your option)
 *    any later version.
 *
 *    This program is distributed in the hope that it will be useful,
 *    but WITHOUT ANY WARRANTY; without even the implied warranty of
 *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *    GNU General Public License for more details.
 *
 *    You should have received a copy of the GNU General Public License
 *    along with this program; if not, write to the Free Software
 *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
 */

#include <common.h>
#include <asm/processor.h>
#include <ppc440.h>
#include <asm/mmu.h>
#include <net.h>

DECLARE_GLOBAL_DATA_PTR;

void hcu_led_set(u32 value);

extern flash_info_t flash_info[CFG_MAX_FLASH_BANKS];

#undef BOOTSTRAP_OPTION_A_ACTIVE

#define SDR0_CP440		0x0180

#define SYSTEM_RESET		0x30000000
#define CHIP_RESET		0x20000000

#define SDR0_ECID0		0x0080
#define SDR0_ECID1		0x0081
#define SDR0_ECID2		0x0082
#define SDR0_ECID3		0x0083

#define SYS_IO_ADDRESS		(CFG_CS_2 + 0x00e00000)
#define SYS_SLOT_ADDRESS		(CFG_CPLD + 0x00400000)

#define DEFAULT_ETH_ADDR  "ethaddr"
/* ethaddr for first or etha1ddr for second ethernet */

enum {
	/* HW_GENERATION_HCU1 is no longer supported */
	HW_GENERATION_HCU2  = 0x10,
	HW_GENERATION_HCU3  = 0x10,
	HW_GENERATION_HCU4  = 0x20,
	HW_GENERATION_HCU5  = 0x30,
	HW_GENERATION_MCU   = 0x08,
	HW_GENERATION_MCU20 = 0x0a,
	HW_GENERATION_MCU25 = 0x09,
};


/*
 * This function is run very early, out of flash, and before devices are
 * initialized. It is called by lib_ppc/board.c:board_init_f by virtue
 * of being in the init_sequence array.
 *
 * The SDRAM has been initialized already -- start.S:start called
 * init.S:init_sdram early on -- but it is not yet being used for
 * anything, not even stack. So be careful.
 */

int board_early_init_f(void)
{
	u32 reg;

#ifdef BOOTSTRAP_OPTION_A_ACTIVE
	/* Booting with Bootstrap Option A
	 * First boot, with CPR0_ICFG_RLI_MASK == 0
	 * no we setup varios boot strapping register,
	 * then we do reset the PPC440 using a chip reset
	 * Unfortunately, we cannot use this option, as Nto1 is not set
	 * with Bootstrap Option A and cannot be changed later on by SW
	 * There are no other possible boostrap options with a 8 bit ROM
	 * See Errata (Version 1.04) CHIP_9
	 */

	u32 cpr0icfg;
	u32 dbcr;

	mfcpr(CPR0_ICFG, cpr0icfg);
	if (!(cpr0icfg & CPR0_ICFG_RLI_MASK)) {
		mtcpr(CPR0_MALD,   0x02000000);
		mtcpr(CPR0_OPBD,   0x02000000);
	        mtcpr(CPR0_PERD,   0x05000000);  /* 1:5 */
		mtcpr(CPR0_PLLC,   0x40000238);
		mtcpr(CPR0_PLLD,   0x01010414);
		mtcpr(CPR0_PRIMAD, 0x01000000);
		mtcpr(CPR0_PRIMBD, 0x01000000);
		mtcpr(CPR0_SPCID,  0x03000000);
		mtsdr(SDR0_PFC0,   0x00003E00);  /* [CTE] = 0 */
		mtsdr(SDR0_CP440,  0x0EAAEA02);  /* [Nto1] = 1*/
		mtcpr(CPR0_ICFG,   cpr0icfg | CPR0_ICFG_RLI_MASK);

		/*
		 * Initiate system reset in debug control register DBCR
		 */
		dbcr = mfspr(dbcr0);
		mtspr(dbcr0, dbcr | CHIP_RESET);
	}
	mtsdr(SDR0_CP440, 0x0EAAEA02);  /* [Nto1] = 1*/
#endif
	mtdcr(ebccfga, xbcfg);
	mtdcr(ebccfgd, 0xb8400000);

	/*--------------------------------------------------------------------
	 * Setup the GPIO pins
	 *-------------------------------------------------------------------*/
	/* test-only: take GPIO init from pcs440ep ???? in config file */
	out32(GPIO0_OR, 0x00000000);
	out32(GPIO0_TCR, 0x7C2FF1CF);
	out32(GPIO0_OSRL, 0x40055000);
	out32(GPIO0_OSRH, 0x00000000);
	out32(GPIO0_TSRL, 0x40055000);
	out32(GPIO0_TSRH, 0x00000400);
	out32(GPIO0_ISR1L, 0x40000000);
	out32(GPIO0_ISR1H, 0x00000000);
	out32(GPIO0_ISR2L, 0x00000000);
	out32(GPIO0_ISR2H, 0x00000000);
	out32(GPIO0_ISR3L, 0x00000000);
	out32(GPIO0_ISR3H, 0x00000000);

	out32(GPIO1_OR, 0x00000000);
	out32(GPIO1_TCR, 0xC6007FFF);
	out32(GPIO1_OSRL, 0x00140000);
	out32(GPIO1_OSRH, 0x00000000);
	out32(GPIO1_TSRL, 0x00000000);
	out32(GPIO1_TSRH, 0x00000000);
	out32(GPIO1_ISR1L, 0x05415555);
	out32(GPIO1_ISR1H, 0x40000000);
	out32(GPIO1_ISR2L, 0x00000000);
	out32(GPIO1_ISR2H, 0x00000000);
	out32(GPIO1_ISR3L, 0x00000000);
	out32(GPIO1_ISR3H, 0x00000000);

	/*--------------------------------------------------------------------
	 * Setup the interrupt controller polarities, triggers, etc.
	 *-------------------------------------------------------------------*/
	mtdcr(uic0sr, 0xffffffff);	/* clear all */
	mtdcr(uic0er, 0x00000000);	/* disable all */
	mtdcr(uic0cr, 0x00000005);	/* ATI & UIC1 crit are critical */
	mtdcr(uic0pr, 0xfffff7ff);	/* per ref-board manual */
	mtdcr(uic0tr, 0x00000000);	/* per ref-board manual */
	mtdcr(uic0vr, 0x00000000);	/* int31 highest, base=0x000 */
	mtdcr(uic0sr, 0xffffffff);	/* clear all */

	mtdcr(uic1sr, 0xffffffff);	/* clear all */
	mtdcr(uic1er, 0x00000000);	/* disable all */
	mtdcr(uic1cr, 0x00000000);	/* all non-critical */
	mtdcr(uic1pr, 0xffffffff);	/* per ref-board manual */
	mtdcr(uic1tr, 0x00000000);	/* per ref-board manual */
	mtdcr(uic1vr, 0x00000000);	/* int31 highest, base=0x000 */
	mtdcr(uic1sr, 0xffffffff);	/* clear all */

	mtdcr(uic2sr, 0xffffffff);	/* clear all */
	mtdcr(uic2er, 0x00000000);	/* disable all */
	mtdcr(uic2cr, 0x00000000);	/* all non-critical */
	mtdcr(uic2pr, 0xffffffff);	/* per ref-board manual */
	mtdcr(uic2tr, 0x00000000);	/* per ref-board manual */
	mtdcr(uic2vr, 0x00000000);	/* int31 highest, base=0x000 */
	mtdcr(uic2sr, 0xffffffff);	/* clear all */
	mtsdr(sdr_pfc0, 0x00003E00);	/* Pin function:  */
	mtsdr(sdr_pfc1, 0x00848000);	/* Pin function: UART0 has 4 pins */

	/* PCI arbiter enabled */
	mfsdr(sdr_pci0, reg);
	mtsdr(sdr_pci0, 0x80000000 | reg);

	pci_pre_init(0);

	/* setup BOOT FLASH */
	mtsdr(SDR0_CUST0, 0xC0082350);

	return 0;
}

#ifdef CONFIG_BOARD_PRE_INIT
int board_pre_init(void)
{
	return board_early_init_f();
}

#endif

int checkboard(void)
{
	unsigned int j;
	u16 *hwVersReg    = (u16 *) HCU_HW_VERSION_REGISTER;
	u16 *boardVersReg = (u16 *) HCU_CPLD_VERSION_REGISTER;
	u16 generation = *boardVersReg & 0xf0;
	u16 index      = *boardVersReg & 0x0f;
	u32 ecid0, ecid1, ecid2, ecid3;

	printf("Netstal Maschinen AG: ");
	if (generation == HW_GENERATION_HCU3)
		printf("HCU3: index %d", index);
	else if (generation == HW_GENERATION_HCU4)
		printf("HCU4: index %d", index);
	else if (generation == HW_GENERATION_HCU5)
		printf("HCU5: index %d", index);
	printf(" HW 0x%02x\n", *hwVersReg & 0xff);
	mfsdr(SDR0_ECID0, ecid0);
	mfsdr(SDR0_ECID1, ecid1);
	mfsdr(SDR0_ECID2, ecid2);
	mfsdr(SDR0_ECID3, ecid3);

	printf("Chip ID 0x%x 0x%x 0x%x 0x%x\n", ecid0, ecid1, ecid2, ecid3);
	for (j = 0;j < 6; j++) {
		hcu_led_set(1 << j);
		udelay(200 * 1000);
	}

	return 0;
}

u32 hcu_led_get(void)
{
	return in16(SYS_IO_ADDRESS) & 0x3f;
}

/*---------------------------------------------------------------------------+
 * hcu_led_set  value to be placed into the LEDs (max 6 bit)
 *---------------------------------------------------------------------------*/
void hcu_led_set(u32 value)
{
	out16(SYS_IO_ADDRESS, value);
}

/*---------------------------------------------------------------------------+
 * get_serial_number
 *---------------------------------------------------------------------------*/
static u32 get_serial_number(void)
{
	u32 *serial = (u32 *)CFG_FLASH_BASE;

	if (*serial == 0xffffffff)
		return 0;

	return *serial;
}


/*---------------------------------------------------------------------------+
 * hcu_get_slot
 *---------------------------------------------------------------------------*/
u32 hcu_get_slot(void)
{
	u16 *slot = (u16 *)SYS_SLOT_ADDRESS;
	return (*slot) & 0x7f;
}


/*---------------------------------------------------------------------------+
 * misc_init_r.
 *---------------------------------------------------------------------------*/
int misc_init_r(void)
{
	char *s = getenv(DEFAULT_ETH_ADDR);
	char *e;
	int i;
	u32 serial = get_serial_number();
	unsigned long usb2d0cr = 0;
	unsigned long usb2phy0cr, usb2h0cr = 0;
	unsigned long sdr0_pfc1;

	for (i = 0; i < 6; ++i) {
		gd->bd->bi_enetaddr[i] = s ? simple_strtoul(s, &e, 16) : 0;
		if (s)