stx7200.c

u-boot 源代码

/*
 * (C) Copyright 2007 STMicroelectronics.
 *
 * Stuart Menefy <[e-mail]>
 * Sean McGoogan <[e-mail]>
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#include <common.h>
#include <command.h>
#include <asm/soc.h>
#include <asm/stx7200reg.h>
#include <asm/io.h>
#include <asm/pio.h>
#include <asm/stbus.h>
#include <ata.h>

#define PIO_BASE  ST40_PIO0_REGS_BASE

static void stx7200_clocks(void)
{
	DECLARE_GLOBAL_DATA_PTR;
	bd_t *bd = gd->bd;

	/*
	 * FIXME
	 * Gross hack to get the serial port working.
	 * See the defintion of PCLK in drivers/stm-asc.c
	 * for where this is used.
	 */
	bd->bi_emifrq = 100;
}

#ifdef CONFIG_DRIVER_NETSTMAC

#define MII_MODE		(1<<0)
#define PHY_CLK_EXT             (1<<2)
#define MAC_SPEED               (1<<4)
#define VCI_ACK_SOURCE          (1<<6)
#define RESET                   (1<<8)
#define DISABLE_MSG_READ        (1<<12)
#define DISABLE_MSG_WRITE       (1<<14)
/* Remaining bits define pad functions, default appears to work */

extern int stmac_default_pbl(void)
{
	return 32;
}

extern void stmac_set_mac_speed(int speed)
{
#if defined(CONFIG_STMAC_MAC0)
	const int mac = 0;    /* First MAC */
#elif defined(CONFIG_STMAC_MAC1)
	const int mac = 1;    /* Second MAC */
#endif
	unsigned long sysconf = *STX7200_SYSCONF_SYS_CFG41;

	if (speed == 100)
		sysconf |= (MAC_SPEED << mac);
	else if (speed == 10)
		sysconf &= ~(MAC_SPEED << mac);

	*STX7200_SYSCONF_SYS_CFG41 = sysconf;
}

/* ETH MAC pad configuration */
extern void stx7200_configure_ethernet(
	int mac, int rmii, int ext_clk, int phy_bus)
{
	unsigned long sysconf;

	sysconf = *STX7200_SYSCONF_SYS_CFG41;

	/* Route Ethernet pins to output */
	/* bit26-16: conf_pad_eth(10:0) */
	if (mac == 0) {
		/* MII0: conf_pad_eth(0) = 0 (ethernet) */
		sysconf &= ~(1<<16);
	} else {
		/* MII1: conf_pad_eth(2) = 0, (3)=0, (4)=0, (9)=0, (10)=0 (eth)
		 * MII1: conf_pad_eth(6) = 0 (MII1TXD[0] = output)
		 * (remaining bits have no effect in ethernet mode */
		sysconf &= ~( (1<<(16+2)) | (1<<(16+3)) | (1<<(16+4)) |
			      (1<<(16+5)) | (1<<(16+6)) | (1<<(16+7)) |
			      (1<<(16+8)) | (1<<(16+9)) | (1<<(16+10))  );
	}

	/* DISABLE_MSG_FOR_WRITE=0 */
	sysconf &= ~(DISABLE_MSG_WRITE << mac);

	/* DISABLE_MSG_FOR_READ=0 */
	sysconf &= ~(DISABLE_MSG_READ << mac);

	/* VCI_ACK_SOURCE = 0 */
        sysconf &= ~(VCI_ACK_SOURCE << mac);

	/* ETHERNET_INTERFACE_ON (aka RESET) = 1 */
        sysconf |= (RESET << mac);

	/* RMII_MODE */
	if (rmii)
		sysconf |= (MII_MODE << mac);
	else
		sysconf &= ~(MII_MODE << mac);

	/* PHY_CLK_EXT */
	if (ext_clk)
		sysconf |= (PHY_CLK_EXT << mac);
	else
		sysconf &= ~(PHY_CLK_EXT << mac);

	*STX7200_SYSCONF_SYS_CFG41 = sysconf;
}
#endif	/* CONFIG_DRIVER_NETSTMAC */

int soc_init(void)
{
	DECLARE_GLOBAL_DATA_PTR;
	bd_t *bd = gd->bd;

	stx7200_clocks();

	bd->bi_devid = *STX7200_SYSCONF_DEVICEID_0;

	/*  Make sure reset period is shorter than WDT timeout */
	*STX7200_SYSCONF_SYS_CFG09 = (*STX7200_SYSCONF_SYS_CFG09 & 0xFF000000) | 0x000A8C;

	return 0;
}


#if defined(CONFIG_USB_OHCI_NEW)

#ifdef CONFIG_USB_STI7200_CUT1_SOFT_JTAG_RESET_WORKAROUND
/*
 * The following function *may* be required for boards
 * with cut 1.x of the STi7200 chip. This function must
 * *not* be used on cut 2.x (or later) of that chip.
 * There is a board modifiction comprising a R-C delay
 * which if applied negates the requirement to use this
 * workaround, so it is optional. However, it should be safe
 * to use this workaround with any cut 1.x silicon,
 * irrespective of the presence of the R-C delay board fix.
 *
 * NOTE: Register reads and USB_tdo variable:
 * All the reads are for USB_tdo, which is not used in this code.
 * They were commented-out debugging prints following each read,
 * so it's entirely possible that the reads could be dropped. But
 * they will affect timing and so might be significant. In the
 * absence of any understanding of how exactly this "black box"
 * code works, leave them in for safety.
 */
static void usb_soft_jtag_reset(void)
{
	int i, j;
	unsigned long USB_tdo;

	/* ENABLE SOFT JTAG */
	writel(0x00000040, STX7200_SYSCONF_SYS_CFG33);

	/* RELEASE TAP RESET */
	writel(0x00000044, STX7200_SYSCONF_SYS_CFG33);

	/* SET TAP INTO IDLE STATE */
	writel(0x00000045, STX7200_SYSCONF_SYS_CFG33);

	/* SET TAP INTO SHIFT IR STATE */
	writel(0x0000004c, STX7200_SYSCONF_SYS_CFG33);
	writel(0x0000004d, STX7200_SYSCONF_SYS_CFG33);
	writel(0x0000004c, STX7200_SYSCONF_SYS_CFG33);
	writel(0x0000004d, STX7200_SYSCONF_SYS_CFG33);
	writel(0x00000044, STX7200_SYSCONF_SYS_CFG33);
	writel(0x00000045, STX7200_SYSCONF_SYS_CFG33);
	writel(0x00000044, STX7200_SYSCONF_SYS_CFG33);
	writel(0x00000045, STX7200_SYSCONF_SYS_CFG33);

	/* SHIFT DATA IN TDI = 101 select TCB*/
	writel(0x00000046, STX7200_SYSCONF_SYS_CFG33);
	writel(0x00000047, STX7200_SYSCONF_SYS_CFG33);
	writel(0x00000044, STX7200_SYSCONF_SYS_CFG33);
	writel(0x00000045, STX7200_SYSCONF_SYS_CFG33);
	writel(0x0000004E, STX7200_SYSCONF_SYS_CFG33);
	writel(0x0000004F, STX7200_SYSCONF_SYS_CFG33);

	/* SET TAP INTO IDLE MODE */
	writel(0x0000004c, STX7200_SYSCONF_SYS_CFG33);
	writel(0x0000004d, STX7200_SYSCONF_SYS_CFG33);
	writel(0x00000044, STX7200_SYSCONF_SYS_CFG33);
	writel(0x00000045, STX7200_SYSCONF_SYS_CFG33);

	/* SET TAP INTO SHIFT DR STATE */
	writel(0x0000004c, STX7200_SYSCONF_SYS_CFG33);
	writel(0x0000004d, STX7200_SYSCONF_SYS_CFG33);
	writel(0x00000044, STX7200_SYSCONF_SYS_CFG33);
	writel(0x00000045, STX7200_SYSCONF_SYS_CFG33);
	writel(0x00000044, STX7200_SYSCONF_SYS_CFG33);
	writel(0x00000045, STX7200_SYSCONF_SYS_CFG33);

	/* SHIFT DATA IN TCB */
	for (i = 0; i <= 53; i++)
	{
		if ((i == 0) || (i == 1) || (i == 19) || (i == 36))
		{
			writel(0x00000044, STX7200_SYSCONF_SYS_CFG33);
			writel(0x00000045, STX7200_SYSCONF_SYS_CFG33);
		}
		if ((i == 53))
		{
			writel(0x0000004c, STX7200_SYSCONF_SYS_CFG33);
			writel(0x0000004D, STX7200_SYSCONF_SYS_CFG33);
		}
		writel(0x00000044, STX7200_SYSCONF_SYS_CFG33);
		writel(0x00000045, STX7200_SYSCONF_SYS_CFG33);
	}

	/* SET TAP INTO IDLE MODE */
	writel(0x0000004c, STX7200_SYSCONF_SYS_CFG33);
	writel(0x0000004d, STX7200_SYSCONF_SYS_CFG33);
	writel(0x00000044, STX7200_SYSCONF_SYS_CFG33);
	writel(0x00000045, STX7200_SYSCONF_SYS_CFG33);

	for (i = 0; i <= 53; i++)
	{
		writel(0x00000045, STX7200_SYSCONF_SYS_CFG33);
		writel(0x00000044, STX7200_SYSCONF_SYS_CFG33);
		USB_tdo = readl(STX7200_SYSCONF_SYS_CFG00);
	}

	writel(0x00000040, STX7200_SYSCONF_SYS_CFG33);

	/* RELEASE TAP RESET */
	writel(0x00000044, STX7200_SYSCONF_SYS_CFG33);

	/* SET TAP INTO IDLE STATE */
	writel(0x00000045, STX7200_SYSCONF_SYS_CFG33);

	/* SET TAP INTO SHIFT IR STATE */
	writel(0x0000004c, STX7200_SYSCONF_SYS_CFG33);
	writel(0x0000004d, STX7200_SYSCONF_SYS_CFG33);
	writel(0x0000004c, STX7200_SYSCONF_SYS_CFG33);
	writel(0x0000004d, STX7200_SYSCONF_SYS_CFG33);
	writel(0x00000044, STX7200_SYSCONF_SYS_CFG33);
	writel(0x00000045, STX7200_SYSCONF_SYS_CFG33);
	writel(0x00000044, STX7200_SYSCONF_SYS_CFG33);
	writel(0x00000045, STX7200_SYSCONF_SYS_CFG33);

	/* SHIFT DATA IN TDI = 110 select TPR */
	writel(0x00000044, STX7200_SYSCONF_SYS_CFG33);
	writel(0x00000045, STX7200_SYSCONF_SYS_CFG33);