adc.qsf

对AD0809进行操作

# Copyright (C) 1991-2008 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files from any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		ADC_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


set_global_assignment -name FAMILY "Cyclone II"
set_global_assignment -name DEVICE EP2C5Q208C8
set_global_assignment -name TOP_LEVEL_ENTITY ADC
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 8.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "18:14:06  MAY 21, 2009"
set_global_assignment -name LAST_QUARTUS_VERSION 8.0
set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS OFF -section_id eda_palace
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name VERILOG_FILE ADC.v
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_COLOR 14622752 -section_id Top
set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region"
set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"
set_global_assignment -name VECTOR_WAVEFORM_FILE ADC.vwf
set_global_assignment -name USE_CONFIGURATION_DEVICE ON
set_global_assignment -name STRATIX_CONFIGURATION_DEVICE EPCS1
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
set_global_assignment -name RESERVE_ASDO_AFTER_CONFIGURATION "AS INPUT TRI-STATED"
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
set_location_assignment PIN_15 -to clk
set_location_assignment PIN_3 -to data[0]
set_location_assignment PIN_4 -to data[1]
set_location_assignment PIN_5 -to data[2]
set_location_assignment PIN_6 -to data[3]
set_location_assignment PIN_8 -to data[4]
set_location_assignment PIN_10 -to data[5]
set_location_assignment PIN_11 -to data[6]
set_location_assignment PIN_12 -to data[7]
set_location_assignment PIN_13 -to clk1
set_location_assignment PIN_14 -to ale
set_location_assignment PIN_31 -to start
set_location_assignment PIN_32 -to eoc
set_location_assignment PIN_33 -to oe
set_location_assignment PIN_144 -to out[0]
set_location_assignment PIN_145 -to out[1]
set_location_assignment PIN_146 -to out[2]
set_location_assignment PIN_147 -to out[3]
set_location_assignment PIN_149 -to out[4]
set_location_assignment PIN_150 -to out[5]
set_location_assignment PIN_151 -to out[6]
set_location_assignment PIN_152 -to out[7]
set_location_assignment PIN_142 -to rst_n
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"