bf533_ez-kit_dma_config.asm

bf533平台图像采集程序

/******************************************************************************/
//
// Name: 	BF533 EZ-KIT video ITU-656 receive mode
//
/******************************************************************************

(C) Copyright 2003 - Analog Devices, Inc.  All rights reserved.

File Name:		BF533_EZ-KIT_DMA_Config.asm

Date Modified:	10/25/04		TL		Rev 2.0

Software:       VisualDSP++3.1

Hardware:		ADSP-BF533 EZ-KIT Board

Special Connections:  None

Purpose:		DMA controller  setup
				
				
Program Parameters:

********************************************************************************/


#include <defBF533.h>

.extern _frame_number;
.global		_BF533_EZ_KIT_DMA_Config;

#define Width_Length 720
#define Height_Length 576

.extern _YUV_656;

.section L1_code;
/*******************************************************************************/
_BF533_EZ_KIT_DMA_Config:

	
    r0=0;		
	p1.h = _YUV_656;	
	p1.l = _YUV_656;
	
	r1 = [p1];
	
	r0 = r0 + r1;
	p0.h = hi(DMA0_NEXT_DESC_PTR);
	p0.l = lo(DMA0_NEXT_DESC_PTR);
	
	//Target address of the DMA
	//r0.h = _YUV_656;	
	//r0.l = _YUV_656;
	
	[p0+DMA0_START_ADDR-DMA0_NEXT_DESC_PTR] = r0;
	
	//Line_Length 16bit trasnfers will be executed
	r0 = Width_Length(z);
	w[p0+DMA0_X_COUNT-DMA0_NEXT_DESC_PTR] = r0;
	
	//The modifier is set to 2 because of the 16bit transfers
	r0 = 2(z);
	w[p0+DMA0_X_MODIFY-DMA0_NEXT_DESC_PTR] = r0;

	//Frame_Length 16bit trasnfers will be executed
	r0 = Height_Length(z);
	w[p0+DMA0_Y_COUNT-DMA0_NEXT_DESC_PTR] = r0;
	
	//The modifier is set to 2 because of the 16bit transfers
	r0 = 2(z);
	w[p0+DMA0_Y_MODIFY-DMA0_NEXT_DESC_PTR] = r0;
	
	
	//PPI Peripheral is used
	r0 = 0x0000(z);
	w[p0+DMA0_PERIPHERAL_MAP-DMA0_NEXT_DESC_PTR] = r0;
	SSYNC;
	
	//DMA Config: Enable DMA | Memory write DMA | Discard DMA FIFO before start | enable assertation of interrupt | NDSIZE for stop mode | Enable STOP DMA
	r0 = DMAEN | DI_EN | WNR | WDSIZE_16 | DMA2D | RESTART | DI_EN (z);	
	w[p0+DMA0_CONFIG-DMA0_NEXT_DESC_PTR] = r0;
	SSYNC;

_BF533_EZ_KIT_DMA_Config.END:		
RTS;
/*******************************************************************************/
.GLOBAL _PPI_DMA_Restart;
_PPI_DMA_Restart:
 
	

	//disable the interrupt request
	
	p0.l = _frame_number;
	p0.h = _frame_number;
	
	r0 = [p0];
	r0 += 1;
	
	r1 = 4;
	r2 =0;
	cc = r0==r1;	
	if cc r0=r2;
	[p0] = r0;
	
	r2.l = 0xA800;
	r2.h = 0x0c;
	
	r0 *= r2;
	p0.h = hi(DMA0_NEXT_DESC_PTR);
	p0.l = lo(DMA0_NEXT_DESC_PTR);
	
	p1.h = _YUV_656;	
	p1.l = _YUV_656;
	
	r1 = [p1];
	
	r0 = r0 + r1;
	
	[p0+DMA0_START_ADDR-DMA0_NEXT_DESC_PTR] = r0;
	ssync;
	
	
	
	r0 = DMAEN | DI_EN | WNR | WDSIZE_16 | DMA2D | RESTART | DI_EN (z);	
	w[p0+DMA0_CONFIG-DMA0_NEXT_DESC_PTR] = r0;
	SSYNC;

	
	p0.h = hi(PPI_CONTROL);
	p0.l = lo(PPI_CONTROL);



	//PPI enabled, input mode, active video only, receive field 1&2, 
	//packing enabled, skipping disabled, 8bit data bus, nothing inverted
	r0 =  PORT_EN | PACK_EN | DLEN_8 (z);	 
	w[p0+PPI_CONTROL-PPI_CONTROL] = r0;
	SSYNC;
	
 _PPI_DMA_Restart.END:
 RTS;