ps2_mouse9.fit.qmsg

PS2键盘鼠标接口控制实现电子琴功能

{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_REGPACKING_INFO" "00:00:00 " "Info: Finished register packing: elapsed time is 00:00:00" {  } {  } 0 0 "Finished register packing: elapsed time is %1!s!" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_START" "" "Info: Fitter placement preparation operations beginning" {  } {  } 0 0 "Fitter placement preparation operations beginning" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "00:00:00 " "Info: Fitter placement preparation operations ending: elapsed time is 00:00:00" {  } {  } 0 0 "Fitter placement preparation operations ending: elapsed time is %1!s!" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Info: Fitter placement operations beginning" {  } {  } 0 0 "Fitter placement operations beginning" 0 0}
{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Info: Fitter placement was successful" {  } {  } 0 0 "Fitter placement was successful" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:01 " "Info: Fitter placement operations ending: elapsed time is 00:00:01" {  } {  } 0 0 "Fitter placement operations ending: elapsed time is %1!s!" 0 0}
{ "Info" "ITDB_FULL_ESTIMATED_DATA_PATH_RESULT" "4.422 ns register register " "Info: Estimated most critical path is register to register delay of 4.422 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns \\GenSpkS:Count11\[10\] 1 REG LAB_X26_Y8 2 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LAB_X26_Y8; Fanout = 2; REG Node = '\\GenSpkS:Count11\[10\]'" {  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { \GenSpkS:Count11[10] } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.288 ns) + CELL(0.442 ns) 0.730 ns Equal2~100 2 COMB LAB_X26_Y8 2 " "Info: 2: + IC(0.288 ns) + CELL(0.442 ns) = 0.730 ns; Loc. = LAB_X26_Y8; Fanout = 2; COMB Node = 'Equal2~100'" {  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.730 ns" { \GenSpkS:Count11[10] Equal2~100 } "NODE_NAME" } } { "ps2_mouse9.vhd" "" { Text "D:/Ps2-ALL/ps2_mouse9.vhd" 350 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.233 ns) + CELL(0.114 ns) 2.077 ns Equal2~101 3 COMB LAB_X26_Y9 11 " "Info: 3: + IC(1.233 ns) + CELL(0.114 ns) = 2.077 ns; Loc. = LAB_X26_Y9; Fanout = 11; COMB Node = 'Equal2~101'" {  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.347 ns" { Equal2~100 Equal2~101 } "NODE_NAME" } } { "ps2_mouse9.vhd" "" { Text "D:/Ps2-ALL/ps2_mouse9.vhd" 350 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.120 ns) + CELL(1.225 ns) 4.422 ns \\GenSpkS:Count11\[8\] 4 REG LAB_X26_Y8 5 " "Info: 4: + IC(1.120 ns) + CELL(1.225 ns) = 4.422 ns; Loc. = LAB_X26_Y8; Fanout = 5; REG Node = '\\GenSpkS:Count11\[8\]'" {  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.345 ns" { Equal2~101 \GenSpkS:Count11[8] } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.781 ns ( 40.28 % ) " "Info: Total cell delay = 1.781 ns ( 40.28 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.641 ns ( 59.72 % ) " "Info: Total interconnect delay = 2.641 ns ( 59.72 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "4.422 ns" { \GenSpkS:Count11[10] Equal2~100 Equal2~101 \GenSpkS:Count11[8] } "NODE_NAME" } }  } 0 0 "Estimated most critical path is %2!s! to %3!s! delay of %1!s!" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Info: Fitter routing operations beginning" {  } {  } 0 0 "Fitter routing operations beginning" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_PERCENT_ROUTING_RESOURCE_USAGE" "2 3 " "Info: Average interconnect usage is 2% of the available device resources. Peak interconnect usage is 3%" { { "Info" "IFITAPI_FITAPI_VPR_PEAK_ROUTING_REGION" "x14_y0 x27_y14 " "Info: The peak interconnect region extends from location x14_y0 to location x27_y14" {  } {  } 0 0 "The peak interconnect region extends from location %1!s! to location %2!s!" 0 0}  } {  } 0 0 "Average interconnect usage is %1!d!%% of the available device resources. Peak interconnect usage is %2!d!%%" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:01 " "Info: Fitter routing operations ending: elapsed time is 00:00:01" {  } {  } 0 0 "Fitter routing operations ending: elapsed time is %1!s!" 0 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Fixed Delay Chain Operation " "Info: Completed Fixed Delay Chain Operation" {  } {  } 0 0 "Completed %1!s!" 0 0}
{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0 0 "Started post-fitting delay annotation" 0 0}
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0 0 "Delay annotation completed successfully" 0 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Auto Delay Chain Operation " "Info: Completed Auto Delay Chain Operation" {  } {  } 0 0 "Completed %1!s!" 0 0}
{ "Info" "IFIOMGR_ALL_OUTPUT_ENABLE_GROUPS" "" "Info: Following groups of pins have the same output enable" { { "Info" "IFIOMGR_SAME_OUTPUT_ENABLE_GROUP" "ps2_clk_s " "Info: Following pins have the same output enable: ps2_clk_s" { { "Info" "IFIOMGR_SAME_OUTPUT_ENABLE_GROUP_SUB" "bidirectional ps2_clk LVTTL " "Info: Type bidirectional pin ps2_clk uses the LVTTL I/O standard" {  } { { "ps2_mouse9.vhd" "" { Text "D:/Ps2-ALL/ps2_mouse9.vhd" 13 -1 0 } } { "d:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "ps2_clk" } } } } { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { ps2_clk } "NODE_NAME" } } { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { ps2_clk } "NODE_NAME" } }  } 0 0 "Type %1!s! pin %2!s! uses the %3!s! I/O standard" 0 0} { "Info" "IFIOMGR_SAME_OUTPUT_ENABLE_GROUP_SUB" "bidirectional ps2_clk00 LVTTL " "Info: Type bidirectional pin ps2_clk00 uses the LVTTL I/O standard" {  } { { "ps2_mouse9.vhd" "" { Text "D:/Ps2-ALL/ps2_mouse9.vhd" 16 -1 0 } } { "d:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "ps2_clk00" } } } } { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { ps2_clk00 } "NODE_NAME" } } { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { ps2_clk00 } "NODE_NAME" } }  } 0 0 "Type %1!s! pin %2!s! uses the %3!s! I/O standard" 0 0}  } {  } 0 0 "Following pins have the same output enable: %1!s!" 0 0} { "Info" "IFIOMGR_SAME_OUTPUT_ENABLE_GROUP" "senddata\[0\] (inverted) " "Info: Following pins have the same output enable: senddata\[0\] (inverted)" { { "Info" "IFIOMGR_SAME_OUTPUT_ENABLE_GROUP_SUB" "bidirectional ps2_data LVTTL " "Info: Type bidirectional pin ps2_data uses the LVTTL I/O standard" {  } { { "ps2_mouse9.vhd" "" { Text "D:/Ps2-ALL/ps2_mouse9.vhd" 14 -1 0 } } { "d:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "ps2_data" } } } } { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { ps2_data } "NODE_NAME" } } { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { ps2_data } "NODE_NAME" } }  } 0 0 "Type %1!s! pin %2!s! uses the %3!s! I/O standard" 0 0}  } {  } 0 0 "Following pins have the same output enable: %1!s!" 0 0} { "Info" "IFIOMGR_SAME_OUTPUT_ENABLE_GROUP" "ps2:uA\|senddata\[0\] (inverted) " "Info: Following pins have the same output enable: ps2:uA\|senddata\[0\] (inverted)" { { "Info" "IFIOMGR_SAME_OUTPUT_ENABLE_GROUP_SUB" "bidirectional ps2_data00 LVTTL " "Info: Type bidirectional pin ps2_data00 uses the LVTTL I/O standard" {  } { { "ps2_mouse9.vhd" "" { Text "D:/Ps2-ALL/ps2_mouse9.vhd" 17 -1 0 } } { "d:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "ps2_data00" } } } } { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { ps2_data00 } "NODE_NAME" } } { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { ps2_data00 } "NODE_NAME" } }  } 0 0 "Type %1!s! pin %2!s! uses the %3!s! I/O standard" 0 0}  } {  } 0 0 "Following pins have the same output enable: %1!s!" 0 0}  } {  } 0 0 "Following groups of pins have the same output enable" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 1  Quartus II " "Info: Quartus II Fitter was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_BANNER_TIME" "Tue May 19 19:06:19 2009 " "Info: Processing ended: Tue May 19 19:06:19 2009" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:09 " "Info: Elapsed time: 00:00:09" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}
{ "Info" "IRDB_WROTE_SUPPRESSED_MSGS" "D:/Ps2-ALL/ps2_mouse9.fit.smsg " "Info: Generated suppressed messages file D:/Ps2-ALL/ps2_mouse9.fit.smsg" {  } {  } 0 0 "Generated suppressed messages file %1!s!" 0 0}