_csl_reszchecksettings.c

TI达芬奇dm644x各硬件模块测试代码

/** @file _csl_reszCheckSettings.c
 *
 *  @brief    File for functional layer of CSL API @a CSL_reszCheckSettings()
 *
 *  Description
 *    - The @a CSL_reszCheckSettings() function definition & it's associated
 *      functions
 *
 *  @date 11th May, 2005
 *  @author Jesse Villarreal
 */

#include <csl_resz_aux.h>
#include <csl_ccdc.h>
#include <csl_prev.h>

#pragma CODE_SECTION (CSL_reszCheckSettings, ".text:csl_section:resz");

/** @brief	Checks for register setting violations
 *			If there are no violations, the function will return a CSL_SOK condition
 *			and the response value will be equal to 0.  If there are any violations, 
 *			the function will return the CSL_ESYS_FAIL error and the response value will
 *			have bits set which indicate any violations found.  The following are the 
 *			violation codes for the bits of the response variable:
 *			
 *			 0:	Output Width is over the limit (4x-1/2x: width<1280, <1/2x-1/4x: width<640)
 *			 1: Output Width is not even
 *			 2: Output Width is not a multiple of 16 bytes (for vertical upsizing)
 *			 3.	Color Separate mode is turned on (when input source is not SDRAM)
 *			 4: Vertical Resize Ratio out of range (64..1024)
 *			 5: Horizontal Resize Ratio out of range (64..1024)
 *			 6: Input Height violation
 *			 7:	Input Width violation
 *			 8: Vertical Start Phase violation
 *			 9: Horizontal Start Phase violation 
 *			10: Input Height is larger than preview output height (if source is preview)
 *			11: Input Width is larger than preview output width (if source is preview)
 *			12: Input Height is larger than ccdc output height (if source is ccdc)
 *			13: Input Width is larger than ccdc output width (if source is ccdc)
 *			14: Input address is not zero (when input source is not SDRAM)
 *			15: Input offset is not zero (when input source is not SDRAM)
 *			16: Vertical Start Pixel is not zero (if source is SDRAM)
 *			17: Horizontal Start Pixel is beyond its maximum allowed value (if source is SDRAM)
 *			18: Warning: Unpreferred use of Bilinear Interpolation
 * 			19: Output Line offset (SDR_OUTOFF) is smaller than output line width
 *			20 - 31: RESERVED			
*/
CSL_Status  CSL_reszCheckSettings(
    /** Pointer to the object that holds reference to the
     *  instance of RESZ requested after the call 
	 */
    CSL_ReszHandle                         hResz,
    /** Pointer to structure holding the data
	 */
    CSL_ReszErrorBits				   *response
	){
    Uint32 vrz, hrz, vout, hout, vin, hin, vph, hph, bilin, type, source, addr, offset, outoffset, vStart, hStart;
	CSL_ReszErrorBits error = CSL_RESZ_ERR_NO_ERRORS;

	CSL_ReszRegsOvly reszRegs =  hResz->regs;
	
	// READ ALL OF THE PERTINENT REGISTER FIELDS

	vrz = CSL_FEXT(reszRegs->RSZ_CNT,RESZ_RSZ_CNT_VRSZ) + 1;
	hrz = CSL_FEXT(reszRegs->RSZ_CNT,RESZ_RSZ_CNT_HRSZ) + 1;

	vout = CSL_FEXT(reszRegs->OUT_SIZE,RESZ_OUT_SIZE_VERT);
	hout = CSL_FEXT(reszRegs->OUT_SIZE,RESZ_OUT_SIZE_HORZ);

	vin = CSL_FEXT(reszRegs->IN_SIZE,RESZ_IN_SIZE_VERT);
	hin = CSL_FEXT(reszRegs->IN_SIZE,RESZ_IN_SIZE_HORZ);

	vph = CSL_FEXT(reszRegs->RSZ_CNT,RESZ_RSZ_CNT_VSTPH);
	hph = CSL_FEXT(reszRegs->RSZ_CNT,RESZ_RSZ_CNT_HSTPH);

	bilin = CSL_FEXT(reszRegs->RSZ_CNT,RESZ_RSZ_CNT_CBILIN);

	type = CSL_FEXT(reszRegs->RSZ_CNT,RESZ_RSZ_CNT_INPTYP);

	source = CSL_FEXT(reszRegs->RSZ_CNT,RESZ_RSZ_CNT_INPSRC);

	addr = CSL_FEXT(reszRegs->SDR_INADD,RESZ_SDR_INADD_SDR_INADD);
	offset = CSL_FEXT(reszRegs->SDR_INOFF,RESZ_SDR_INOFF_OFFSET);

	outoffset = CSL_FEXT(reszRegs->SDR_OUTOFF,RESZ_SDR_OUTOFF_OFFSET);

	vStart = CSL_FEXT(reszRegs->IN_START,RESZ_IN_START_VERT_ST);
	hStart = CSL_FEXT(reszRegs->IN_START,RESZ_IN_START_HORZ_ST);


	//CHECK SETTINGS FOR VIOLATIONS

	if(hout%2)
		error |= CSL_RESZ_ERR_OUT_WIDTH_NOT_EVEN;

	{
		Uint16 shifter = 0;
		if (type == CSL_RESZ_TYPE_INTERLEAVED)
			shifter = 1;

		if(hout > (outoffset >> shifter))
			error |= CSL_RESZ_ERR_SDR_OUTOFF_TOO_SMALL;
	}

	if(vrz<256)	// vertical upsampling (zoom in)
	{
		Uint8 bytes = 16;
		if(type == CSL_RESZ_TYPE_INTERLEAVED)
			bytes = 8;
		
		if(hout%bytes)
			error |= CSL_RESZ_ERR_OUT_WIDTH_NOT_MULT_16;
	}


	if(	source != CSL_RESZ_INPUT_SDRAM)
	{
		if (type == CSL_RESZ_TYPE_SEPARATE)
			error |= CSL_RESZ_ERR_COLOR_SEP_ON;
		if (addr)
			error |= CSL_RESZ_ERR_IN_ADDR_NOT_ZERO;
		if (offset)
			error |= CSL_RESZ_ERR_IN_OFFSET_NOT_ZERO;
	}		
	else
	{
		Uint8 bytes = 31;
		if(type == CSL_RESZ_TYPE_INTERLEAVED)
			bytes = 15;
		
		if (hStart > bytes)
			error |= CSL_RESZ_ERR_HORZ_ST_PIX_OVER_MAX; // Horizontal Start line greater than spec requires

		if (vStart)
			error |= CSL_RESZ_ERR_VERT_ST_PIX_NOT_ZERO; // Vertical Start line is not zero
	}


	if(	vrz < 64	||
		vrz > 1024
	  )
	error |= CSL_RESZ_ERR_VERT_RATIO;	//Set vertical RSZ ratio out of Range
	

	if(	hrz < 64	||
		hrz > 1024
	  )
	error |= CSL_RESZ_ERR_HORZ_RATIO;	//Set horz RSZ ratio out of Range


	if(vrz>512)			// 7tap
	{
		if(hout>640)			
			error |= CSL_RESZ_ERR_OUT_WIDTH_OVER_LIMIT; //Set Horz out width over limit
		if(vph > 3)
			error |= CSL_RESZ_ERR_VERT_ST_PHASE; //Set Vert Start Phase incorrect
		if(vin != ((64*vph + 32 + (vout-1)*vrz)/256 + 7))
			error |= CSL_RESZ_ERR_INPUT_HEIGHT; //Set Vert input incorrect
	}
	else				// 4tap
	{
		if(hout>1280)			
			error |= CSL_RESZ_ERR_OUT_WIDTH_OVER_LIMIT; //Set Horz out width over limit
		if(vin != ((32*vph + 16 + (vout-1)*vrz)/256 + 4))
			error |= CSL_RESZ_ERR_INPUT_HEIGHT; //Set Vert input incorrect
	}


	if(hrz>512)			// 7tap
	{
		if(hph > 3)
			error |= CSL_RESZ_ERR_HORZ_ST_PHASE; //Set Horz Start Phase incorrect
		if(hin != ((64*hph + 32 + (hout-1)*hrz)/256 + 7))
			error |= CSL_RESZ_ERR_INPUT_WIDTH; //Set Horz input incorrect
	}
	else				// 4tap
	{
		if(hin != ((32*hph + 16 + (hout-1)*hrz)/256 + 7))
			error |= CSL_RESZ_ERR_INPUT_WIDTH; //Set Horz input incorrect
	}


	if(source == CSL_RESZ_INPUT_PREVIEW)
	{
		Uint16 width, height;
		CSL_CcdcRegsOvly ccdcRegs =  (CSL_CcdcRegsOvly)_CSL_ccdcGetBaseAddr(CSL_CCDC_0); 
		CSL_PrevRegsOvly prevRegs =  (CSL_PrevRegsOvly)_CSL_prevGetBaseAddr(CSL_PREV_0); 

		if(CSL_FEXT(ccdcRegs->SYN_MODE, CCDC_SYN_MODE_SDR2RSZ) == CSL_CCDC_SYN_MODE_SDR2RSZ_ENABLE)
		{
			width =		CSL_FEXT(ccdcRegs->HORZ_INFO, CCDC_HORZ_INFO_NPH) + 1;
			height =	CSL_FEXT(ccdcRegs->VERT_LINES, CCDC_VERT_LINES_NLV) + 1;

			if(vin > height)
				error |= CSL_RESZ_ERR_IN_HEIGHT_LARGER_CCDC; //Input height is larger than ccdc output height

			if(hin > width)
				error |= CSL_RESZ_ERR_IN_WIDTH_LARGER_CCDC; //Input width is larger than ccdc output width
		}
		else if (CSL_FEXT(prevRegs->PCR, PREV_PCR_RSZPORT) == CSL_PREV_PCR_RSZPORT_ENABLE)
		{

			/** As per the spec, the following table outlines how many pixels/lines
			are subtracted from the output of the input averager depending on which 
			modes are on:
	
			Function ON						Pix/line	Lines
			---------------------------------------------------
			Horizontal Median Filter		4			0
			Noise Filter					4			4
			CFA (bayer, Fuji, or Sony)		4			4
			CFA (Foveon or 2x dnsamp)		0			2
			"Color Suppression OR 
			Luminance Enhancement"			2			0
			---------------------------------------------------
			Maximum Total					14			8
			*/

			width =		CSL_FEXT(prevRegs->HORZ_INFO, PREV_HORZ_INFO_EPH) -
						CSL_FEXT(prevRegs->HORZ_INFO, PREV_HORZ_INFO_SPH) + 1;
		
			height =	CSL_FEXT(prevRegs->VERT_INFO, PREV_VERT_INFO_ELV) -
						CSL_FEXT(prevRegs->VERT_INFO, PREV_VERT_INFO_SLV) + 1;

			// Divide the width (by right shifting) by the number of averaged pixels
			width >>= CSL_FEXT(prevRegs->AVE, PREV_AVE_COUNT);
		
			if(CSL_FEXT(prevRegs->PCR, PREV_PCR_HMEDEN) == CSL_PREV_HMED_ENABLE)
				width -= 4;

			if(CSL_FEXT(prevRegs->PCR, PREV_PCR_NFEN) == CSL_PREV_NF_ENABLE) {
				width -= 4;
				height -= 4;
			}

			if(CSL_FEXT(prevRegs->PCR, PREV_PCR_CFAEN) == CSL_PREV_CFA_ENABLE) {
				Uint16 cfa;
				cfa = CSL_FEXT(prevRegs->PCR, PREV_PCR_CFAFMT);

				switch(cfa) {
	
					case CSL_PREV_CFAFMT_CONV_BAYER:
					case CSL_PREV_CFAFMT_SONY_VGAMODE:
					case CSL_PREV_CFAFMT_FUJI_HONEYCOMB:
						width -= 4;
						height -= 4;
						break;
	
						case CSL_PREV_CFAFMT_RGBFOVEON_BYPASSCFA:
					case CSL_PREV_CFAFMT_V_AND_H_2X_DNSAMPLE:
					case CSL_PREV_CFAFMT_RRRGGGBBBFOVEON:
						height -= 2;
						break;
	
					default:
						break;
				}
			}
		
			if(	CSL_FEXT(prevRegs->PCR, PREV_PCR_SUPEN) == CSL_PREV_SUP_ENABLE			||
				CSL_FEXT(prevRegs->PCR, PREV_PCR_YNENHEN) == CSL_PREV_NL_YENH_ENABLE
			  )
				width -= 2;
	
			if(vin > height)
				error |= CSL_RESZ_ERR_IN_HEIGHT_LARGER_PRV; //Input height is larger than preview output height

			if(hin > width)
				error |= CSL_RESZ_ERR_IN_WIDTH_LARGER_PRV; //Input width is larger than preview output width
		}
	}	

	if(	hrz<256 &&									// horizontal upsampling (zoom in)
		type == CSL_RESZ_TYPE_INTERLEAVED)
	{
		if(bilin != CSL_RESZ_CHROM_ALGO_BILINEAR)	
			error |= CSL_RESZ_ERR_BILINEAR_WARNING; // Bilinear Interpolation warning
	}
	else
		if(bilin == CSL_RESZ_CHROM_ALGO_BILINEAR)	
			error |= CSL_RESZ_ERR_BILINEAR_WARNING; // Bilinear Interpolation warning

				
	*response = error;

	if(error)
		return (CSL_ESYS_FAIL);
	else
		return (CSL_SOK);
}