cslr_venc_001.h

TI达芬奇dm644x各硬件模块测试代码

#define CSL_VENC_DCLKHR_DCHR_SHIFT       (0x00000000u)
#define CSL_VENC_DCLKHR_DCHR_RESETVAL    (0x00000000u)

#define CSL_VENC_DCLKHR_RESETVAL         (0x00000000u)

/* DCLKVS */

#define CSL_VENC_DCLKVS_DCVS_MASK        (0x00001FFFu)
#define CSL_VENC_DCLKVS_DCVS_SHIFT       (0x00000000u)
#define CSL_VENC_DCLKVS_DCVS_RESETVAL    (0x00000000u)

#define CSL_VENC_DCLKVS_RESETVAL         (0x00000000u)

/* DCLKVR */

#define CSL_VENC_DCLKVR_DCVR_MASK        (0x00001FFFu)
#define CSL_VENC_DCLKVR_DCVR_SHIFT       (0x00000000u)
#define CSL_VENC_DCLKVR_DCVR_RESETVAL    (0x00000000u)

#define CSL_VENC_DCLKVR_RESETVAL         (0x00000000u)

/* CAPCTL */

#define CSL_VENC_CAPCTL_CADF_MASK        (0x00007F00u)
#define CSL_VENC_CAPCTL_CADF_SHIFT       (0x00000008u)
#define CSL_VENC_CAPCTL_CADF_RESETVAL    (0x00000000u)

#define CSL_VENC_CAPCTL_CAPF_MASK        (0x00000003u)
#define CSL_VENC_CAPCTL_CAPF_SHIFT       (0x00000000u)
#define CSL_VENC_CAPCTL_CAPF_RESETVAL    (0x00000000u)

/*----CAPF Tokens----*/
#define CSL_VENC_CAPCTL_CAPF_NODATA      (0x00000000u)
#define CSL_VENC_CAPCTL_CAPF_ODD         (0x00000001u)
#define CSL_VENC_CAPCTL_CAPF_EVEN        (0x00000002u)
#define CSL_VENC_CAPCTL_CAPF_DUAL        (0x00000003u)

#define CSL_VENC_CAPCTL_RESETVAL         (0x00000000u)

/* CAPDO */

#define CSL_VENC_CAPDO_CADO0_MASK        (0x00007F00u)
#define CSL_VENC_CAPDO_CADO0_SHIFT       (0x00000008u)
#define CSL_VENC_CAPDO_CADO0_RESETVAL    (0x00000000u)

#define CSL_VENC_CAPDO_CADO1_MASK        (0x0000007Fu)
#define CSL_VENC_CAPDO_CADO1_SHIFT       (0x00000000u)
#define CSL_VENC_CAPDO_CADO1_RESETVAL    (0x00000000u)

#define CSL_VENC_CAPDO_RESETVAL          (0x00000000u)

/* CAPDE */

#define CSL_VENC_CAPDE_CADE0_MASK        (0x00007F00u)
#define CSL_VENC_CAPDE_CADE0_SHIFT       (0x00000008u)
#define CSL_VENC_CAPDE_CADE0_RESETVAL    (0x00000000u)

#define CSL_VENC_CAPDE_CADE1_MASK        (0x0000007Fu)
#define CSL_VENC_CAPDE_CADE1_SHIFT       (0x00000000u)
#define CSL_VENC_CAPDE_CADE1_RESETVAL    (0x00000000u)

#define CSL_VENC_CAPDE_RESETVAL          (0x00000000u)

/* ATR0 */

#define CSL_VENC_ATR0_ATR0_MASK          (0x000000FFu)
#define CSL_VENC_ATR0_ATR0_SHIFT         (0x00000000u)
#define CSL_VENC_ATR0_ATR0_RESETVAL      (0x00000000u)

#define CSL_VENC_ATR0_RESETVAL           (0x00000000u)

/* ATR1 */

#define CSL_VENC_ATR1_ATR1_MASK          (0x000000FFu)
#define CSL_VENC_ATR1_ATR1_SHIFT         (0x00000000u)
#define CSL_VENC_ATR1_ATR1_RESETVAL      (0x00000000u)

#define CSL_VENC_ATR1_RESETVAL           (0x00000000u)

/* ATR2 */

#define CSL_VENC_ATR2_ATR2_MASK          (0x000000FFu)
#define CSL_VENC_ATR2_ATR2_SHIFT         (0x00000000u)
#define CSL_VENC_ATR2_ATR2_RESETVAL      (0x00000000u)

#define CSL_VENC_ATR2_RESETVAL           (0x00000000u)

/* EPSON_LCDCTL */

#define CSL_VENC_EPSON_LCDCTL_YSCLS_MASK (0x00000080u)
#define CSL_VENC_EPSON_LCDCTL_YSCLS_SHIFT (0x00000007u)
#define CSL_VENC_EPSON_LCDCTL_YSCLS_RESETVAL (0x00000000u)

/*----YSCLS Tokens----*/
#define CSL_VENC_EPSON_LCDCTL_YSCLS_1PULSE (0x00000000u)
#define CSL_VENC_EPSON_LCDCTL_YSCLS_2PULSES (0x00000001u)

#define CSL_VENC_EPSON_LCDCTL_XINHS_MASK (0x00000040u)
#define CSL_VENC_EPSON_LCDCTL_XINHS_SHIFT (0x00000006u)
#define CSL_VENC_EPSON_LCDCTL_XINHS_RESETVAL (0x00000000u)

/*----XINHS Tokens----*/
#define CSL_VENC_EPSON_LCDCTL_XINHS_DCOUTPUT (0x00000000u)
#define CSL_VENC_EPSON_LCDCTL_XINHS_TGCONTROLLED (0x00000001u)

#define CSL_VENC_EPSON_LCDCTL_XINHL_MASK (0x00000020u)
#define CSL_VENC_EPSON_LCDCTL_XINHL_SHIFT (0x00000005u)
#define CSL_VENC_EPSON_LCDCTL_XINHL_RESETVAL (0x00000000u)

/*----XINHL Tokens----*/
#define CSL_VENC_EPSON_LCDCTL_XINHL_LLEVELOUT (0x00000000u)
#define CSL_VENC_EPSON_LCDCTL_XINHL_HLEVELOUT (0x00000001u)

#define CSL_VENC_EPSON_LCDCTL_SYSFID_MASK (0x00000010u)
#define CSL_VENC_EPSON_LCDCTL_SYSFID_SHIFT (0x00000004u)
#define CSL_VENC_EPSON_LCDCTL_SYSFID_RESETVAL (0x00000000u)

#define CSL_VENC_EPSON_LCDCTL_SYSSE_MASK (0x00000008u)
#define CSL_VENC_EPSON_LCDCTL_SYSSE_SHIFT (0x00000003u)
#define CSL_VENC_EPSON_LCDCTL_SYSSE_RESETVAL (0x00000000u)

/*----SYSSE Tokens----*/
#define CSL_VENC_EPSON_LCDCTL_SYSSE_OFF  (0x00000000u)
#define CSL_VENC_EPSON_LCDCTL_SYSSE_ON   (0x00000001u)

#define CSL_VENC_EPSON_LCDCTL_GCPS_MASK  (0x00000007u)
#define CSL_VENC_EPSON_LCDCTL_GCPS_SHIFT (0x00000000u)
#define CSL_VENC_EPSON_LCDCTL_GCPS_RESETVAL (0x00000000u)

/*----GCPS Tokens----*/
#define CSL_VENC_EPSON_LCDCTL_GCPS_ROM_TYPE0 (0x00000000u)
#define CSL_VENC_EPSON_LCDCTL_GCPS_ROM_TYPE1 (0x00000001u)
#define CSL_VENC_EPSON_LCDCTL_GCPS_ROM_TYPE2 (0x00000002u)
#define CSL_VENC_EPSON_LCDCTL_GCPS_ROM_TYPE3 (0x00000003u)
#define CSL_VENC_EPSON_LCDCTL_GCPS_RAM   (0x00000004u)

#define CSL_VENC_EPSON_LCDCTL_RESETVAL   (0x00000000u)

/* CASIO_LCDCTL */

#define CSL_VENC_CASIO_LCDCTL_CRIT_MASK  (0x00000008u)
#define CSL_VENC_CASIO_LCDCTL_CRIT_SHIFT (0x00000003u)
#define CSL_VENC_CASIO_LCDCTL_CRIT_RESETVAL (0x00000000u)

/*----CRIT Tokens----*/
#define CSL_VENC_CASIO_LCDCTL_CRIT_LLEVELOUT (0x00000000u)
#define CSL_VENC_CASIO_LCDCTL_CRIT_HLEVELOUT (0x00000001u)

#define CSL_VENC_CASIO_LCDCTL_CSTB_MASK  (0x00000004u)
#define CSL_VENC_CASIO_LCDCTL_CSTB_SHIFT (0x00000002u)
#define CSL_VENC_CASIO_LCDCTL_CSTB_RESETVAL (0x00000000u)

/*----CSTB Tokens----*/
#define CSL_VENC_CASIO_LCDCTL_CSTB_LLEVELOUT (0x00000000u)
#define CSL_VENC_CASIO_LCDCTL_CSTB_HLEVELOUT (0x00000001u)

#define CSL_VENC_CASIO_LCDCTL_CGRES_MASK (0x00000002u)
#define CSL_VENC_CASIO_LCDCTL_CGRES_SHIFT (0x00000001u)
#define CSL_VENC_CASIO_LCDCTL_CGRES_RESETVAL (0x00000000u)

/*----CGRES Tokens----*/
#define CSL_VENC_CASIO_LCDCTL_CGRES_NORMAL (0x00000000u)
#define CSL_VENC_CASIO_LCDCTL_CGRES_FIXEDLLEVEL (0x00000001u)

#define CSL_VENC_CASIO_LCDCTL_CDM_MASK   (0x00000001u)
#define CSL_VENC_CASIO_LCDCTL_CDM_SHIFT  (0x00000000u)
#define CSL_VENC_CASIO_LCDCTL_CDM_RESETVAL (0x00000000u)

/*----CDM Tokens----*/
#define CSL_VENC_CASIO_LCDCTL_CDM_NORMAL (0x00000000u)
#define CSL_VENC_CASIO_LCDCTL_CDM_VERTICALREVERSEMODE (0x00000001u)

#define CSL_VENC_CASIO_LCDCTL_RESETVAL   (0x00000000u)

/* UDISP_LCDCTL */

#define CSL_VENC_UDISP_LCDCTL_FSW_MASK   (0x000000FFu)
#define CSL_VENC_UDISP_LCDCTL_FSW_SHIFT  (0x00000000u)
#define CSL_VENC_UDISP_LCDCTL_FSW_RESETVAL (0x00000000u)

#define CSL_VENC_UDISP_LCDCTL_RESETVAL   (0x00000000u)

/* STN_LCDCTL */

#define CSL_VENC_STN_LCDCTL_FRCROT_MASK  (0x00000004u)
#define CSL_VENC_STN_LCDCTL_FRCROT_SHIFT (0x00000002u)
#define CSL_VENC_STN_LCDCTL_FRCROT_RESETVAL (0x00000000u)

/*----FRCROT Tokens----*/
#define CSL_VENC_STN_LCDCTL_FRCROT_DISABLE (0x00000000u)
#define CSL_VENC_STN_LCDCTL_FRCROT_ENABLE (0x00000001u)

#define CSL_VENC_STN_LCDCTL_SDW_MASK     (0x00000003u)
#define CSL_VENC_STN_LCDCTL_SDW_SHIFT    (0x00000000u)
#define CSL_VENC_STN_LCDCTL_SDW_RESETVAL (0x00000000u)

/*----SDW Tokens----*/
#define CSL_VENC_STN_LCDCTL_SDW_8BITS    (0x00000000u)
#define CSL_VENC_STN_LCDCTL_SDW_4BITS    (0x00000001u)
#define CSL_VENC_STN_LCDCTL_SDW_12BITS   (0x00000002u)
#define CSL_VENC_STN_LCDCTL_SDW_RESERVED (0x00000003u)

#define CSL_VENC_STN_LCDCTL_RESETVAL     (0x00000000u)

/* VSTAT */

#define CSL_VENC_VSTAT_CAEST_MASK        (0x00000200u)
#define CSL_VENC_VSTAT_CAEST_SHIFT       (0x00000009u)
#define CSL_VENC_VSTAT_CAEST_RESETVAL    (0x00000000u)

#define CSL_VENC_VSTAT_CAOST_MASK        (0x00000100u)
#define CSL_VENC_VSTAT_CAOST_SHIFT       (0x00000008u)
#define CSL_VENC_VSTAT_CAOST_RESETVAL    (0x00000000u)

#define CSL_VENC_VSTAT_FIDST_MASK        (0x00000010u)
#define CSL_VENC_VSTAT_FIDST_SHIFT       (0x00000004u)
#define CSL_VENC_VSTAT_FIDST_RESETVAL    (0x00000000u)

#define CSL_VENC_VSTAT_UDBAL_MASK        (0x00000002u)
#define CSL_VENC_VSTAT_UDBAL_SHIFT       (0x00000001u)
#define CSL_VENC_VSTAT_UDBAL_RESETVAL    (0x00000000u)

#define CSL_VENC_VSTAT_UDFUL_MASK        (0x00000001u)
#define CSL_VENC_VSTAT_UDFUL_SHIFT       (0x00000000u)
#define CSL_VENC_VSTAT_UDFUL_RESETVAL    (0x00000000u)

#define CSL_VENC_VSTAT_RESETVAL          (0x00000000u)

/* RAMADR */

#define CSL_VENC_RAMADR_RAMADR_MASK      (0x0000003Fu)
#define CSL_VENC_RAMADR_RAMADR_SHIFT     (0x00000000u)
#define CSL_VENC_RAMADR_RAMADR_RESETVAL  (0x00000000u)

#define CSL_VENC_RAMADR_RESETVAL         (0x00000000u)

/* RAMPORT */

#define CSL_VENC_RAMPORT_RAMPORT_MASK    (0x0000FFFFu)
#define CSL_VENC_RAMPORT_RAMPORT_SHIFT   (0x00000000u)
#define CSL_VENC_RAMPORT_RAMPORT_RESETVAL (0x00000000u)

#define CSL_VENC_RAMPORT_RESETVAL        (0x00000000u)

/* DACTST */

#define CSL_VENC_DACTST_DAPD3_MASK       (0x00008000u)
#define CSL_VENC_DACTST_DAPD3_SHIFT      (0x0000000Fu)
#define CSL_VENC_DACTST_DAPD3_RESETVAL   (0x00000001u)

/*----DAPD3 Tokens----*/
#define CSL_VENC_DACTST_DAPD3_NORMAL     (0x00000000u)
#define CSL_VENC_DACTST_DAPD3_PWRDN      (0x00000001u)

#define CSL_VENC_DACTST_DAPD2_MASK       (0x00004000u)
#define CSL_VENC_DACTST_DAPD2_SHIFT      (0x0000000Eu)
#define CSL_VENC_DACTST_DAPD2_RESETVAL   (0x00000001u)

/*----DAPD2 Tokens----*/
#define CSL_VENC_DACTST_DAPD2_NORMAL     (0x00000000u)
#define CSL_VENC_DACTST_DAPD2_PWRDN      (0x00000001u)

#define CSL_VENC_DACTST_DAPD1_MASK       (0x00002000u)
#define CSL_VENC_DACTST_DAPD1_SHIFT      (0x0000000Du)
#define CSL_VENC_DACTST_DAPD1_RESETVAL   (0x00000001u)

/*----DAPD1 Tokens----*/
#define CSL_VENC_DACTST_DAPD1_NORMAL     (0x00000000u)
#define CSL_VENC_DACTST_DAPD1_PWRDN      (0x00000001u)

#define CSL_VENC_DACTST_DAPD0_MASK       (0x00001000u)
#define CSL_VENC_DACTST_DAPD0_SHIFT      (0x0000000Cu)
#define CSL_VENC_DACTST_DAPD0_RESETVAL   (0x00000001u)

/*----DAPD0 Tokens----*/
#define CSL_VENC_DACTST_DAPD0_NORMAL     (0x00000000u)
#define CSL_VENC_DACTST_DAPD0_PWRDN      (0x00000001u)

#define CSL_VENC_DACTST_DACDC_MASK       (0x00000400u)
#define CSL_VENC_DACTST_DACDC_SHIFT      (0x0000000Au)
#define CSL_VENC_DACTST_DACDC_RESETVAL   (0x00000000u)

/*----DACDC Tokens----*/
#define CSL_VENC_DACTST_DACDC_NORMAL     (0x00000000u)
#define CSL_VENC_DACTST_DACDC_DCOUT      (0x00000001u)

#define CSL_VENC_DACTST_DALVL_MASK       (0x000003FFu)
#define CSL_VENC_DACTST_DALVL_SHIFT      (0x00000000u)
#define CSL_VENC_DACTST_DALVL_RESETVAL   (0x00000000u)

#define CSL_VENC_DACTST_RESETVAL         (0x0000F000u)

/* YCOLVL */

#define CSL_VENC_YCOLVL_YLVL_MASK        (0x0000FF00u)
#define CSL_VENC_YCOLVL_YLVL_SHIFT       (0x00000008u)
#define CSL_VENC_YCOLVL_YLVL_RESETVAL    (0x00000000u)

#define CSL_VENC_YCOLVL_CLVL_MASK        (0x000000FFu)
#define CSL_VENC_YCOLVL_CLVL_SHIFT       (0x00000000u)
#define CSL_VENC_YCOLVL_CLVL_RESETVAL    (0x00000000u)

#define CSL_VENC_YCOLVL_RESETVAL         (0x00000000u)

/* SCPROG */

#define CSL_VENC_SCPROG_SCSD_MASK        (0x000003FFu)
#define CSL_VENC_SCPROG_SCSD_SHIFT       (0x00000000u)
#define CSL_VENC_SCPROG_SCSD_RESETVAL    (0x0000017Au)

#define CSL_VENC_SCPROG_RESETVAL         (0x0000017Au)

/* RSV1 */

#define CSL_VENC_RSV1_RSV1_MASK          (0xFFFFFFFFu)
#define CSL_VENC_RSV1_RSV1_SHIFT         (0x00000000u)
#define CSL_VENC_RSV1_RSV1_RESETVAL      (0x00000000u)

#define CSL_VENC_RSV1_RESETVAL           (0x00000000u)

/* RSV2 */

#define CSL_VENC_RSV2_RSV2_MASK          (0xFFFFFFFFu)
#define CSL_VENC_RSV2_RSV2_SHIFT         (0x00000000u)
#define CSL_VENC_RSV2_RSV2_RESETVAL      (0x00000000u)

#define CSL_VENC_RSV2_RESETVAL           (0x00000000u)

/* RSV3 */

#define CSL_VENC_RSV3_RSV3_MASK          (0xFFFFFFFFu)
#define CSL_VENC_RSV3_RSV3_SHIFT         (0x00000000u)
#define CSL_VENC_RSV3_RSV3_RESETVAL      (0x00000000u)

#define CSL_VENC_RSV3_RESETVAL           (0x00000000u)

/* CVBS */

#define CSL_VENC_CVBS_YCDLY_MASK         (0x00007000u)
#define CSL_VENC_CVBS_YCDLY_SHIFT        (0x0000000Cu)
#define CSL_VENC_CVBS_YCDLY_RESETVAL     (0x00000000u)

/*----YCDLY Tokens----*/
#define CSL_VENC_CVBS_YCDLY_0            (0x00000000u)
#define CSL_VENC_CVBS_YCDLY_PLUS_1       (0x00000001u)
#define CSL_VENC_CVBS_YCDLY_PLUS_2       (0x00000002u)
#define CSL_VENC_CVBS_YCDLY_PLUS_3       (0x00000003u)
#define CSL_VENC_CVBS_YCDLY_MINUS_4      (0x00000004u)
#define CSL_VENC_CVBS_YCDLY_MINUS_3      (0x00000005u)
#define CSL_VENC_CVBS_YCDLY_MINUS_2      (0x00000006u)
#define CSL_VENC_CVBS_YCDLY_MINUS_1      (0x00000007u)

#define CSL_VENC_CVBS_CVLVL_MASK         (0x00000020u)
#define CSL_VENC_CVBS_CVLVL_SHIFT        (0x00000005u)
#define CSL_VENC_CVBS_CVLVL_RESETVAL     (0x00000000u)

/*----CVLVL Tokens----*/
#define CSL_VENC_CVBS_CVLVL_286MV_714MV  (0x00000000u)
#define CSL_VENC_CVBS_CVLVL_300MV_700MV  (0x00000001u)

#define CSL_VENC_CVBS_CSTUP_MASK         (0x00000010u)