cslr_osd_001.h

TI达芬奇dm644x各硬件模块测试代码

#define CSL_OSD_CURXP_RCSX_SHIFT         (0x00000000u)
#define CSL_OSD_CURXP_RCSX_RESETVAL      (0x00000000u)

#define CSL_OSD_CURXP_RESETVAL           (0x00000000u)

/* CURYP */

#define CSL_OSD_CURYP_RCSY_MASK          (0x000001FFu)
#define CSL_OSD_CURYP_RCSY_SHIFT         (0x00000000u)
#define CSL_OSD_CURYP_RCSY_RESETVAL      (0x00000000u)

#define CSL_OSD_CURYP_RESETVAL           (0x00000000u)

/* CURXL */

#define CSL_OSD_CURXL_RCSW_MASK          (0x00000FFFu)
#define CSL_OSD_CURXL_RCSW_SHIFT         (0x00000000u)
#define CSL_OSD_CURXL_RCSW_RESETVAL      (0x00000000u)

#define CSL_OSD_CURXL_RESETVAL           (0x00000000u)

/* CURYL */

#define CSL_OSD_CURYL_RCSH_MASK          (0x000007FFu)
#define CSL_OSD_CURYL_RCSH_SHIFT         (0x00000000u)
#define CSL_OSD_CURYL_RCSH_RESETVAL      (0x00000000u)

#define CSL_OSD_CURYL_RESETVAL           (0x00000000u)

/* RSV3 */

#define CSL_OSD_RSV3_RSV3_MASK           (0xFFFFFFFFu)
#define CSL_OSD_RSV3_RSV3_SHIFT          (0x00000000u)
#define CSL_OSD_RSV3_RSV3_RESETVAL       (0x00000000u)

#define CSL_OSD_RSV3_RESETVAL            (0x00000000u)

/* RSV4 */

#define CSL_OSD_RSV4_RSV4_MASK           (0xFFFFFFFFu)
#define CSL_OSD_RSV4_RSV4_SHIFT          (0x00000000u)
#define CSL_OSD_RSV4_RSV4_RESETVAL       (0x00000000u)

#define CSL_OSD_RSV4_RESETVAL            (0x00000000u)

/* W0BMP01 */

#define CSL_OSD_W0BMP01_PAL01_MASK       (0x0000FF00u)
#define CSL_OSD_W0BMP01_PAL01_SHIFT      (0x00000008u)
#define CSL_OSD_W0BMP01_PAL01_RESETVAL   (0x00000000u)

#define CSL_OSD_W0BMP01_PAL00_MASK       (0x000000FFu)
#define CSL_OSD_W0BMP01_PAL00_SHIFT      (0x00000000u)
#define CSL_OSD_W0BMP01_PAL00_RESETVAL   (0x00000000u)

#define CSL_OSD_W0BMP01_RESETVAL         (0x00000000u)

/* W0BMP23 */

#define CSL_OSD_W0BMP23_PAL03_MASK       (0x0000FF00u)
#define CSL_OSD_W0BMP23_PAL03_SHIFT      (0x00000008u)
#define CSL_OSD_W0BMP23_PAL03_RESETVAL   (0x00000000u)

#define CSL_OSD_W0BMP23_PAL02_MASK       (0x000000FFu)
#define CSL_OSD_W0BMP23_PAL02_SHIFT      (0x00000000u)
#define CSL_OSD_W0BMP23_PAL02_RESETVAL   (0x00000000u)

#define CSL_OSD_W0BMP23_RESETVAL         (0x00000000u)

/* W0BMP45 */

#define CSL_OSD_W0BMP45_PAL05_MASK       (0x0000FF00u)
#define CSL_OSD_W0BMP45_PAL05_SHIFT      (0x00000008u)
#define CSL_OSD_W0BMP45_PAL05_RESETVAL   (0x00000000u)

#define CSL_OSD_W0BMP45_PAL04_MASK       (0x000000FFu)
#define CSL_OSD_W0BMP45_PAL04_SHIFT      (0x00000000u)
#define CSL_OSD_W0BMP45_PAL04_RESETVAL   (0x00000000u)

#define CSL_OSD_W0BMP45_RESETVAL         (0x00000000u)

/* W0BMP67 */

#define CSL_OSD_W0BMP67_PAL07_MASK       (0x0000FF00u)
#define CSL_OSD_W0BMP67_PAL07_SHIFT      (0x00000008u)
#define CSL_OSD_W0BMP67_PAL07_RESETVAL   (0x00000000u)

#define CSL_OSD_W0BMP67_PAL06_MASK       (0x000000FFu)
#define CSL_OSD_W0BMP67_PAL06_SHIFT      (0x00000000u)
#define CSL_OSD_W0BMP67_PAL06_RESETVAL   (0x00000000u)

#define CSL_OSD_W0BMP67_RESETVAL         (0x00000000u)

/* W0BMP89 */

#define CSL_OSD_W0BMP89_PAL09_MASK       (0x0000FF00u)
#define CSL_OSD_W0BMP89_PAL09_SHIFT      (0x00000008u)
#define CSL_OSD_W0BMP89_PAL09_RESETVAL   (0x00000000u)

#define CSL_OSD_W0BMP89_PAL08_MASK       (0x000000FFu)
#define CSL_OSD_W0BMP89_PAL08_SHIFT      (0x00000000u)
#define CSL_OSD_W0BMP89_PAL08_RESETVAL   (0x00000000u)

#define CSL_OSD_W0BMP89_RESETVAL         (0x00000000u)

/* W0BMPAB */

#define CSL_OSD_W0BMPAB_PAL11_MASK       (0x0000FF00u)
#define CSL_OSD_W0BMPAB_PAL11_SHIFT      (0x00000008u)
#define CSL_OSD_W0BMPAB_PAL11_RESETVAL   (0x00000000u)

#define CSL_OSD_W0BMPAB_PAL10_MASK       (0x000000FFu)
#define CSL_OSD_W0BMPAB_PAL10_SHIFT      (0x00000000u)
#define CSL_OSD_W0BMPAB_PAL10_RESETVAL   (0x00000000u)

#define CSL_OSD_W0BMPAB_RESETVAL         (0x00000000u)

/* W0BMPCD */

#define CSL_OSD_W0BMPCD_PAL13_MASK       (0x0000FF00u)
#define CSL_OSD_W0BMPCD_PAL13_SHIFT      (0x00000008u)
#define CSL_OSD_W0BMPCD_PAL13_RESETVAL   (0x00000000u)

#define CSL_OSD_W0BMPCD_PAL12_MASK       (0x000000FFu)
#define CSL_OSD_W0BMPCD_PAL12_SHIFT      (0x00000000u)
#define CSL_OSD_W0BMPCD_PAL12_RESETVAL   (0x00000000u)

#define CSL_OSD_W0BMPCD_RESETVAL         (0x00000000u)

/* W0BMPEF */

#define CSL_OSD_W0BMPEF_PAL15_MASK       (0x0000FF00u)
#define CSL_OSD_W0BMPEF_PAL15_SHIFT      (0x00000008u)
#define CSL_OSD_W0BMPEF_PAL15_RESETVAL   (0x00000000u)

#define CSL_OSD_W0BMPEF_PAL14_MASK       (0x000000FFu)
#define CSL_OSD_W0BMPEF_PAL14_SHIFT      (0x00000000u)
#define CSL_OSD_W0BMPEF_PAL14_RESETVAL   (0x00000000u)

#define CSL_OSD_W0BMPEF_RESETVAL         (0x00000000u)

/* W1BMP01 */

#define CSL_OSD_W1BMP01_PAL01_MASK       (0x0000FF00u)
#define CSL_OSD_W1BMP01_PAL01_SHIFT      (0x00000008u)
#define CSL_OSD_W1BMP01_PAL01_RESETVAL   (0x00000000u)

#define CSL_OSD_W1BMP01_PAL00_MASK       (0x000000FFu)
#define CSL_OSD_W1BMP01_PAL00_SHIFT      (0x00000000u)
#define CSL_OSD_W1BMP01_PAL00_RESETVAL   (0x00000000u)

#define CSL_OSD_W1BMP01_RESETVAL         (0x00000000u)

/* W1BMP23 */

#define CSL_OSD_W1BMP23_PAL03_MASK       (0x0000FF00u)
#define CSL_OSD_W1BMP23_PAL03_SHIFT      (0x00000008u)
#define CSL_OSD_W1BMP23_PAL03_RESETVAL   (0x00000000u)

#define CSL_OSD_W1BMP23_PAL02_MASK       (0x000000FFu)
#define CSL_OSD_W1BMP23_PAL02_SHIFT      (0x00000000u)
#define CSL_OSD_W1BMP23_PAL02_RESETVAL   (0x00000000u)

#define CSL_OSD_W1BMP23_RESETVAL         (0x00000000u)

/* W1BMP45 */

#define CSL_OSD_W1BMP45_PAL05_MASK       (0x0000FF00u)
#define CSL_OSD_W1BMP45_PAL05_SHIFT      (0x00000008u)
#define CSL_OSD_W1BMP45_PAL05_RESETVAL   (0x00000000u)

#define CSL_OSD_W1BMP45_PAL04_MASK       (0x000000FFu)
#define CSL_OSD_W1BMP45_PAL04_SHIFT      (0x00000000u)
#define CSL_OSD_W1BMP45_PAL04_RESETVAL   (0x00000000u)

#define CSL_OSD_W1BMP45_RESETVAL         (0x00000000u)

/* W1BMP67 */

#define CSL_OSD_W1BMP67_PAL07_MASK       (0x0000FF00u)
#define CSL_OSD_W1BMP67_PAL07_SHIFT      (0x00000008u)
#define CSL_OSD_W1BMP67_PAL07_RESETVAL   (0x00000000u)

#define CSL_OSD_W1BMP67_PAL06_MASK       (0x000000FFu)
#define CSL_OSD_W1BMP67_PAL06_SHIFT      (0x00000000u)
#define CSL_OSD_W1BMP67_PAL06_RESETVAL   (0x00000000u)

#define CSL_OSD_W1BMP67_RESETVAL         (0x00000000u)

/* W1BMP89 */

#define CSL_OSD_W1BMP89_PAL09_MASK       (0x0000FF00u)
#define CSL_OSD_W1BMP89_PAL09_SHIFT      (0x00000008u)
#define CSL_OSD_W1BMP89_PAL09_RESETVAL   (0x00000000u)

#define CSL_OSD_W1BMP89_PAL08_MASK       (0x000000FFu)
#define CSL_OSD_W1BMP89_PAL08_SHIFT      (0x00000000u)
#define CSL_OSD_W1BMP89_PAL08_RESETVAL   (0x00000000u)

#define CSL_OSD_W1BMP89_RESETVAL         (0x00000000u)

/* W1BMPAB */

#define CSL_OSD_W1BMPAB_PAL11_MASK       (0x0000FF00u)
#define CSL_OSD_W1BMPAB_PAL11_SHIFT      (0x00000008u)
#define CSL_OSD_W1BMPAB_PAL11_RESETVAL   (0x00000000u)

#define CSL_OSD_W1BMPAB_PAL10_MASK       (0x000000FFu)
#define CSL_OSD_W1BMPAB_PAL10_SHIFT      (0x00000000u)
#define CSL_OSD_W1BMPAB_PAL10_RESETVAL   (0x00000000u)

#define CSL_OSD_W1BMPAB_RESETVAL         (0x00000000u)

/* W1BMPCD */

#define CSL_OSD_W1BMPCD_PAL13_MASK       (0x0000FF00u)
#define CSL_OSD_W1BMPCD_PAL13_SHIFT      (0x00000008u)
#define CSL_OSD_W1BMPCD_PAL13_RESETVAL   (0x00000000u)

#define CSL_OSD_W1BMPCD_PAL12_MASK       (0x000000FFu)
#define CSL_OSD_W1BMPCD_PAL12_SHIFT      (0x00000000u)
#define CSL_OSD_W1BMPCD_PAL12_RESETVAL   (0x00000000u)

#define CSL_OSD_W1BMPCD_RESETVAL         (0x00000000u)

/* W1BMPEF */

#define CSL_OSD_W1BMPEF_PAL15_MASK       (0x0000FF00u)
#define CSL_OSD_W1BMPEF_PAL15_SHIFT      (0x00000008u)
#define CSL_OSD_W1BMPEF_PAL15_RESETVAL   (0x00000000u)

#define CSL_OSD_W1BMPEF_PAL14_MASK       (0x000000FFu)
#define CSL_OSD_W1BMPEF_PAL14_SHIFT      (0x00000000u)
#define CSL_OSD_W1BMPEF_PAL14_RESETVAL   (0x00000000u)

#define CSL_OSD_W1BMPEF_RESETVAL         (0x00000000u)

/* TI_TEST */

#define CSL_OSD_TI_TEST_TEST1_MASK       (0x00000002u)
#define CSL_OSD_TI_TEST_TEST1_SHIFT      (0x00000001u)
#define CSL_OSD_TI_TEST_TEST1_RESETVAL   (0x00000000u)

/*----TEST1 Tokens----*/
#define CSL_OSD_TI_TEST_TEST1_NORMAL     (0x00000000u)
#define CSL_OSD_TI_TEST_TEST1_RESET_ALL_REGS (0x00000001u)

#define CSL_OSD_TI_TEST_TEST0_MASK       (0x00000001u)
#define CSL_OSD_TI_TEST_TEST0_SHIFT      (0x00000000u)
#define CSL_OSD_TI_TEST_TEST0_RESETVAL   (0x00000000u)

/*----TEST0 Tokens----*/
#define CSL_OSD_TI_TEST_TEST0_NORMAL     (0x00000000u)
#define CSL_OSD_TI_TEST_TEST0_TEST_MDODE (0x00000001u)

#define CSL_OSD_TI_TEST_RESETVAL         (0x00000000u)

/* MISCCTL */

#define CSL_OSD_MISCCTL_RGBEN_MASK       (0x00000080u)
#define CSL_OSD_MISCCTL_RGBEN_SHIFT      (0x00000007u)
#define CSL_OSD_MISCCTL_RGBEN_RESETVAL   (0x00000000u)

/*----RGBEN Tokens----*/
#define CSL_OSD_MISCCTL_RGBEN_DISABLE    (0x00000000u)
#define CSL_OSD_MISCCTL_RGBEN_ENABLE     (0x00000001u)

#define CSL_OSD_MISCCTL_RGBWIN_MASK      (0x00000040u)
#define CSL_OSD_MISCCTL_RGBWIN_SHIFT     (0x00000006u)
#define CSL_OSD_MISCCTL_RGBWIN_RESETVAL  (0x00000000u)

/*----RGBWIN Tokens----*/
#define CSL_OSD_MISCCTL_RGBWIN_VIDWIN0   (0x00000000u)
#define CSL_OSD_MISCCTL_RGBWIN_VIDWIN1   (0x00000001u)

#define CSL_OSD_MISCCTL_TMON_MASK        (0x00000020u)
#define CSL_OSD_MISCCTL_TMON_SHIFT       (0x00000005u)
#define CSL_OSD_MISCCTL_TMON_RESETVAL    (0x00000000u)

#define CSL_OSD_MISCCTL_RSEL_MASK        (0x00000010u)
#define CSL_OSD_MISCCTL_RSEL_SHIFT       (0x00000004u)
#define CSL_OSD_MISCCTL_RSEL_RESETVAL    (0x00000000u)

/*----RSEL Tokens----*/
#define CSL_OSD_MISCCTL_RSEL_CLUT0_DM270 (0x00000000u)
#define CSL_OSD_MISCCTL_RSEL_CLUT1_DM320 (0x00000001u)

#define CSL_OSD_MISCCTL_CPBSY_MASK       (0x00000008u)
#define CSL_OSD_MISCCTL_CPBSY_SHIFT      (0x00000003u)
#define CSL_OSD_MISCCTL_CPBSY_RESETVAL   (0x00000000u)

/*----CPBSY Tokens----*/
#define CSL_OSD_MISCCTL_CPBSY_NOTBUSY    (0x00000000u)
#define CSL_OSD_MISCCTL_CPBSY_BUSY       (0x00000001u)

#define CSL_OSD_MISCCTL_PPSW_MASK        (0x00000004u)
#define CSL_OSD_MISCCTL_PPSW_SHIFT       (0x00000002u)
#define CSL_OSD_MISCCTL_PPSW_RESETVAL    (0x00000000u)

/*----PPSW Tokens----*/
#define CSL_OSD_MISCCTL_PPSW_PPRV0_V0ADR_PPRV1_PPADR (0x00000000u)
#define CSL_OSD_MISCCTL_PPSW_PPRV0_PPADR_PPRV1_V0ADR (0x00000001u)

#define CSL_OSD_MISCCTL_PPRV_MASK        (0x00000002u)
#define CSL_OSD_MISCCTL_PPRV_SHIFT       (0x00000001u)
#define CSL_OSD_MISCCTL_PPRV_RESETVAL    (0x00000000u)

#define CSL_OSD_MISCCTL_RESETVAL         (0x00000000u)

/* RSV5 */

#define CSL_OSD_RSV5_RSV5_MASK           (0xFFFFFFFFu)
#define CSL_OSD_RSV5_RSV5_SHIFT          (0x00000000u)
#define CSL_OSD_RSV5_RSV5_RESETVAL       (0x00000000u)

#define CSL_OSD_RSV5_RESETVAL            (0x00000000u)

/* CLUTRAMYCB */

#define CSL_OSD_CLUTRAMYCB_Y_MASK        (0x0000FF00u)
#define CSL_OSD_CLUTRAMYCB_Y_SHIFT       (0x00000008u)
#define CSL_OSD_CLUTRAMYCB_Y_RESETVAL    (0x00000000u)

#define CSL_OSD_CLUTRAMYCB_CB_MASK       (0x000000FFu)
#define CSL_OSD_CLUTRAMYCB_CB_SHIFT      (0x00000000u)
#define CSL_OSD_CLUTRAMYCB_CB_RESETVAL   (0x00000000u)

#define CSL_OSD_CLUTRAMYCB_RESETVAL      (0x00000000u)

/* CLUTRAMCR */

#define CSL_OSD_CLUTRAMCR_CR_MASK        (0x0000FF00u)
#define CSL_OSD_CLUTRAMCR_CR_SHIFT       (0x00000008u)
#define CSL_OSD_CLUTRAMCR_CR_RESETVAL    (0x00000000u)

#define CSL_OSD_CLUTRAMCR_CADDR_MASK     (0x000000FFu)
#define CSL_OSD_CLUTRAMCR_CADDR_SHIFT    (0x00000000u)
#define CSL_OSD_CLUTRAMCR_CADDR_RESETVAL (0x00000000u)

#define CSL_OSD_CLUTRAMCR_RESETVAL       (0x00000000u)

/* TRANSPVAL */

#define CSL_OSD_TRANSPVAL_RGBTRANS_MASK  (0x0000FFFFu)
#define CSL_OSD_TRANSPVAL_RGBTRANS_SHIFT (0x00000000u)
#define CSL_OSD_TRANSPVAL_RGBTRANS_RESETVAL (0x00000000u)

#define CSL_OSD_TRANSPVAL_RESETVAL       (0x00000000u)

/* RSV6 */

#define CSL_OSD_RSV6_RSV6_MASK           (0xFFFFFFFFu)
#define CSL_OSD_RSV6_RSV6_SHIFT          (0x00000000u)
#define CSL_OSD_RSV6_RSV6_RESETVAL       (0x00000000u)

#define CSL_OSD_RSV6_RESETVAL            (0x00000000u)

/* PPVWIN0ADR */

#define CSL_OSD_PPVWIN0ADR_PPVWIN0ADR_MASK (0xFFFFFFFFu)
#define CSL_OSD_PPVWIN0ADR_PPVWIN0ADR_SHIFT (0x00000000u)
#define CSL_OSD_PPVWIN0ADR_PPVWIN0ADR_RESETVAL (0x00000000u)

#define CSL_OSD_PPVWIN0ADR_RESETVAL      (0x00000000u)

#endif