cslr_vpss_001.h

TI达芬奇dm644x各硬件模块测试代码

#define CSL_VPSS_PRV_WR_1_RESETVAL       (0x00000000u)

/* PRV_WR_2 */

#define CSL_VPSS_PRV_WR_2_BYTE_CNT_MASK  (0x3FC00000u)
#define CSL_VPSS_PRV_WR_2_BYTE_CNT_SHIFT (0x00000016u)
#define CSL_VPSS_PRV_WR_2_BYTE_CNT_RESETVAL (0x00000000u)

#define CSL_VPSS_PRV_WR_2_DATA_READY_MASK (0x00200000u)
#define CSL_VPSS_PRV_WR_2_DATA_READY_SHIFT (0x00000015u)
#define CSL_VPSS_PRV_WR_2_DATA_READY_RESETVAL (0x00000000u)

/*----DATA_READY Tokens----*/
#define CSL_VPSS_PRV_WR_2_DATA_READY_NO  (0x00000000u)
#define CSL_VPSS_PRV_WR_2_DATA_READY_YES (0x00000001u)

#define CSL_VPSS_PRV_WR_2_DATA_SENT_MASK (0x00100000u)
#define CSL_VPSS_PRV_WR_2_DATA_SENT_SHIFT (0x00000014u)
#define CSL_VPSS_PRV_WR_2_DATA_SENT_RESETVAL (0x00000000u)

/*----DATA_SENT Tokens----*/
#define CSL_VPSS_PRV_WR_2_DATA_SENT_NO   (0x00000000u)
#define CSL_VPSS_PRV_WR_2_DATA_SENT_YES  (0x00000001u)

#define CSL_VPSS_PRV_WR_2_ADDR_MASK      (0x000FFFFFu)
#define CSL_VPSS_PRV_WR_2_ADDR_SHIFT     (0x00000000u)
#define CSL_VPSS_PRV_WR_2_ADDR_RESETVAL  (0x00000000u)

#define CSL_VPSS_PRV_WR_2_RESETVAL       (0x00000000u)

/* PRV_WR_3 */

#define CSL_VPSS_PRV_WR_3_BYTE_CNT_MASK  (0x3FC00000u)
#define CSL_VPSS_PRV_WR_3_BYTE_CNT_SHIFT (0x00000016u)
#define CSL_VPSS_PRV_WR_3_BYTE_CNT_RESETVAL (0x00000000u)

#define CSL_VPSS_PRV_WR_3_DATA_READY_MASK (0x00200000u)
#define CSL_VPSS_PRV_WR_3_DATA_READY_SHIFT (0x00000015u)
#define CSL_VPSS_PRV_WR_3_DATA_READY_RESETVAL (0x00000000u)

/*----DATA_READY Tokens----*/
#define CSL_VPSS_PRV_WR_3_DATA_READY_NO  (0x00000000u)
#define CSL_VPSS_PRV_WR_3_DATA_READY_YES (0x00000001u)

#define CSL_VPSS_PRV_WR_3_DATA_SENT_MASK (0x00100000u)
#define CSL_VPSS_PRV_WR_3_DATA_SENT_SHIFT (0x00000014u)
#define CSL_VPSS_PRV_WR_3_DATA_SENT_RESETVAL (0x00000000u)

/*----DATA_SENT Tokens----*/
#define CSL_VPSS_PRV_WR_3_DATA_SENT_NO   (0x00000000u)
#define CSL_VPSS_PRV_WR_3_DATA_SENT_YES  (0x00000001u)

#define CSL_VPSS_PRV_WR_3_ADDR_MASK      (0x000FFFFFu)
#define CSL_VPSS_PRV_WR_3_ADDR_SHIFT     (0x00000000u)
#define CSL_VPSS_PRV_WR_3_ADDR_RESETVAL  (0x00000000u)

#define CSL_VPSS_PRV_WR_3_RESETVAL       (0x00000000u)

/* PRV_DK_RD_0 */

#define CSL_VPSS_PRV_DK_RD_0_VALID_MASK  (0x40000000u)
#define CSL_VPSS_PRV_DK_RD_0_VALID_SHIFT (0x0000001Eu)
#define CSL_VPSS_PRV_DK_RD_0_VALID_RESETVAL (0x00000000u)

/*----VALID Tokens----*/
#define CSL_VPSS_PRV_DK_RD_0_VALID_NOTVALID (0x00000000u)
#define CSL_VPSS_PRV_DK_RD_0_VALID_VALID (0x00000001u)

#define CSL_VPSS_PRV_DK_RD_0_DATA_WAIT_MASK (0x20000000u)
#define CSL_VPSS_PRV_DK_RD_0_DATA_WAIT_SHIFT (0x0000001Du)
#define CSL_VPSS_PRV_DK_RD_0_DATA_WAIT_RESETVAL (0x00000000u)

/*----DATA_WAIT Tokens----*/
#define CSL_VPSS_PRV_DK_RD_0_DATA_WAIT_NO (0x00000000u)
#define CSL_VPSS_PRV_DK_RD_0_DATA_WAIT_YES (0x00000001u)

#define CSL_VPSS_PRV_DK_RD_0_DATA_AVL_MASK (0x10000000u)
#define CSL_VPSS_PRV_DK_RD_0_DATA_AVL_SHIFT (0x0000001Cu)
#define CSL_VPSS_PRV_DK_RD_0_DATA_AVL_RESETVAL (0x00000000u)

/*----DATA_AVL Tokens----*/
#define CSL_VPSS_PRV_DK_RD_0_DATA_AVL_NO (0x00000000u)
#define CSL_VPSS_PRV_DK_RD_0_DATA_AVL_YES (0x00000001u)

#define CSL_VPSS_PRV_DK_RD_0_BYTE_CNT_MASK (0x0FF00000u)
#define CSL_VPSS_PRV_DK_RD_0_BYTE_CNT_SHIFT (0x00000014u)
#define CSL_VPSS_PRV_DK_RD_0_BYTE_CNT_RESETVAL (0x00000000u)

#define CSL_VPSS_PRV_DK_RD_0_ADDR_MASK   (0x000FFFFFu)
#define CSL_VPSS_PRV_DK_RD_0_ADDR_SHIFT  (0x00000000u)
#define CSL_VPSS_PRV_DK_RD_0_ADDR_RESETVAL (0x00000000u)

#define CSL_VPSS_PRV_DK_RD_0_RESETVAL    (0x00000000u)

/* PRV_DK_RD_1 */

#define CSL_VPSS_PRV_DK_RD_1_VALID_MASK  (0x40000000u)
#define CSL_VPSS_PRV_DK_RD_1_VALID_SHIFT (0x0000001Eu)
#define CSL_VPSS_PRV_DK_RD_1_VALID_RESETVAL (0x00000000u)

/*----VALID Tokens----*/
#define CSL_VPSS_PRV_DK_RD_1_VALID_NOTVALID (0x00000000u)
#define CSL_VPSS_PRV_DK_RD_1_VALID_VALID (0x00000001u)

#define CSL_VPSS_PRV_DK_RD_1_DATA_WAIT_MASK (0x20000000u)
#define CSL_VPSS_PRV_DK_RD_1_DATA_WAIT_SHIFT (0x0000001Du)
#define CSL_VPSS_PRV_DK_RD_1_DATA_WAIT_RESETVAL (0x00000000u)

/*----DATA_WAIT Tokens----*/
#define CSL_VPSS_PRV_DK_RD_1_DATA_WAIT_NO (0x00000000u)
#define CSL_VPSS_PRV_DK_RD_1_DATA_WAIT_YES (0x00000001u)

#define CSL_VPSS_PRV_DK_RD_1_DATA_AVL_MASK (0x10000000u)
#define CSL_VPSS_PRV_DK_RD_1_DATA_AVL_SHIFT (0x0000001Cu)
#define CSL_VPSS_PRV_DK_RD_1_DATA_AVL_RESETVAL (0x00000000u)

/*----DATA_AVL Tokens----*/
#define CSL_VPSS_PRV_DK_RD_1_DATA_AVL_NO (0x00000000u)
#define CSL_VPSS_PRV_DK_RD_1_DATA_AVL_YES (0x00000001u)

#define CSL_VPSS_PRV_DK_RD_1_BYTE_CNT_MASK (0x0FF00000u)
#define CSL_VPSS_PRV_DK_RD_1_BYTE_CNT_SHIFT (0x00000014u)
#define CSL_VPSS_PRV_DK_RD_1_BYTE_CNT_RESETVAL (0x00000000u)

#define CSL_VPSS_PRV_DK_RD_1_ADDR_MASK   (0x000FFFFFu)
#define CSL_VPSS_PRV_DK_RD_1_ADDR_SHIFT  (0x00000000u)
#define CSL_VPSS_PRV_DK_RD_1_ADDR_RESETVAL (0x00000000u)

#define CSL_VPSS_PRV_DK_RD_1_RESETVAL    (0x00000000u)

/* PRV_DK_RD_2 */

#define CSL_VPSS_PRV_DK_RD_2_VALID_MASK  (0x40000000u)
#define CSL_VPSS_PRV_DK_RD_2_VALID_SHIFT (0x0000001Eu)
#define CSL_VPSS_PRV_DK_RD_2_VALID_RESETVAL (0x00000000u)

/*----VALID Tokens----*/
#define CSL_VPSS_PRV_DK_RD_2_VALID_NOTVALID (0x00000000u)
#define CSL_VPSS_PRV_DK_RD_2_VALID_VALID (0x00000001u)

#define CSL_VPSS_PRV_DK_RD_2_DATA_WAIT_MASK (0x20000000u)
#define CSL_VPSS_PRV_DK_RD_2_DATA_WAIT_SHIFT (0x0000001Du)
#define CSL_VPSS_PRV_DK_RD_2_DATA_WAIT_RESETVAL (0x00000000u)

/*----DATA_WAIT Tokens----*/
#define CSL_VPSS_PRV_DK_RD_2_DATA_WAIT_NO (0x00000000u)
#define CSL_VPSS_PRV_DK_RD_2_DATA_WAIT_YES (0x00000001u)

#define CSL_VPSS_PRV_DK_RD_2_DATA_AVL_MASK (0x10000000u)
#define CSL_VPSS_PRV_DK_RD_2_DATA_AVL_SHIFT (0x0000001Cu)
#define CSL_VPSS_PRV_DK_RD_2_DATA_AVL_RESETVAL (0x00000000u)

/*----DATA_AVL Tokens----*/
#define CSL_VPSS_PRV_DK_RD_2_DATA_AVL_NO (0x00000000u)
#define CSL_VPSS_PRV_DK_RD_2_DATA_AVL_YES (0x00000001u)

#define CSL_VPSS_PRV_DK_RD_2_BYTE_CNT_MASK (0x0FF00000u)
#define CSL_VPSS_PRV_DK_RD_2_BYTE_CNT_SHIFT (0x00000014u)
#define CSL_VPSS_PRV_DK_RD_2_BYTE_CNT_RESETVAL (0x00000000u)

#define CSL_VPSS_PRV_DK_RD_2_ADDR_MASK   (0x000FFFFFu)
#define CSL_VPSS_PRV_DK_RD_2_ADDR_SHIFT  (0x00000000u)
#define CSL_VPSS_PRV_DK_RD_2_ADDR_RESETVAL (0x00000000u)

#define CSL_VPSS_PRV_DK_RD_2_RESETVAL    (0x00000000u)

/* PRV_DK_RD_3 */

#define CSL_VPSS_PRV_DK_RD_3_VALID_MASK  (0x40000000u)
#define CSL_VPSS_PRV_DK_RD_3_VALID_SHIFT (0x0000001Eu)
#define CSL_VPSS_PRV_DK_RD_3_VALID_RESETVAL (0x00000000u)

/*----VALID Tokens----*/
#define CSL_VPSS_PRV_DK_RD_3_VALID_NOTVALID (0x00000000u)
#define CSL_VPSS_PRV_DK_RD_3_VALID_VALID (0x00000001u)

#define CSL_VPSS_PRV_DK_RD_3_DATA_WAIT_MASK (0x20000000u)
#define CSL_VPSS_PRV_DK_RD_3_DATA_WAIT_SHIFT (0x0000001Du)
#define CSL_VPSS_PRV_DK_RD_3_DATA_WAIT_RESETVAL (0x00000000u)

/*----DATA_WAIT Tokens----*/
#define CSL_VPSS_PRV_DK_RD_3_DATA_WAIT_NO (0x00000000u)
#define CSL_VPSS_PRV_DK_RD_3_DATA_WAIT_YES (0x00000001u)

#define CSL_VPSS_PRV_DK_RD_3_DATA_AVL_MASK (0x10000000u)
#define CSL_VPSS_PRV_DK_RD_3_DATA_AVL_SHIFT (0x0000001Cu)
#define CSL_VPSS_PRV_DK_RD_3_DATA_AVL_RESETVAL (0x00000000u)

/*----DATA_AVL Tokens----*/
#define CSL_VPSS_PRV_DK_RD_3_DATA_AVL_NO (0x00000000u)
#define CSL_VPSS_PRV_DK_RD_3_DATA_AVL_YES (0x00000001u)

#define CSL_VPSS_PRV_DK_RD_3_BYTE_CNT_MASK (0x0FF00000u)
#define CSL_VPSS_PRV_DK_RD_3_BYTE_CNT_SHIFT (0x00000014u)
#define CSL_VPSS_PRV_DK_RD_3_BYTE_CNT_RESETVAL (0x00000000u)

#define CSL_VPSS_PRV_DK_RD_3_ADDR_MASK   (0x000FFFFFu)
#define CSL_VPSS_PRV_DK_RD_3_ADDR_SHIFT  (0x00000000u)
#define CSL_VPSS_PRV_DK_RD_3_ADDR_RESETVAL (0x00000000u)

#define CSL_VPSS_PRV_DK_RD_3_RESETVAL    (0x00000000u)

/* RESZ_RD_0 */

#define CSL_VPSS_RESZ_RD_0_VALID_MASK    (0x40000000u)
#define CSL_VPSS_RESZ_RD_0_VALID_SHIFT   (0x0000001Eu)
#define CSL_VPSS_RESZ_RD_0_VALID_RESETVAL (0x00000000u)

/*----VALID Tokens----*/
#define CSL_VPSS_RESZ_RD_0_VALID_NOTVALID (0x00000000u)
#define CSL_VPSS_RESZ_RD_0_VALID_VALID   (0x00000001u)

#define CSL_VPSS_RESZ_RD_0_DATA_WAIT_MASK (0x20000000u)
#define CSL_VPSS_RESZ_RD_0_DATA_WAIT_SHIFT (0x0000001Du)
#define CSL_VPSS_RESZ_RD_0_DATA_WAIT_RESETVAL (0x00000000u)

/*----DATA_WAIT Tokens----*/
#define CSL_VPSS_RESZ_RD_0_DATA_WAIT_NO  (0x00000000u)
#define CSL_VPSS_RESZ_RD_0_DATA_WAIT_YES (0x00000001u)

#define CSL_VPSS_RESZ_RD_0_DATA_AVL_MASK (0x10000000u)
#define CSL_VPSS_RESZ_RD_0_DATA_AVL_SHIFT (0x0000001Cu)
#define CSL_VPSS_RESZ_RD_0_DATA_AVL_RESETVAL (0x00000000u)

/*----DATA_AVL Tokens----*/
#define CSL_VPSS_RESZ_RD_0_DATA_AVL_NO   (0x00000000u)
#define CSL_VPSS_RESZ_RD_0_DATA_AVL_YES  (0x00000001u)

#define CSL_VPSS_RESZ_RD_0_BYTE_CNT_MASK (0x0FF00000u)
#define CSL_VPSS_RESZ_RD_0_BYTE_CNT_SHIFT (0x00000014u)
#define CSL_VPSS_RESZ_RD_0_BYTE_CNT_RESETVAL (0x00000000u)

#define CSL_VPSS_RESZ_RD_0_ADDR_MASK     (0x000FFFFFu)
#define CSL_VPSS_RESZ_RD_0_ADDR_SHIFT    (0x00000000u)
#define CSL_VPSS_RESZ_RD_0_ADDR_RESETVAL (0x00000000u)

#define CSL_VPSS_RESZ_RD_0_RESETVAL      (0x00000000u)

/* RESZ_RD_1 */

#define CSL_VPSS_RESZ_RD_1_VALID_MASK    (0x40000000u)
#define CSL_VPSS_RESZ_RD_1_VALID_SHIFT   (0x0000001Eu)
#define CSL_VPSS_RESZ_RD_1_VALID_RESETVAL (0x00000000u)

/*----VALID Tokens----*/
#define CSL_VPSS_RESZ_RD_1_VALID_NOTVALID (0x00000000u)
#define CSL_VPSS_RESZ_RD_1_VALID_VALID   (0x00000001u)

#define CSL_VPSS_RESZ_RD_1_DATA_WAIT_MASK (0x20000000u)
#define CSL_VPSS_RESZ_RD_1_DATA_WAIT_SHIFT (0x0000001Du)
#define CSL_VPSS_RESZ_RD_1_DATA_WAIT_RESETVAL (0x00000000u)

/*----DATA_WAIT Tokens----*/
#define CSL_VPSS_RESZ_RD_1_DATA_WAIT_NO  (0x00000000u)
#define CSL_VPSS_RESZ_RD_1_DATA_WAIT_YES (0x00000001u)

#define CSL_VPSS_RESZ_RD_1_DATA_AVL_MASK (0x10000000u)
#define CSL_VPSS_RESZ_RD_1_DATA_AVL_SHIFT (0x0000001Cu)
#define CSL_VPSS_RESZ_RD_1_DATA_AVL_RESETVAL (0x00000000u)

/*----DATA_AVL Tokens----*/
#define CSL_VPSS_RESZ_RD_1_DATA_AVL_NO   (0x00000000u)
#define CSL_VPSS_RESZ_RD_1_DATA_AVL_YES  (0x00000001u)

#define CSL_VPSS_RESZ_RD_1_BYTE_CNT_MASK (0x0FF00000u)
#define CSL_VPSS_RESZ_RD_1_BYTE_CNT_SHIFT (0x00000014u)
#define CSL_VPSS_RESZ_RD_1_BYTE_CNT_RESETVAL (0x00000000u)

#define CSL_VPSS_RESZ_RD_1_ADDR_MASK     (0x000FFFFFu)
#define CSL_VPSS_RESZ_RD_1_ADDR_SHIFT    (0x00000000u)
#define CSL_VPSS_RESZ_RD_1_ADDR_RESETVAL (0x00000000u)

#define CSL_VPSS_RESZ_RD_1_RESETVAL      (0x00000000u)

/* RESZ_RD_2 */

#define CSL_VPSS_RESZ_RD_2_VALID_MASK    (0x40000000u)
#define CSL_VPSS_RESZ_RD_2_VALID_SHIFT   (0x0000001Eu)
#define CSL_VPSS_RESZ_RD_2_VALID_RESETVAL (0x00000000u)

/*----VALID Tokens----*/
#define CSL_VPSS_RESZ_RD_2_VALID_NOTVALID (0x00000000u)
#define CSL_VPSS_RESZ_RD_2_VALID_VALID   (0x00000001u)

#define CSL_VPSS_RESZ_RD_2_DATA_WAIT_MASK (0x20000000u)
#define CSL_VPSS_RESZ_RD_2_DATA_WAIT_SHIFT (0x0000001Du)
#define CSL_VPSS_RESZ_RD_2_DATA_WAIT_RESETVAL (0x00000000u)

/*----DATA_WAIT Tokens----*/
#define CSL_VPSS_RESZ_RD_2_DATA_WAIT_NO  (0x00000000u)
#define CSL_VPSS_RESZ_RD_2_DATA_WAIT_YES (0x00000001u)

#define CSL_VPSS_RESZ_RD_2_DATA_AVL_MASK (0x10000000u)
#define CSL_VPSS_RESZ_RD_2_DATA_AVL_SHIFT (0x0000001Cu)
#define CSL_VPSS_RESZ_RD_2_DATA_AVL_RESETVAL (0x00000000u)

/*----DATA_AVL Tokens----*/
#define CSL_VPSS_RESZ_RD_2_DATA_AVL_NO   (0x00000000u)
#define CSL_VPSS_RESZ_RD_2_DATA_AVL_YES  (0x00000001u)

#define CSL_VPSS_RESZ_RD_2_BYTE_CNT_MASK (0x0FF00000u)
#define CSL_VPSS_RESZ_RD_2_BYTE_CNT_SHIFT (0x00000014u)
#define CSL_VPSS_RESZ_RD_2_BYTE_CNT_RESETVAL (0x00000000u)

#define CSL_VPSS_RESZ_RD_2_ADDR_MASK     (0x000FFFFFu)
#define CSL_VPSS_RESZ_RD_2_ADDR_SHIFT    (0x00000000u)
#define CSL_VPSS_RESZ_RD_2_ADDR_RESETVAL (0x00000000u)

#define CSL_VPSS_RESZ_RD_2_RESETVAL      (0x00000000u)

/* RESZ_RD_3 */

#define CSL_VPSS_RESZ_RD_3_VALID_MASK    (0x40000000u)
#define CSL_VPSS_RESZ_RD_3_VALID_SHIFT   (0x0000001Eu)
#define CSL_VPSS_RESZ_RD_3_VALID_RESETVAL (0x00000000u)

/*----VALID Tokens----*/
#define CSL_VPSS_RESZ_RD_3_VALID_NOTVALID (0x00000000u)
#define CSL_VPSS_RESZ_RD_3_VALID_VALID   (0x00000001u)

#define CSL_VPSS_RESZ_RD_3_DATA_WAIT_MASK (0x20000000u)
#define CSL_VPSS_RESZ_RD_3_DATA_WAIT_SHIFT (0x0000001Du)
#define CSL_VPSS_RESZ_RD_3_DATA_WAIT_RESETVAL (0x00000000u)

/*----DATA_WAIT Tokens----*/
#define CSL_VPSS_RESZ_RD_3_DATA_WAIT_NO  (0x00000000u)
#define CSL_VPSS_RESZ_RD_3_DATA_WAIT_YES (0x00000001u)