csl_venc.h

TI达芬奇dm644x各硬件模块测试代码

	/** Horizontal valid culling pattern bit width */
	Uint16 hcpw;
	/** Horizontal valid culling pattern */
	Uint16 hcpt;

}CSL_VencLineCtlConfig;

/** @brief  LCD output config structure.
*
* All fields needed for LCD output configuration.
 */
typedef struct CSL_VencLcdOutConfig_{

	/** GIO39 output signal select: 0==>Field Id, 1==>LCD_OE */
	Uint16 fids;
	/** Field Id output polarity: 0==>Non-inverse, 1==> Inverse */
	Uint16 fidp;
	/** PWM output pulse polarity: 0==>Active H, 1==>Active L */
	Uint16 pwmp;
	/** PWM output control: 0==>Off, 1==>On */
	Uint16 pwme;
	/** LCD AC output control: 0==>Off, 1==>On */
	Uint16 ace;
	/** Bright output polarity: 0==>Non-inverse, 1==>Inverse */
	Uint16 brp;
	/** Bright output control: 0==>Off, 1==>On */
	Uint16 bre;
	/** LCD OE output polarity: 0==>Active H, 1==>Active L */
	Uint16 oep;
	/** LCD OE output polarity */
	Uint16 oee;
	/** Bright pulse start position */
	Uint16 brts;
	/** Bright pulse width */
	Uint16 brtw;
	/** LCD AC toggle interval */
	Uint16 actf;
	/** LCD AC toggle horizontal position */
	Uint16 acth;
	/** PWM output period */
	Uint16 pwmop;
	/** PWM output pulse width */
	Uint16 pwmw;

}CSL_VencLcdOutConfig;

/** @brief  DCLK config structure.
*
* All fields needed for DCLK configuration.
 */
typedef struct CSL_VencDclkConfig_{

       /** Internal DCLK mode */
	Uint16 dckim;	
	/** DCLK output offset */
	Uint16 dofst;
	/** DCLK pattern mode: 0==>Level, 1==> Enable */
	Uint16 dckec;
	/** DCLK mask control: 0==>Off, 1==>On */
	Uint16 dckme;
	/** DCLK output divide: 0==>Divide by 1, 1==>Divide by 2 */
	Uint16 dckoh;
	/** Internal DCLK output divide: 0==>Divide by 1, 1==>Divide by 2 */
	Uint16 dckih;
	/** DCLK pattern valid bit width */
	Uint16 dckpw;
	/** DCLK pattern 0 */
	Uint16 dclkptn0;
	/** DCLK pattern 1 */
	Uint16 dclkptn1;
	/** DCLK pattern 2 */
	Uint16 dclkptn2;
	/** DCLK pattern 3 */
	Uint16 dclkptn3;
       /** DCLK pattern 0 (auxiliary) */
	Uint16 dclkptn0a;
	/** DCLK pattern 1 (auxiliary) */
	Uint16 dclkptn1a;
	/** DCLK pattern 2 (auxiliary) */
	Uint16 dclkptn2a;
	/** DCLK pattern 3 (auxiliary) */
	Uint16 dclkptn3a;
       /** Horizontal DCLK mask start position */
	Uint16 dchs;
	/** Horizontal DCLK (auxiliary) mask start position */
	Uint16 dchsa;   
	/** Horizontal DCLK mask range */
	Uint16 dclkhr;
	/** DCLK vertical mask start position */
	Uint16 dclkvs;
	/** DCLK vertical mask range */
	Uint16 dcvr;

}CSL_VencDclkConfig;

/** @brief  EPSON LCD config structure.
*
* All fields needed for EPSON LCD configuration.
 */
typedef struct CSL_VencEpsonLcdConfig_{

	/** Low pulse number of YSCL: 0==>one pulse, 1==>two pulses */
	Uint16 yscls;
	/** XINH signal select: 0==>DC output, 1==>TG controlled */
	Uint16 xinhs;
	/** XINH DC level: 0==>L level output, 1==>H level output */
	Uint16 xinhl;
	/** SYS function applied field ID select */
	Uint16 sysfid;
	/** SYS function enable: 0==>Off, 1==>On */
	Uint16 sysse;
	/** GCP pattern select */
	Uint16 gcps;

}CSL_VencEpsonLcdConfig;

/** @brief  CASIO LCD config structure.
*
* All fields needed for CASIO LCD configuration.
 */
typedef struct CSL_VencCasioLcdConfig_{

	/** RIT port control: 0==>L level output, 1==>H level output */
	Uint16 crit;
	/** STBYB port control: 0==> L level output, 1==> H level output */
	Uint16 cstb;
	/** GRES port control: 0==>Normal, 1==>Fixed L level */
	Uint16 cgres;
	/** Display mode: 0==>Normal, 1==>Vertical reverse mode */
	Uint16 cdm;

}CSL_VencCasioLcdConfig;

/** @brief  UDISP LCD config structure.
*
* All fields needed for UDISP LCD configuration.
 */
typedef struct CSL_VencUdispLcdConfig_{

	/**Frame start pulse width */
	Uint16 fsw;

}CSL_VencUdispLcdConfig;

/** @brief  STN LCD config structure.
*
* All fields needed for STN LCD configuration.
 */
typedef struct CSL_VencStnLcdConfig_{

      /** FRC table rotation enable */
	Uint16 frcrot;  
	/**Frame start pulse width */
	Uint16 sdw;

}CSL_VencStnLcdConfig;

/** @brief  RAM config structure.
*
* All fields needed for RAM configuration.
 */
typedef struct CSL_VencRamConfig_{

	/*GCP/FRC table RAM address */
	Uint16 ramAddr;
	/** RAM data port */
	Uint16 ramPort;

}CSL_VencRamConfig;


/** @brief Composite mode config structure.
*
* All fields needed for composite video mode.
*/

typedef struct CSL_VencCompositeConfig_{

	/** Delay adjustment of Y signal in composite signal */
	Uint16 ycdly;
	/** Composite video level */
	Uint16 cvlvl;
	/** Composite setup: 0==>0%, 1==>7.5% */
	Uint16 cstup;
	/** Blanking shape disable: 0==>Enable, 1==>Disable */
	Uint16 cbls;
	/** Chroma signal low-pass filter select: 0==>1.5MHz cutoff, 1==>3MHz cutoff */
	Uint16 crcut;
	/** Blanking build-up time for composite output */
	Uint16 cbbld;
	/** Sync build-up time for composite output */
	Uint16 csbld;
	/** Equalizing pulse width offset */
	Uint16 cepw;
	/** Field sync pulse width offset */
	Uint16 cfsw;
	/** Line sync pulse width offset */
	Uint16 clsw;
	/** Burst end position offset */
	Uint16 cbse;
	/** Burst start position offset */
	Uint16 cbst;
	/** Front porch position offset */
	Uint16 cfpw;
	/** Line blanking end position offset */
	Uint16 clbi; 

}CSL_VencCompositeConfig;

/** @brief Component mode config structure
*
*  All fields needed for component video mode.
*/

typedef struct CSL_VencComponentConfig_{

      /** RGB select for component output */
      Uint16  mrgb;	  
      /** Delay adjustment of Y signal for component output */
      Uint16  mydly;
      /** Sync on Pr (or R) */
      Uint16  msyr;
      /** Sync on Pb (or B) */
      Uint16  msyb;
      /** Sync on Y (or G) */
      Uint16  msyg;
      /** Chroma level for component YPbPr */
      Uint16  mclvl;
      /** Luma level for component YPbPr */
      Uint16  mylvl;
      /** Setup for component YPbPr */
      Uint16 mstup;
      /** Blanking shape disable */
      Uint16 mbls;
      /** Blanking build up time for component output */
      Uint16 mbbld;
      /** Sync build up time for component output */
      Uint16 msbld;
      /** Equalizing pulse width offset */
      Uint16 mepw;
      /** Field sync pulse width offset */
      Uint16 mfsw;
      /** Line sync pulse width offset */
      Uint16 mlsw;	  
      /** Front porch position offset */
      Uint16 cfpw;
      /** Line blanking end position offset */
      Uint16 clbi;
      	  
}CSL_VencComponentConfig;

/** @brief OSD Config structure
*
* All fields pertaining to OSD configuration.
*/

typedef struct CSL_VencOSDConfig_{

	  /** OSD clock pattern bit width */
	  Uint16 ocpw;
	  /** OSD clock pattern */
	  Uint16 ocpt;
	  /** OSD horizontal sync advance */
	  Uint16 ohad;

}CSL_VencOSDConfig;

/** @brief This has all the fields required to configure VENC at Power Up
 *  (After a Hardware Reset) or a Soft Reset
 *
 *  This structure is used to setup or obtain existing setup of
 *  VENC using @a CSL_vencHwSetup() function.
 */
typedef struct CSL_VencHwSetup_ {

       /** Video output mode: 0==> Analog, 1==> Digital */
	Uint16 videoOutMode;   
	/** Structure for Analog Video mode configuration */
	CSL_VencAnalogVideoConfig *vencAnalogVideoConfig;
	/** Structure for Digital Video mode configuration */
	CSL_VencDigitalConfig *vencDigitalConfig;
}CSL_VencHwSetup;


/** @brief Enumeration for queries passed to @a CSL_vencGetHwStatus()
 *
 * This is used to get the status of different operations or to get the
 * existing setup of VENC.
 */
typedef enum {
	 /** Get the VENC digital video mode  (response type: @a Uint16 *) */
	 CSL_VENC_QUERY_VIDEO_MODE = 1,
	 /** Get  info whether configured as master or slave (response type: @a Uint16 *)    */
	 CSL_VENC_QUERY_MASTERSLAVE ,
	 /** Get info whether in HDTV or SDTV mode (response type: @a Uint16 *)  */
	 CSL_VENC_QUERY_HDTV_MODE,
	 /** Get info regarding TV format (response type: @a Uint16 *)  */
	 CSL_VENC_QUERY_TV_FORMAT,
	 /** Get the information regarding video timing(response type: @a Uint16 *)    */
	 CSL_VENC_QUERY_VIDEO_TIMING, 
	 /** Get the video status information (response type: @a (CSL_VencVideoStatus *)) */
	 CSL_VENC_QUERY_VIDEO_STATUS
} CSL_VencHwStatusQuery;

/** @brief Enumeration for queries passed to @a CSL_vencHwControl()
 *
 * This is used to select the commands to control the operations
 * existing setup of VENC. The arguments to be passed with each
 * enumeration if any are specified next to the enumeration.
 */
 typedef enum {
	/** Set the NTSC/PAL mode (TV format) as specified by argument : argument @a (Uint16 *)	 */
	CSL_VENC_CMD_SET_TV_FORMAT = 1,
	/** Set the master or slave mode as specified by argument : argument @a (Uint16 *)	 */
	CSL_VENC_CMD_SET_MASTER_OR_SLAVE ,
	/** Set the video timing mode: argument @a (Uint16 *)	 */
	CSL_VENC_CMD_VIDEO_TIMING ,
	/** Enable the VENC module : no argument */
	CSL_VENC_CMD_ENABLE,
	/** Reset the VENC module : no argument */
	CSL_VENC_CMD_RESET,
	/** Set the HDTV Mode : argument @a (Uint16*) */
	CSL_VENC_CMD_SET_HDTV_MODE,
	/** Set the DAC test mode : argument @a (CSL_VencDacTest *) */
	CSL_VENC_CMD_DAC_TEST

} CSL_VencHwControlCmd;

/** @brief DAC Test structure.
*
* All fields needed for DAC Test.
 */
typedef struct CSL_VencDacTest_{

       /** DAC 3 power-down: 0==>Normal, 1==>Power-down mode */
	Uint16  dapd3;
	/** DAC 2 power-down: 0==>Normal, 1==>Power-down mode */
	Uint16  dapd2;
	/** DAC 1 power-down: 0==>Normal, 1==>Power-down mode */
	Uint16  dapd1;
	/** DAC 0 power-down: 0==>Normal, 1==>Power-down mode */
	Uint16  dapd0;
	/** DAC DC output mode: 0==>Normal, 1==>DC output mode */
	Uint16  dacdc;
	/** DC level control */
	Uint16  dalvl;
	
}CSL_VencDacTest;

/** @brief  Video status structure.
*
* All fields needed for Video status query.
 */
typedef struct CSL_VencVideoStatus_{

	/** Closed caption status (even field) */
	Uint16 caest;
	/** Closed caption status (odd field) */
	Uint16 caost;
	/** Field ID monitor */
	Uint16 fidst;
	/** UDisplay "Balance signal" monitor */
	Uint16 udbal;
	/** UDisplay "Full" signal monitor */
	Uint16 udful;

}CSL_VencVideoStatus;

/**************************************************************************\
* VENC global function declarations
\**************************************************************************/

/**  This function is idempotent in that calling it many times is same as
 *   calling it once. This function initializes the VENC CSL data structures.
 *
 * <b> Usage Constraints: </b>
 * CSL system initialization must be successfully completed by invoking
 * @a CSL_sysInit() before calling this function. This function should be
 * called before using any of the CSL APIs
 *
 * @b Example:
 * @verbatim


   ...
   CSL_sysInit();
   if (CSL_SOK != CSL_vencInit()) {
       return;
   }