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📄 csl_idma.c

📁 TI达芬奇dm644x各硬件模块测试代码
💻 C
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    /*---------------------------------------------------------------*/
    /* Return the 32-bit field that has been prepared for the user.  */
    /*---------------------------------------------------------------*/
    _restore_interrupts(cs);
    return(idma0_configHandle_priv.cnt);
            
}

#pragma CODE_SECTION (IDMA0_config, ".text:cslsys_section:idma");
/** ===========================================================================
 *   @n@b IDMA0_config
 *
 *   @b Description
 *   @n IDMA0_config() - Configures IMDA Channel 0 to perform a transfer
 *      between Internal Memory and Configuration Space based on the    
 *      data in the *config structure.  "mask" provides a 1-hot encoding
 *      for the 32-word tranfer that determines which of the 32-words   
 *      are to be transfered.  In the *config structure "src" provides  
 *      the source location of the transfer and "dst provides the       
 *      destination location of the transfer and both must be word      
 *      aligned. While "cnt" provides the number of 32-word transfers to
 *      perform and must not be greater than 15.            
 *        Initializes the configuration for IDMA Channel 0  including 1-hot 
 *      encoding mask, source location, destination location  and count.  
 *      This is done using the structure IDMA0_Config.            
 *
 *   @b Arguments
 *   @verbatim
            config        Pointer to the Configuration structure
            
     @endverbatim
 *
 *   <b> Return Value </b>
 *   @n  None
 *
 *   <b> Pre Condition </b>
 *   @n  None
 *
 *   <b> Post Condition </b>
 *   @n  None
 *
 *   @b Modifies
 *   @n The hardware registers of IDMA.
 *
 *   @b Example
 *   @verbatim
        IDMA0_Config   config
        ...
        
        IDMA0_config(&config);
        IDMA0_wait();
        
     @endverbatim
 * ============================================================================
 */
void IDMA0_config(
    IDMA0_Config *config
)
{
    volatile unsigned int pend;
    Uint32  cs;    
    /*--------------------------------------------------------------*/
    /* Make sure that there are no pending tyransfers before using  */
    /* this channel. This is done by reading bit "1" of the status  */
    /* register.                                                    */
    /*--------------------------------------------------------------*/
    cs =    _disable_interrupts();      
    while (pend = (CSL_FEXT(((CSL_IdmaRegs*)CSL_IDMA_0_REGS)->IDMA0_STAT, 
                                IDMA_IDMA0_STAT_PEND) 
                    | CSL_FEXT(((CSL_IdmaRegs*)CSL_IDMA_0_REGS)->IDMA0_STAT, 
                                IDMA_IDMA0_STAT_ACTV))   ); 
    
    /*--------------------------------------------------------------*/
    /*  Copy src, dst, mask and count to the appropriate registers  */
    /*  from the structure that is passed in.                       */
    /*--------------------------------------------------------------*/
    
    ((CSL_IdmaRegs*)CSL_IDMA_0_REGS)->IDMA0_SRC  = (unsigned int) config->src;
    ((CSL_IdmaRegs*)CSL_IDMA_0_REGS)->IDMA0_DST  = (unsigned int) config->dst;
    ((CSL_IdmaRegs*)CSL_IDMA_0_REGS)->IDMA0_MASK = config->mask;
    ((CSL_IdmaRegs*)CSL_IDMA_0_REGS)->IDMA0_CNT  = config->cnt 
                                                | idma0_configHandle_priv.cnt;
    _restore_interrupts(cs);

}

#pragma CODE_SECTION (IDMA0_configArgs, ".text:cslsys_section:idma");
/** ===========================================================================
 *   @n@b IDMA0_configArgs
 *
 *   @b Description
 *   @n IDMA0_configArgs() - Configures IMDA Channel 0 to perform a     
 *      transfer between Internal Memory and Configuration Space based  
 *      on the inputs to the function.  "mask" provides a 1-hot encoding
 *      for the 32-word tranfer that determines which of the 32-words   
 *      are to be transfered.  "src" provides the source location of the
 *      transfer and "dst provides the destination location of the      
 *      transfer and both must be word aligned. While "cnt" provides the
 *      number of 32-word transfers to perform and must not be greater  
 *      than 15.                                                        
 *        Initializes the configuration for IDMA Channel 0 including 1-hot 
 *      encoding mask, source location, destination location and count.
 *
 *   @b Arguments
 *   @verbatim
            mask        encoding value for the 32-word tranfer 
            
            src         Pointer to the source location of the transfer
            
            dst         Pointer to the destination location of the transfer
            
            cnt         number of 32-word transfers 
            
     @endverbatim
 *
 *   <b> Return Value </b>
 *   @n  None
 *
 *   <b> Pre Condition </b>
 *   @n  None
 *
 *   <b> Post Condition </b>
 *   @n  None
 *
 *   @b Modifies
 *   @n The hardware registers of IDMA.
 *
 *   @b Example
 *   @verbatim
        Uint32  src,dst;
        Uint32  mask;
        ...
        
        IDMA0_configArgs(mask, src, dst, 1);
        IDMA0_wait();
        
     @endverbatim
 * ============================================================================
 */
void IDMA0_configArgs (
    unsigned int  mask, 
    unsigned int  *src, 
    unsigned int  *dst, 
    unsigned int  count
)
{
    volatile unsigned int pend;
    Uint32  cs;
    cs =    _disable_interrupts();    
    #ifdef PEND_SUPPORT
    
    while (pend = (CSL_FEXT(((CSL_IdmaRegs*)CSL_IDMA_0_REGS)->IDMA0_STAT, 
                            IDMA_IDMA0_STAT_PEND) 
                   | CSL_FEXT(((CSL_IdmaRegs*)CSL_IDMA_0_REGS)->IDMA0_STAT, 
                                IDMA_IDMA0_STAT_ACTV))); 
    
    #endif
     
    /*--------------------------------------------------------------*/
    /*  Copy src, dst, mask and count to the appropriate registers  */
    /*  from the structure that is passed in.                       */
    /*--------------------------------------------------------------*/
    
    ((CSL_IdmaRegs*)CSL_IDMA_0_REGS)->IDMA0_SRC     = (unsigned int) src;
    ((CSL_IdmaRegs*)CSL_IDMA_0_REGS)->IDMA0_DST     = (unsigned int) dst;
    ((CSL_IdmaRegs*)CSL_IDMA_0_REGS)->IDMA0_MASK    = mask;
    ((CSL_IdmaRegs*)CSL_IDMA_0_REGS)->IDMA0_CNT     = count |
                                                 idma0_configHandle_priv.cnt;
    _restore_interrupts(cs);

}

#pragma CODE_SECTION (IDMA0_getStatus, ".text:cslsys_section:idma");
/** ===========================================================================
 *   @n@b IDMA0_getStatus
 *
 *   @b Description
 *   @n IDMA0_getStatus() gets the active and pending status of IMDA    
 *      Channel 0 and returns ACTV in the least significant bit and PEND
 *      in the 2nd least significant bit                                
 *
 *      Gets the active and pending status of IDMA channel 0
 *
 *   @b Arguments
 *   @n  None
 *
 *   <b> Return Value </b>  IDMA channel 0 status.
 *
 *   <b> Pre Condition </b>
 *   @n  None
 *
 *   <b> Post Condition </b>
 *   @n  None
 *
 *   @b Modifies
 *   @n  None
 *
 *   @b Example
 *   @verbatim
        Uint32        stat;
        
        ...
        
        stat = IDMA0_getStatus();
     @endverbatim
 * ============================================================================
 */
Uint32  IDMA0_getStatus(void)
{

    /*--------------------------------------------------------------*/
    /* Read the status and return it as a 3-bit field.              */
    /*--------------------------------------------------------------*/
    return (((CSL_IdmaRegs*)CSL_IDMA_0_REGS)->IDMA0_STAT & 
        (CSL_IDMA_IDMA0_STAT_PEND_MASK | CSL_IDMA_IDMA0_STAT_ACTV_MASK));
}

#pragma CODE_SECTION (IDMA0_wait, ".text:cslsys_section:idma");
/** ===========================================================================
 *   @n@b IDMA0_wait
 *
 *   @b Description
 *   @n IDMA0_wait() waits until all previous transfers for IDMA Channel
 *      0 have been completed by making sure that both active and pend  
 *      bits are zero. These are the two least significant bits of the  
 *      status register for the channel.                                
 *
 *      Waits until previous transfers have completed for IDMA channel 0
 *      before returning.
 *
 *   @b Arguments
 *   @n  None
 *
 *   <b> Return Value </b>
 *   @n  None
 *
 *   <b> Pre Condition </b>
 *   @n  None
 *
 *   <b> Post Condition </b>
 *   @n  None
 *
 *   @b Modifies
 *   @n  None
 *
 *   @b Example
 *   @verbatim
        Uint32        stat;
        
        ...
        
        stat = IDMA0_getStatus();
        IDMA0_wait();
     @endverbatim
 * ============================================================================
 */
void IDMA0_wait(void)
{
    
    Uint32  cs;
    /*--------------------------------------------------------------*/
    /* Make sure that there are no pending tyransfers before using  */
    /* this channel. This is done by reading bit "1" of the status  */
    /* register.                                                    */
    /*--------------------------------------------------------------*/
    cs =    _disable_interrupts();          
    while (((CSL_IdmaRegs*)CSL_IDMA_0_REGS)->IDMA0_STAT & 
        (CSL_IDMA_IDMA0_STAT_PEND_MASK | CSL_IDMA_IDMA0_STAT_ACTV_MASK));
    _restore_interrupts(cs);    
}

#pragma CODE_SECTION (IDMA0_setInt, ".text:cslsys_section:idma");
/** ===========================================================================
 *   @n@b IDMA0_setInt
 *
 *   @b Description
 *   @n IDMA0_setInt()  sets a the interrupt enable field which       
 *      is used to enable/disable interrupts for IDMA Channel 0.      
 *      It returns the a "32-bit" count register field back to the    
 *      user. This 32-bit register field will be used in              
 *      IDMA0_config() and IDMA0_configArgs() to program the Interrupt
 *      option for IDMA Channel 0                                     
 *
 *      Enables/Disables interrupt event generation for IDMA channel 0 
 *      transfers
 *
 *   @b Arguments
 *   @verbatim
            interr        interrupt event generated on/off
            
     @endverbatim
 *
 *   <b> Return Value </b>  idma0_handle_priv.cnt
 *
 *   <b> Pre Condition </b>
 *   @n  None
 *
 *   <b> Post Condition </b>
 *   @n  None
 *
 *   @b Modifies
 *   @n  None
 *
 *   @b Example
 *   @verbatim
        Uint32        tempCnt;

        ...

        // Set and test Interrupt event gen for IDMA0 
        tempCnt = IDMA0_setInt(IDMA_INT_DIS);
     @endverbatim
 * ============================================================================
 */
int IDMA0_setInt (
    IDMA_intEn interr
)
{
    /*--------------------------------------------------------------*/
    /* Verify handle is for channel 0                               */
    /*--------------------------------------------------------------*/

    Uint32  Interrupt;    
    Uint32  cs;
    cs =    _disable_interrupts();  
    Interrupt       = ((Uint32)interr << CSL_IDMA_IDMA0_CNT_INT_SHIFT) 
                                        & CSL_IDMA_IDMA0_CNT_INT_MASK;
    idma0_configHandle_priv.cnt = Interrupt;
    _restore_interrupts(cs);    
    return (idma0_configHandle_priv.cnt);
}

/*================================================================*/
/* Texas Instruments Incorporated 1997-2005.                      */
/*----------------------------------------------------------------*/

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