📄 csl_cachel1.c
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/* ============================================================================ * Copyright (c) Texas Instruments Inc 2002, 2003, 2004, 2005 * * Use of this software is controlled by the terms and conditions found in the * license agreement under which this software has been supplied. * =========================================================================== *//** \file csl_cacheL1.c * * \brief This file defines the functions in the Cache driver. * * Date 22th March 2004 * Author Jamon Bowen * * Description * - The functions in this driver contian all of the necessary * functionallity the configure the (if avalible) L2, L1D, and L1P Cache. * Last Modified: 22th March 2004 * * Modifications 1: * - Jamon Bowen * - Created * - Date: 23th March 2004 * * Modifications 2: * - Ruchika Kharwar * - Created * - Date: 21st June 2004 * - Removed global variable, Cache (redundant), Register Layer modified to be * CSL 3.x Register layer as * specified in the scope. */#include <csl_cache.h>#include "_csl_cache.h"/** ============================================================================ * @n@b CACHE_freezeL1 * * @b Description * @n Freezes the L1P and L1D. * @n As per the specification, * @n a. The new freeze state is programmed in L1DCC, L1PCC. * @n b. The old state is read from the L1DCC, L1PCC from the POPER field. * @n This latter read accomplishes 2 things, viz. Ensuring the new state * is programmed as well as reading the old programmed value. * * @b Arguments * @n None * * <b> Return Value </b> * @n Old Freeze State (CACHE_L1_Freeze) * * @b Example * @verbatim ... CACHE_L1_Freeze oldFreezeState ; oldFreezeState = CACHE_freezeL1(); ... @endverbatim * ============================================================================ */#pragma CODE_SECTION (CACHE_freezeL1, ".text:cslsys_section:cache");CACHE_L1_Freeze CACHE_freezeL1 ( void){ Uint32 oldL1DFrz; Uint32 oldL1PFrz; /* Critical section */ asm(" dint"); ((CSL_CacheRegsOvly)CSL_CACHE_REGS)->L1DCC = CSL_FMK(CACHE_L1DCC_OPER, CSL_CACHE_L1DCC_OPER_FREEZE); ((CSL_CacheRegsOvly)CSL_CACHE_REGS)->L1PCC = CSL_FMK(CACHE_L1PCC_OPER, CSL_CACHE_L1PCC_OPER_FREEZE); oldL1DFrz = CSL_FEXT( ((CSL_CacheRegsOvly)CSL_CACHE_REGS)->L1DCC, CACHE_L1DCC_POPER); oldL1PFrz = CSL_FEXT( ((CSL_CacheRegsOvly)CSL_CACHE_REGS)->L1PCC, CACHE_L1PCC_POPER); asm(" rint"); /* End Critical section */ /* return cache state if a single freeze is returned then the other */ if (oldL1DFrz == CSL_CACHE_L1DCC_OPER_FREEZE) { if (oldL1PFrz == CSL_CACHE_L1PCC_OPER_FREEZE) return CACHE_L1_FREEZE; else return CACHE_L1D_FREEZE; } else { if (oldL1PFrz == CSL_CACHE_L1PCC_OPER_FREEZE) return CACHE_L1P_FREEZE; else return CACHE_L1_NORMAL; }}/** ============================================================================ * @n@b CACHE_unfreezeL1 * * @b Description * @n Unfreezes the L1P and L1D. * @n As per the specification, * @n a. The new unfreeze state is programmed in L1DCC, L1PCC. * @n b. The old state is read from the L1DCC, L1PCC from the POPER field. * @n This latter read accomplishes 2 things, viz. Ensuring the new state * is programmed as well as reading the old programmed value. * * * @b Arguments * @n None * * <b> Return Value </b> * @n Old Freeze State (CACHE_L1_Freeze) * * @b Example * @verbatim ... CACHE_L1_Freeze oldFreezeState ; oldFreezeState = CACHE_unfreezeL1(); ... @endverbatim * ============================================================================ */#pragma CODE_SECTION (CACHE_unfreezeL1, ".text:cslsys_section:cache");CACHE_L1_Freeze CACHE_unfreezeL1 ( void){ Uint32 oldL1DFrz; Uint32 oldL1PFrz; /* Critical Section */ asm(" dint"); ((CSL_CacheRegsOvly)CSL_CACHE_REGS)->L1DCC = CSL_FMK(CACHE_L1DCC_OPER, CSL_CACHE_L1DCC_OPER_NORM); ((CSL_CacheRegsOvly)CSL_CACHE_REGS)->L1PCC = CSL_FMK(CACHE_L1PCC_OPER, CSL_CACHE_L1PCC_OPER_NORM); oldL1DFrz = CSL_FEXT( ((CSL_CacheRegsOvly)CSL_CACHE_REGS)->L1DCC, CACHE_L1DCC_POPER); oldL1PFrz = CSL_FEXT( ((CSL_CacheRegsOvly)CSL_CACHE_REGS)->L1PCC, CACHE_L1PCC_POPER); /* End Critical section */ asm(" rint"); /* return cache state if a single freeze is returned then the other * cache is in normal mode */ if (oldL1DFrz == CSL_CACHE_L1DCC_OPER_FREEZE) { if (oldL1PFrz == CSL_CACHE_L1PCC_OPER_FREEZE) return CACHE_L1_FREEZE; else return CACHE_L1D_FREEZE; } else { if (oldL1PFrz == CSL_CACHE_L1PCC_OPER_FREEZE) return CACHE_L1P_FREEZE; else return CACHE_L1_NORMAL; }}/** ============================================================================ * @n@b CACHE_setL1pSize * * @b Description * @n Sets the L1P size. * @n As per the specification, * @n a. The new size is programmed in L1PCFG. * @n b. L1PCFG is read back to ensure it is set. * * @b Arguments * @verbatim newSize New size to be programmed @endverbatim * * <b> Return Value </b> * @n Old Size set for L1P (CACHE_L1Size) * * @b Example * @verbatim ... CACHE_L1Size oldSize ; oldSize = CACHE_setL1pSize(CACHE_L1_32KCACHE); ... @endverbatim * ============================================================================ */#pragma CODE_SECTION (CACHE_setL1pSize, ".text:cslsys_section:cache");CACHE_L1Size CACHE_setL1pSize ( CACHE_L1Size newSize){ Uint32 curSize; curSize = ((CSL_CacheRegsOvly)CSL_CACHE_REGS)->L1PCFG; /* Critical section */ asm(" dint"); ((CSL_CacheRegsOvly)CSL_CACHE_REGS)->L1PCFG = CSL_FINS(curSize, CACHE_L1PCFG_MODE, newSize); newSize = (CACHE_L1Size)((CSL_CacheRegsOvly)CSL_CACHE_REGS)->L1PCFG; asm(" rint"); /* End Critical section */ return (CACHE_L1Size)(curSize);}/** ============================================================================ * @n@b CACHE_freezeL1p * * @b Description * @n Freezes L1P. * @n As per the specification, * @n a. The new freeze state is programmed in L1PCC. * @n b. The old state is read from the L1PCC from the POPER field. * @n This latter read accomplishes 2 things, viz. Ensuring the new state * is programmed as well as reading the old programmed value. * * @b Arguments * @n None * * <b> Return Value </b> * @n Old Freeze State (CACHE_L1_Freeze) * * @b Example * @verbatim ... CACHE_L1_Freeze oldFreezeState ; oldFreezeState = CACHE_freezeL1p(); ... @endverbatim * ============================================================================ */#pragma CODE_SECTION (CACHE_freezeL1p, ".text:cslsys_section:cache");CACHE_L1_Freeze CACHE_freezeL1p ( void){ Uint32 oldL1PFrz; /* Critical section */ asm(" dint"); ((CSL_CacheRegsOvly)CSL_CACHE_REGS)->L1PCC = CSL_FMK(CACHE_L1PCC_OPER, CSL_CACHE_L1PCC_OPER_FREEZE); oldL1PFrz = CSL_FEXT( ((CSL_CacheRegsOvly)CSL_CACHE_REGS)->L1PCC, CACHE_L1PCC_POPER); /* End Critical Section */ asm(" rint"); if (oldL1PFrz == CSL_CACHE_L1PCC_OPER_FREEZE) return CACHE_L1P_FREEZE; else return CACHE_L1D_NORMAL;}/** ============================================================================ * @n@b CACHE_unfreezeL1p * * @b Description * @n Unfreezes L1P. * @n As per the specification, * @n a. The normal state is programmed in L1PCC * @n b. The old state is read from the L1PCC from the POPER field. * @n This latter read accomplishes 2 things, viz. Ensuring the new state * is programmed as well as reading the old programmed value. * * @b Arguments * @n None * * <b> Return Value </b> * @n Old Freeze State (CACHE_L1_Freeze) * * @b Example * @verbatim ... CACHE_L1_Freeze oldFreezeState ; oldFreezeState = CACHE_unfreezeL1p(); ... @endverbatim * ============================================================================ */#pragma CODE_SECTION (CACHE_unfreezeL1p, ".text:cslsys_section:cache");CACHE_L1_Freeze CACHE_unfreezeL1p ( void){ Uint32 temp; /* Critical section */ asm(" dint"); ((CSL_CacheRegsOvly)CSL_CACHE_REGS)->L1PCC = CSL_FMK(CACHE_L1PCC_OPER, CSL_CACHE_L1PCC_OPER_NORM); temp = CSL_FEXT( ((CSL_CacheRegsOvly)CSL_CACHE_REGS)->L1PCC, CACHE_L1PCC_POPER); asm(" rint"); /* End Critical Section */ if (temp == CSL_CACHE_L1PCC_OPER_NORM) return CACHE_L1P_NORMAL; else return CACHE_L1P_FREEZE;}/** ============================================================================ * @n@b CACHE_invL1p * * @b Description * @n Invalidates range specified in L1P. * @n As per the specification, * @n a. The start of the range that needs to be invalidated is written * into L1PIBAR * @n b. The byte count is programmed in L1PIWC. * * @b Arguments * @verbatim blockPtr Start address of range to be invalidated byteCnt Number of bytes to be invalidated wait Whether the call is blocking (and the extent of wait) till the issue operation is completed. Whether the function must exit on completion/or not. @endverbatim * * <b> Return Value </b> * @n None * * @b Example * @verbatim ... CACHE_invL1p ((Uint32*)(0x1000), 200, CACHE_NOWAIT); ... @endverbatim * ============================================================================ */#pragma CODE_SECTION (CACHE_invL1p, ".text:cslsys_section:cache");void CACHE_invL1p ( void *blockPtr, Uint32 byteCnt, CACHE_Wait wait){ CACHE_waitInternal(); /* treat BAR/WC as crit section */ asm(" dint"); ((CSL_CacheRegsOvly)CSL_CACHE_REGS)->L1PIBAR = (Uint32)blockPtr; ((CSL_CacheRegsOvly)CSL_CACHE_REGS)->L1PIWC = ((byteCnt+3)>>2); _CSL_cachebusyState = CACHE_WAIT_L1PINV; asm(" rint"); /* End Critical section */ if (wait) _CACHE_wait(wait);}/** ============================================================================ * @n@b CACHE_invAllL1p * * @b Description * @n Invalidates all of L1P. * @n As per the specification, * @n a. The L1PINV is programmed. * * @b Arguments * @verbatim wait Whether the call is blocking (and the extent of wait) till the issue operation is completed. Whether the function must exit on completion/or not. @endverbatim * * <b> Return Value </b> * @n None * * @b Example * @verbatim ... CACHE_invAllL1p (CACHE_NOWAIT); ... @endverbatim * ============================================================================ */#pragma CODE_SECTION (CACHE_invAllL1p, ".text:cslsys_section:cache");void CACHE_invAllL1p ( CACHE_Wait wait){ CACHE_waitInternal(); /* Critical Section */ asm(" dint"); ((CSL_CacheRegsOvly)CSL_CACHE_REGS)->L1PINV = 1; _CSL_cachebusyState = CACHE_WAIT_L1PINVALL; asm(" rint"); /* End Critical Section */ if (wait) _CACHE_wait(wait);}/** ============================================================================ * @n@b CACHE_setL1dSize * * @b Description * @n Sets the L1D size. * @n As per the specification, * @n a. The new size is programmed in L1DCFG * @n b. L1DCFG is read back to ensure it is set. * * @b Arguments * @verbatim newSize New size to be programmed @endverbatim * * <b> Return Value </b> * @n Old Size set for L1D (CACHE_L1Size) * * @b Example * @verbatim ...
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