csl_edcclear.c

TI达芬奇dm644x各硬件模块测试代码

/*  ============================================================================
 *   Copyright (c) Texas Instruments Inc 2002, 2003, 2004, 2005                 
 *                                                                              
 *   Use of this software is controlled by the terms and conditions found in the
 *   license agreement under which this software has been supplied.             
 *   ===========================================================================
 */ 
/** @file csl_edcClear.c
 *
 *  @brief    File for functional layer of CSL API @a CSL_edcClear()
 *
 *  Description
 *    - The @a CSL_edcClear() function definition & it's associated functions
 *
 *  @date 8 July, 2004
 *  @author Chad Courtney
 */

#include <csl_edc.h>
#pragma CODE_SECTION (CSL_edcClear, ".text:csl_section:edc");

/** Reserves the specified edc for use. The device can be 
 * re-opened anytime after it has been normally closed if so
 * required. The handle returned by this call is input as an
 * essential argument for rest of the APIs described for this
 * module.
 * 
 * <b> Usage Constraints: </b>
 * The CSL system as well as EDC must be succesfully initialized
 * via @a CSL_sysInit() 
 */

/** @brief Clears the Address of the parity error for the specified memory 
 * along with the access type parity error bit.
 */ 
CSL_Status  CSL_edcClear
(
	/** Specificies what memory EDC error address is to be cleared
     */
	CSL_EdcMem              edcMem,
	/** Specificies what fetch type parity error bit or parity error count type
	 * is to be cleared.
	 */
	CSL_EdcClrAccessType		edcAccessType	
)
{
	CSL_Status status = CSL_SOK;
	
	switch(edcAccessType){
	case CSL_EDC_DCLR: /* Clear Data Fetch Parity Error */
		if(edcMem == CSL_EDC_L1P){ /* Clear Parity Error for L1P */
    		status = CSL_ESYS_INVQUERY; /* No Data Parity Fetch Error for L1P */
		}else if(edcMem == CSL_EDC_L2){ /* Clear Parity Error for L2 */
			CSL_FINST(((CSL_EdcRegs*)CSL_EDC_REGS)->L2EDCMD, EDC_L2EDCMD_DCLR, CLR);		
		}else{	/* Incorrect Memory Type given */
    		status = CSL_ESYS_INVQUERY;
    	}
		break;
	case CSL_EDC_PCLR: /* Clear Program Fetch Parity Error */
		if(edcMem == CSL_EDC_L1P){ /* Clear Parity Error for L1P */
			CSL_FINST(((CSL_EdcRegs*)CSL_EDC_REGS)->L1PEDCMD, EDC_L1PEDCMD_ICLR, CLR);
		}else if(edcMem == CSL_EDC_L2){ /* Clear Parity Error for L2 */
			CSL_FINST(((CSL_EdcRegs*)CSL_EDC_REGS)->L2EDCMD, EDC_L2EDCMD_ICLR, CLR);		
		}else{	/* Incorrect Memory Type given */
    		status = CSL_ESYS_INVQUERY;
    	}
		break;
	case CSL_EDC_DMACLR: /* Clear DMA Read Parity Error */
		if(edcMem == CSL_EDC_L1P){ /* Clear Parity Error for L1P */
			CSL_FINST(((CSL_EdcRegs*)CSL_EDC_REGS)->L1PEDCMD, EDC_L1PEDCMD_DMACLR, CLR);
		}else if(edcMem == CSL_EDC_L2){ /* Clear Parity Error for L2 */
			CSL_FINST(((CSL_EdcRegs*)CSL_EDC_REGS)->L2EDCMD, EDC_L2EDCMD_DMACLR, CLR);		
		}else{	/* Incorrect Memory Type given */
    		status = CSL_ESYS_INVQUERY;
    	}
		break;
	case CSL_EDC_CECNTCLR: /* Clear Correctable Parity Error Count */
		if(edcMem == CSL_EDC_L1P){
    		status = CSL_ESYS_INVQUERY; /* No Parity Error Count for L1P */
		}else if(edcMem == CSL_EDC_L2){ /* Clear Correctable Parity Error Count for L2 */
			CSL_FINST(((CSL_EdcRegs*)CSL_EDC_REGS)->L2EDCPEC, EDC_L2EDCPEC_CNT, RESETVAL);		
		}else{	/* Incorrect Memory Type given */
    		status = CSL_ESYS_INVQUERY;
    	}
		break;
	case CSL_EDC_NCECNTCLR: /* Clear Correctable Parity Error Count */
		if(edcMem == CSL_EDC_L1P){
    		status = CSL_ESYS_INVQUERY; /* No Parity Error Count for L1P */
		}else if(edcMem == CSL_EDC_L2){ /* Clear Correctable Parity Error Count for L2 */
			CSL_FINST(((CSL_EdcRegs*)CSL_EDC_REGS)->L2EDNPEC, EDC_L2EDNPEC_CNT, RESETVAL);		
		}else{	/* Incorrect Memory Type given */
    		status = CSL_ESYS_INVQUERY;
    	}
		break;
    default:
    	status = CSL_ESYS_INVQUERY;			
    }
	return status;    
}