cslr_chip.h

TI达芬奇dm644x各硬件模块测试代码

/* TSR */

#define CSL_CHIP_TSR_IB_MASK             (0x00008000u)
#define CSL_CHIP_TSR_IB_SHIFT            (0x0000000Fu)
#define CSL_CHIP_TSR_IB_RESETVAL         (0x00000000u)
#define CSL_CHIP_TSR_IB_UNBLOCKED        (0x00000000u)
#define CSL_CHIP_TSR_IB_BLOCKED          (0x00000001u)

#define CSL_CHIP_TSR_SPLX_MASK           (0x00004000u)
#define CSL_CHIP_TSR_SPLX_SHIFT          (0x0000000Eu)
#define CSL_CHIP_TSR_SPLX_RESETVAL       (0x00000000u)
#define CSL_CHIP_TSR_SPLX_NOTEXEC        (0x00000000u)
#define CSL_CHIP_TSR_SPLX_EXEC           (0x00000001u)

#define CSL_CHIP_TSR_EXC_MASK            (0x00000400u)
#define CSL_CHIP_TSR_EXC_SHIFT           (0x0000000Au)
#define CSL_CHIP_TSR_EXC_RESETVAL        (0x00000000u)
#define CSL_CHIP_TSR_EXC_NOTEXEC         (0x00000000u)
#define CSL_CHIP_TSR_EXC_EXEC            (0x00000001u)

#define CSL_CHIP_TSR_INT_MASK            (0x00000200u)
#define CSL_CHIP_TSR_INT_SHIFT           (0x00000009u)
#define CSL_CHIP_TSR_INT_RESETVAL        (0x00000000u)
#define CSL_CHIP_TSR_INT_NOTEXEC         (0x00000000u)
#define CSL_CHIP_TSR_INT_EXEC            (0x00000001u)

#define CSL_CHIP_TSR_CXM_MASK            (0x000000C0u)
#define CSL_CHIP_TSR_CXM_SHIFT           (0x00000006u)
#define CSL_CHIP_TSR_CXM_RESETVAL        (0x00000000u)
#define CSL_CHIP_TSR_CXM_SUPERVISOR      (0x00000000u)
#define CSL_CHIP_TSR_CXM_USER            (0x00000001u)

#define CSL_CHIP_TSR_DBGM_MASK           (0x00000010u)
#define CSL_CHIP_TSR_DBGM_SHIFT          (0x00000004u)
#define CSL_CHIP_TSR_DBGM_RESETVAL       (0x00000000u)
#define CSL_CHIP_TSR_DBGM_EMU_ENABLE     (0x00000000u)
#define CSL_CHIP_TSR_DBGM_EMU_DISABLE    (0x00000001u)

#define CSL_CHIP_TSR_XEN_MASK            (0x00000008u)
#define CSL_CHIP_TSR_XEN_SHIFT           (0x00000003u)
#define CSL_CHIP_TSR_XEN_RESETVAL        (0x00000000u)
#define CSL_CHIP_TSR_XEN_ENABLE          (0x00000001u)
#define CSL_CHIP_TSR_XEN_DISABLE         (0x00000000u)

#define CSL_CHIP_TSR_GEE_MASK            (0x00000004u)
#define CSL_CHIP_TSR_GEE_SHIFT           (0x00000002u)
#define CSL_CHIP_TSR_GEE_RESETVAL        (0x00000000u)
#define CSL_CHIP_TSR_GEE_ENABLE          (0x00000001u)
#define CSL_CHIP_TSR_GEE_DISABLE         (0x00000000u)

#define CSL_CHIP_TSR_SGIE_MASK           (0x00000002u)
#define CSL_CHIP_TSR_SGIE_SHIFT          (0x00000001u)
#define CSL_CHIP_TSR_SGIE_RESETVAL       (0x00000000u)

#define CSL_CHIP_TSR_GIE_MASK            (0x00000001u)
#define CSL_CHIP_TSR_GIE_SHIFT           (0x00000000u)
#define CSL_CHIP_TSR_GIE_RESETVAL        (0x00000000u)
#define CSL_CHIP_TSR_GIE_ENABLE          (0x00000001u)
#define CSL_CHIP_TSR_GIE_DISABLE         (0x00000000u)

#define CSL_CHIP_TSR_RESETVAL            (0x00000000u)

/* ITSR */

#define CSL_CHIP_ITSR_IB_MASK            (0x00008000u)
#define CSL_CHIP_ITSR_IB_SHIFT           (0x0000000Fu)
#define CSL_CHIP_ITSR_IB_RESETVAL        (0x00000000u)
#define CSL_CHIP_ITSR_IB_UNBLOCKED       (0x00000000u)
#define CSL_CHIP_ITSR_IB_BLOCKED         (0x00000001u)

#define CSL_CHIP_ITSR_SPLX_MASK          (0x00004000u)
#define CSL_CHIP_ITSR_SPLX_SHIFT         (0x0000000Eu)
#define CSL_CHIP_ITSR_SPLX_RESETVAL      (0x00000000u)
#define CSL_CHIP_ITSR_SPLX_NOTEXEC       (0x00000000u)
#define CSL_CHIP_ITSR_SPLX_EXEC          (0x00000001u)

#define CSL_CHIP_ITSR_EXC_MASK           (0x00000400u)
#define CSL_CHIP_ITSR_EXC_SHIFT          (0x0000000Au)
#define CSL_CHIP_ITSR_EXC_RESETVAL       (0x00000000u)
#define CSL_CHIP_ITSR_EXC_NOTEXEC        (0x00000000u)
#define CSL_CHIP_ITSR_EXC_EXEC           (0x00000001u)

#define CSL_CHIP_ITSR_INT_MASK           (0x00000200u)
#define CSL_CHIP_ITSR_INT_SHIFT          (0x00000009u)
#define CSL_CHIP_ITSR_INT_RESETVAL       (0x00000000u)
#define CSL_CHIP_ITSR_INT_NOTEXEC        (0x00000000u)
#define CSL_CHIP_ITSR_INT_EXEC           (0x00000001u)

#define CSL_CHIP_ITSR_CXM_MASK           (0x000000C0u)
#define CSL_CHIP_ITSR_CXM_SHIFT          (0x00000006u)
#define CSL_CHIP_ITSR_CXM_RESETVAL       (0x00000000u)
#define CSL_CHIP_ITSR_CXM_SUPERVISOR     (0x00000000u)
#define CSL_CHIP_ITSR_CXM_USER           (0x00000001u)

#define CSL_CHIP_ITSR_DBGM_MASK          (0x00000010u)
#define CSL_CHIP_ITSR_DBGM_SHIFT         (0x00000004u)
#define CSL_CHIP_ITSR_DBGM_RESETVAL      (0x00000000u)
#define CSL_CHIP_ITSR_DBGM_EMU_ENABLE    (0x00000000u)
#define CSL_CHIP_ITSR_DBGM_EMU_DISABLE   (0x00000001u)

#define CSL_CHIP_ITSR_XEN_MASK           (0x00000008u)
#define CSL_CHIP_ITSR_XEN_SHIFT          (0x00000003u)
#define CSL_CHIP_ITSR_XEN_RESETVAL       (0x00000000u)
#define CSL_CHIP_ITSR_XEN_ENABLE         (0x00000001u)
#define CSL_CHIP_ITSR_XEN_DISABLE        (0x00000000u)

#define CSL_CHIP_ITSR_GEE_MASK           (0x00000004u)
#define CSL_CHIP_ITSR_GEE_SHIFT          (0x00000002u)
#define CSL_CHIP_ITSR_GEE_RESETVAL       (0x00000000u)
#define CSL_CHIP_ITSR_GEE_ENABLE         (0x00000001u)
#define CSL_CHIP_ITSR_GEE_DISABLE        (0x00000000u)

#define CSL_CHIP_ITSR_SGIE_MASK          (0x00000002u)
#define CSL_CHIP_ITSR_SGIE_SHIFT         (0x00000001u)
#define CSL_CHIP_ITSR_SGIE_RESETVAL      (0x00000000u)

#define CSL_CHIP_ITSR_GIE_MASK           (0x00000001u)
#define CSL_CHIP_ITSR_GIE_SHIFT          (0x00000000u)
#define CSL_CHIP_ITSR_GIE_RESETVAL       (0x00000000u)
#define CSL_CHIP_ITSR_GIE_ENABLE         (0x00000001u)
#define CSL_CHIP_ITSR_GIE_DISABLE        (0x00000000u)

#define CSL_CHIP_ITSR_RESETVAL           (0x00000000u)

/* NTSR */

#define CSL_CHIP_NTSR_IB_MASK            (0x00008000u)
#define CSL_CHIP_NTSR_IB_SHIFT           (0x0000000Fu)
#define CSL_CHIP_NTSR_IB_RESETVAL        (0x00000000u)
#define CSL_CHIP_NTSR_IB_UNBLOCKED       (0x00000000u)
#define CSL_CHIP_NTSR_IB_BLOCKED         (0x00000001u)

#define CSL_CHIP_NTSR_SPLX_MASK          (0x00004000u)
#define CSL_CHIP_NTSR_SPLX_SHIFT         (0x0000000Eu)
#define CSL_CHIP_NTSR_SPLX_RESETVAL      (0x00000000u)
#define CSL_CHIP_NTSR_SPLX_NOTEXEC       (0x00000000u)
#define CSL_CHIP_NTSR_SPLX_EXEC          (0x00000001u)

#define CSL_CHIP_NTSR_EXC_MASK           (0x00000400u)
#define CSL_CHIP_NTSR_EXC_SHIFT          (0x0000000Au)
#define CSL_CHIP_NTSR_EXC_RESETVAL       (0x00000000u)
#define CSL_CHIP_NTSR_EXC_NOTEXEC        (0x00000000u)
#define CSL_CHIP_NTSR_EXC_EXEC           (0x00000001u)

#define CSL_CHIP_NTSR_INT_MASK           (0x00000200u)
#define CSL_CHIP_NTSR_INT_SHIFT          (0x00000009u)
#define CSL_CHIP_NTSR_INT_RESETVAL       (0x00000000u)
#define CSL_CHIP_NTSR_INT_NOTEXEC        (0x00000000u)
#define CSL_CHIP_NTSR_INT_EXEC           (0x00000001u)

#define CSL_CHIP_NTSR_CXM_MASK           (0x000000C0u)
#define CSL_CHIP_NTSR_CXM_SHIFT          (0x00000006u)
#define CSL_CHIP_NTSR_CXM_RESETVAL       (0x00000000u)
#define CSL_CHIP_NTSR_CXM_SUPERVISOR     (0x00000000u)
#define CSL_CHIP_NTSR_CXM_USER           (0x00000001u)

#define CSL_CHIP_NTSR_DBGM_MASK          (0x00000010u)
#define CSL_CHIP_NTSR_DBGM_SHIFT         (0x00000004u)
#define CSL_CHIP_NTSR_DBGM_RESETVAL      (0x00000000u)
#define CSL_CHIP_NTSR_DBGM_EMU_ENABLE    (0x00000000u)
#define CSL_CHIP_NTSR_DBGM_EMU_DISABLE   (0x00000001u)

#define CSL_CHIP_NTSR_XEN_MASK           (0x00000008u)
#define CSL_CHIP_NTSR_XEN_SHIFT          (0x00000003u)
#define CSL_CHIP_NTSR_XEN_RESETVAL       (0x00000000u)
#define CSL_CHIP_NTSR_XEN_ENABLE         (0x00000001u)
#define CSL_CHIP_NTSR_XEN_DISABLE        (0x00000000u)

#define CSL_CHIP_NTSR_GEE_MASK           (0x00000004u)
#define CSL_CHIP_NTSR_GEE_SHIFT          (0x00000002u)
#define CSL_CHIP_NTSR_GEE_RESETVAL       (0x00000000u)
#define CSL_CHIP_NTSR_GEE_ENABLE         (0x00000001u)
#define CSL_CHIP_NTSR_GEE_DISABLE        (0x00000000u)

#define CSL_CHIP_NTSR_SGIE_MASK          (0x00000002u)
#define CSL_CHIP_NTSR_SGIE_SHIFT         (0x00000001u)
#define CSL_CHIP_NTSR_SGIE_RESETVAL      (0x00000000u)

#define CSL_CHIP_NTSR_GIE_MASK           (0x00000001u)
#define CSL_CHIP_NTSR_GIE_SHIFT          (0x00000000u)
#define CSL_CHIP_NTSR_GIE_RESETVAL       (0x00000000u)
#define CSL_CHIP_NTSR_GIE_ENABLE         (0x00000001u)
#define CSL_CHIP_NTSR_GIE_DISABLE        (0x00000000u)

#define CSL_CHIP_NTSR_RESETVAL           (0x00000000u)

/* ETSR */

#define CSL_CHIP_ETSR_IB_MASK            (0x00008000u)
#define CSL_CHIP_ETSR_IB_SHIFT           (0x0000000Fu)
#define CSL_CHIP_ETSR_IB_RESETVAL        (0x00000000u)

#define CSL_CHIP_ETSR_SPLX_MASK          (0x00004000u)
#define CSL_CHIP_ETSR_SPLX_SHIFT         (0x0000000Eu)
#define CSL_CHIP_ETSR_SPLX_RESETVAL      (0x00000000u)

#define CSL_CHIP_ETSR_EXC_MASK           (0x00000400u)
#define CSL_CHIP_ETSR_EXC_SHIFT          (0x0000000Au)
#define CSL_CHIP_ETSR_EXC_RESETVAL       (0x00000000u)

#define CSL_CHIP_ETSR_INT_MASK           (0x00000200u)
#define CSL_CHIP_ETSR_INT_SHIFT          (0x00000009u)
#define CSL_CHIP_ETSR_INT_RESETVAL       (0x00000000u)

#define CSL_CHIP_ETSR_CXM_MASK           (0x000000C0u)
#define CSL_CHIP_ETSR_CXM_SHIFT          (0x00000006u)
#define CSL_CHIP_ETSR_CXM_RESETVAL       (0x00000000u)

#define CSL_CHIP_ETSR_DBGM_MASK          (0x00000010u)
#define CSL_CHIP_ETSR_DBGM_SHIFT         (0x00000004u)
#define CSL_CHIP_ETSR_DBGM_RESETVAL      (0x00000000u)

#define CSL_CHIP_ETSR_XEN_MASK           (0x00000008u)
#define CSL_CHIP_ETSR_XEN_SHIFT          (0x00000003u)
#define CSL_CHIP_ETSR_XEN_RESETVAL       (0x00000000u)

#define CSL_CHIP_ETSR_GEE_MASK           (0x00000004u)
#define CSL_CHIP_ETSR_GEE_SHIFT          (0x00000002u)
#define CSL_CHIP_ETSR_GEE_RESETVAL       (0x00000000u)

#define CSL_CHIP_ETSR_SGIE_MASK          (0x00000002u)
#define CSL_CHIP_ETSR_SGIE_SHIFT         (0x00000001u)
#define CSL_CHIP_ETSR_SGIE_RESETVAL      (0x00000000u)

#define CSL_CHIP_ETSR_GIE_MASK           (0x00000001u)
#define CSL_CHIP_ETSR_GIE_SHIFT          (0x00000000u)
#define CSL_CHIP_ETSR_GIE_RESETVAL       (0x00000000u)

#define CSL_CHIP_ETSR_RESETVAL           (0x00000000u)

/* EFR */

#define CSL_CHIP_EFR_NXF_MASK            (0x80000000u)
#define CSL_CHIP_EFR_NXF_SHIFT           (0x0000001Fu)
#define CSL_CHIP_EFR_NXF_RESETVAL        (0x00000000u)

#define CSL_CHIP_EFR_EXF_MASK            (0x40000000u)
#define CSL_CHIP_EFR_EXF_SHIFT           (0x0000001Eu)
#define CSL_CHIP_EFR_EXF_RESETVAL        (0x00000000u)

#define CSL_CHIP_EFR_IXF_MASK            (0x00000002u)
#define CSL_CHIP_EFR_IXF_SHIFT           (0x00000001u)
#define CSL_CHIP_EFR_IXF_RESETVAL        (0x00000000u)

#define CSL_CHIP_EFR_OXF_MASK            (0x00000001u)
#define CSL_CHIP_EFR_OXF_SHIFT           (0x00000000u)
#define CSL_CHIP_EFR_OXF_RESETVAL        (0x00000000u)

#define CSL_CHIP_EFR_RESETVAL            (0x00000000u)

/* ECR */

#define CSL_CHIP_ECR_NXC_MASK            (0x80000000u)
#define CSL_CHIP_ECR_NXC_SHIFT           (0x0000001Fu)
#define CSL_CHIP_ECR_NXC_RESETVAL        (0x00000000u)
#define CSL_CHIP_ECR_NXC_CLEAR           (0x00000001u)

#define CSL_CHIP_ECR_EXC_MASK            (0x40000000u)
#define CSL_CHIP_ECR_EXC_SHIFT           (0x0000001Eu)
#define CSL_CHIP_ECR_EXC_RESETVAL        (0x00000000u)
#define CSL_CHIP_ECR_EXC_CLEAR           (0x00000001u)

#define CSL_CHIP_ECR_IXC_MASK            (0x00000002u)
#define CSL_CHIP_ECR_IXC_SHIFT           (0x00000001u)
#define CSL_CHIP_ECR_IXC_RESETVAL        (0x00000000u)
#define CSL_CHIP_ECR_IXC_CLEAR           (0x00000001u)

#define CSL_CHIP_ECR_OXC_MASK            (0x00000001u)
#define CSL_CHIP_ECR_OXC_SHIFT           (0x00000000u)
#define CSL_CHIP_ECR_OXC_RESETVAL        (0x00000000u)
#define CSL_CHIP_ECR_OXC_CLEAR           (0x00000001u)

#define CSL_CHIP_ECR_RESETVAL            (0x00000000u)

/* IERR */

#define CSL_CHIP_IERR_IERR_MASK          (0xFFFFFFFFu)
#define CSL_CHIP_IERR_IERR_SHIFT         (0x00000000u)
#define CSL_CHIP_IERR_IERR_RESETVAL      (0x00000000u)

#define CSL_CHIP_IERR_RESETVAL          (0x00000000u)

#endif