_csl_pscstateenable.c

TI达芬奇dm644x各硬件模块测试代码

#include <csl_pscAux.h>

#pragma CODE_SECTION (CSL_pscMdEnable, ".text:csl_section:psc");

CSL_Status  CSL_pscMdEnable(
    CSL_PscHandle     hPsc,
    CSL_PscMdCfg      *mdCfg 
	){

  CSL_PscRegsOvly pscRegs = hPsc->regs;
  Uint16 i,flagDspPd;

  /* Wait for PTSTAT.GOSTAT1 to clear to 0x0 before initiating a new transition */  
  while( ( CSL_FEXT(pscRegs->PTSTAT, PSC_PTSTAT_GOSTAT1) )  ==  CSL_PSC_PTSTAT_GOSTAT_TRANSITIONING ){/* wait */;}

  for( i = 0; i < mdCfg->numMds; i++ ){
    /* Set MDCTLx.NEXT to new state value for all modules in all Power Domains*/
    CSL_FINS(pscRegs->MDCTL[mdCfg->mdId[i]], PSC_MDCTL_NEXT, CSL_PSC_MD_STATE_ENABLE);
    
    /* Do special workaround */
    if( mdCfg->mdId[i] == CSL_PSC_MD_VPSSSLV  |
        mdCfg->mdId[i] == CSL_PSC_MD_EMAC     |
        mdCfg->mdId[i] == CSL_PSC_MD_EMACCTRL |
        mdCfg->mdId[i] == CSL_PSC_MD_MDIO     |
        mdCfg->mdId[i] == CSL_PSC_MD_IEEE1394 |
        mdCfg->mdId[i] == CSL_PSC_MD_USB      |
        mdCfg->mdId[i] == CSL_PSC_MD_ATA      |
        mdCfg->mdId[i] == CSL_PSC_MD_VLYNQ    |
        mdCfg->mdId[i] == CSL_PSC_MD_HPI      |
        mdCfg->mdId[i] == CSL_PSC_MD_DDREMIF  |
        mdCfg->mdId[i] == CSL_PSC_MD_AEMIF    |
        mdCfg->mdId[i] == CSL_PSC_MD_MMCSD    |
        mdCfg->mdId[i] == CSL_PSC_MD_MEMSTICK |
        mdCfg->mdId[i] == CSL_PSC_MD_MCBSP    |
        mdCfg->mdId[i] == CSL_PSC_MD_GPIO     |
        mdCfg->mdId[i] == CSL_PSC_MD_IMCOP    ){
        CSL_FINS(pscRegs->MDCTL[mdCfg->mdId[i]], PSC_MDCTL_EMURSTIE, CSL_PSC_MDCTL_EMURSTIE_INT_ENABLE); 
    } 

    /* Update the state record array if not NULL */
    if( mdCfg->mdStateRecord != NULL ){ 
      mdCfg->mdStateRecord[mdCfg->mdId[i]] = CSL_PSC_MD_STATE_ENABLE;
    }
    
    /* Set a flag if we will need to transition the DSP PD */
    if( mdCfg->mdId[i] >= CSL_PSC_MD_DSP ){
      flagDspPd = 1;
    } 
    
  }

  /* Set PTCMD.GO0 to 0x1 to initiate the state transition for modules in the ALWAYSON PD */
  CSL_FINS(pscRegs->PTCMD, PSC_PTCMD_GO0, CSL_PSC_PTCMD_GO_GO );                             
                                                   
  /* Wait for PTSTAT.GOSTAT0 to clear to 0x0 */
  while( ( CSL_FEXT(pscRegs->PTSTAT, PSC_PTSTAT_GOSTAT0) )  == CSL_PSC_PTSTAT_GOSTAT_TRANSITIONING  ){/* wait */;}

  if( flagDspPd == 1 ){ /* Transition the DSP PD if necessary */
      /* Set PTCMD.GO1 to 0x1 to initiate the state transition for modules in the DSP */
      CSL_FINS(pscRegs->PTCMD, PSC_PTCMD_GO1, CSL_PSC_PTCMD_GO_GO );                             

      /* Wait for PTSTAT.GOSTAT1 to clear to 0x0 */
      while( ( CSL_FEXT(pscRegs->PTSTAT, PSC_PTSTAT_GOSTAT1) )  == CSL_PSC_PTSTAT_GOSTAT_TRANSITIONING  ){/* wait */;}
  }

  for( i = 0; i < mdCfg->numMds; i++ ){
    /* Clear bit for special workaround */
    if( mdCfg->mdId[i] == CSL_PSC_MD_VPSSSLV  |
        mdCfg->mdId[i] == CSL_PSC_MD_EMAC     |
        mdCfg->mdId[i] == CSL_PSC_MD_EMACCTRL |
        mdCfg->mdId[i] == CSL_PSC_MD_MDIO     |
        mdCfg->mdId[i] == CSL_PSC_MD_IEEE1394 |
        mdCfg->mdId[i] == CSL_PSC_MD_USB      |
        mdCfg->mdId[i] == CSL_PSC_MD_ATA      |
        mdCfg->mdId[i] == CSL_PSC_MD_VLYNQ    |
        mdCfg->mdId[i] == CSL_PSC_MD_HPI      |
        mdCfg->mdId[i] == CSL_PSC_MD_DDREMIF  |
        mdCfg->mdId[i] == CSL_PSC_MD_AEMIF    |
        mdCfg->mdId[i] == CSL_PSC_MD_MMCSD    |
        mdCfg->mdId[i] == CSL_PSC_MD_MEMSTICK |
        mdCfg->mdId[i] == CSL_PSC_MD_MCBSP    |
        mdCfg->mdId[i] == CSL_PSC_MD_GPIO     |
        mdCfg->mdId[i] == CSL_PSC_MD_IMCOP    ){
        CSL_FINS(pscRegs->MDCTL[mdCfg->mdId[i]], PSC_MDCTL_EMURSTIE, CSL_PSC_MDCTL_EMURSTIE_INT_DISABLE); 
    } 
  }


  return (CSL_SOK);
}