csl_vlynqgethwstatus.c

TI达芬奇dm644x各硬件模块测试代码

/*  ============================================================================
 *   Copyright (c) Texas Instruments Inc 2002, 2003, 2004, 2005
 *
 *   Use of this software is controlled by the terms and conditions found in the
 *   license agreement under which this software has been supplied.
 *   ===========================================================================
 */

/* ---- File: <csl_vlynqGetHwStatus.c> ---- */

/** \file csl_vlynqGetHwStatus.c
 *
 *  \brief    File for functional layer of CSL API \a CSL_vlynqGetHwStatus()
 *
 *  Description
 *    - The \a CSL_vlynqGetHwStatus() function definition & it's associated
 *      functions
 *
 */


#include <csl_vlynq.h>
#include <csl_vlynqAux.h>

/* ============================================================================
 *  Revision History
 *  ===============
 *  23-Dec-2004 Nsr Updated the source CSL_vlynqGetHwStatus.c for the new CSL
 *                  format.
 *
 * ============================================================================
 */

/** Gets the status of the different operations or the current setup of VLYNQ.
 * The status is returned through @a CSL_VlynqHwSetup. The obtaining of status
 * is the reverse operation of @a CSL_vlynqHwSetup() function.
 *
 */
#pragma CODE_SECTION (CSL_vlynqGetHwStatus, ".text:csl_section:vlynq");
CSL_Status  CSL_vlynqGetHwStatus(
    /** pointer to the object that holds reference to the
     * instance of VLYNQ requested after the call */
    CSL_VlynqHandle                        hVlynq,
    /** the query to this API which indicates the status/setup
     * to be returned */
    CSL_VlynqHwStatusQuery                 query,
    /** placeholder to return the status; @a void* casted */
    void                                   *response
)
{
    CSL_Status status = CSL_SOK;

    switch (query) {
        /** Queries related to local VLYNQ: Get Status from local VLYNQ
         *  configuration registers */

        case CSL_VLYNQ_QUERY_REVID:
            /** unique ID of VLYNQ module */
            CSL_vlynqRevIdGet (hVlynq, response);
            break;

        /*Razak: Added following 2 queries for major & minor revisions */
        case CSL_VLYNQ_QUERY_REVMAJ:
            /* major revision of VLYNQ module */
            CSL_vlynqRevMajGet (hVlynq, response);
            break;

        case CSL_VLYNQ_QUERY_REVMIN:
            /* minor revision of VLYNQ module */
            CSL_vlynqRevMinGet (hVlynq, response);
            break;

        case CSL_VLYNQ_QUERY_PMEN:
            /* Power Management info */
            CSL_vlynqPowMgmtGet (hVlynq, response);
            break;

        /*Razak: Added following 1 query for rxsampleval */
        case CSL_VLYNQ_QUERY_RXSAMPLEVAL:
            /* get value from rxsampleval field */
            CSL_vlynqRxSampleValGet (hVlynq, response);
            break;

        case CSL_VLYNQ_QUERY_RTMENABLE:
            /* RTM Logic info */
            CSL_vlynqRtmEnableGet (hVlynq, response);
            break;

        case CSL_VLYNQ_QUERY_TXFASTPATH:
            /* Transmit Path */
            CSL_vlynqTxFastPathGet (hVlynq, response);
            break;

        case CSL_VLYNQ_QUERY_CLKDIR:
            /* Serial clock direction */
            CSL_vlynqClkDirGet (hVlynq, response);
            break;

        case CSL_VLYNQ_QUERY_INTLOCAL:
            /* Interrupt Postage Info (local/serial interface) */
            CSL_vlynqIntLocGet (hVlynq, response);
            break;

        case CSL_VLYNQ_QUERY_INTENABLE:
            /* Status Interrupts Enanbled/Disabled */
            CSL_vlynqIntEnableStatGet (hVlynq, response);
            break;

        case CSL_VLYNQ_QUERY_INTVEC:
            /* intvec: Interrupts Vector Status
             *  (bit in INTPENDSET, set for VLYNQ module) */
             CSL_vlynqIntVecStatGet (hVlynq, response);
            break;

        case CSL_VLYNQ_QUERY_INT2CFG:
            /* Status in Interrupt Packet written to?
             *  (Config-reg or memory) */
             CSL_vlynqInt2CfgStatGet (hVlynq, response);
            break;

        case CSL_VLYNQ_QUERY_AOPTDISABLE:
            /* Address Optimization */
            CSL_vlynqAoptDisableGet (hVlynq, response);
            break;

        case CSL_VLYNQ_QUERY_ILOOP:
            /* Internal Loop */
            CSL_vlynqILoopStatGet (hVlynq, response);
            break;

        case CSL_VLYNQ_QUERY_SWIDTHIN:
            /* Size/Width of inbound serial data */
            CSL_vlynqSerWidthInGet (hVlynq, response);
            break;

        case CSL_VLYNQ_QUERY_SWIDTHOUT:
            /* Size/Width of outbound serial data */
            CSL_vlynqSerWidthOutGet (hVlynq, response);
            break;

        case CSL_VLYNQ_QUERY_RXCURRENTSAMPLE:
            /* Current clock sample value used by RTM */
            CSL_vlynqRxCurrentSampleGet (hVlynq, response);
            break;

        case CSL_VLYNQ_QUERY_RTM:
            /* RTM logic inclusion in RTL */
            CSL_vlynqRtmGet (hVlynq, response);
            break;

        case CSL_VLYNQ_QUERY_IFLOW:
            /* In bound Flow Control */
            CSL_vlynqIFlowStatGet (hVlynq, response);
            break;

        case CSL_VLYNQ_QUERY_OFLOW:
            /* Out bound Flow Control */
            CSL_vlynqOFlowStatGet (hVlynq, response);
            break;

        case CSL_VLYNQ_QUERY_RERROR:
            /* Remote Packet Error */
            CSL_vlynqRErrorStatGet (hVlynq, response);
            break;

        case CSL_VLYNQ_QUERY_LERROR:
            /* Local/ Inbound Packet Error */
            CSL_vlynqLErrorStatGet (hVlynq, response);
            break;

        case CSL_VLYNQ_QUERY_NFEMPTY3:
            /* Status of FIFO-3 Slave Command FIFO not empty */
            CSL_vlynqNFEmpty3StatGet (hVlynq, response);
            break;

        case CSL_VLYNQ_QUERY_NFEMPTY2:
            /* Status of FIFO-2 Slave Data FIFO not empty */
            CSL_vlynqNFEmpty2StatGet (hVlynq, response);
            break;

        case CSL_VLYNQ_QUERY_NFEMPTY1:
            /* Status of FIFO-1 Master Command FIFO not empty */
            CSL_vlynqNFEmpty1StatGet (hVlynq, response);
            break;

        case CSL_VLYNQ_QUERY_NFEMPTY0:
            /* Status of FIFO-0 Master Data FIFO not empty */
            CSL_vlynqNFEmpty0StatGet (hVlynq, response);
            break;

        case CSL_VLYNQ_QUERY_SPEND:
            /* Status of any Pending Requests at Slave Interface */
            CSL_vlynqSPendStatGet (hVlynq, response);
            break;

        case CSL_VLYNQ_QUERY_MPEND:
            /* Status of any Pending Requests at Master Interface */
            CSL_vlynqMPendStatGet (hVlynq, response);
            break;

        case CSL_VLYNQ_QUERY_LINK:
            /* Status of Serial Link establishment */
            CSL_vlynqLinkStatGet (hVlynq, response);
            break;

        case CSL_VLYNQ_QUERY_INTPRI_NOINTPEND:
            /* Status of any pending interrupts from
             *  INTSTATCLR register */
            CSL_vlynqNoIntPendGet (hVlynq, response);
            break;

        case CSL_VLYNQ_QUERY_INTPRI_INTSTAT:
            /* Status of the highest priority interrupt pending from
             *  INTSTATCLR register */
            CSL_vlynqIntPriStatGet (hVlynq, response);
            break;

        case CSL_VLYNQ_QUERY_INTSTATCLR_INTCLR:
            /* Status flags of interrupt(s) in INTSTATCLR register */
            CSL_vlynqIntrStatGet (hVlynq, response);
            break;