csl_ataaux.h

TI达芬奇dm644x各硬件模块测试代码

 *   @b Description
 *      Load descriptor base address pointer.
 *
 *   @b Arguments
 *   @verbatim
        hAta         Handle to the ATA instance
        loadVal      Value to be loaded into the register
     @endverbatim
 *
 *   <b> Return Value </b>
 *       None
 *
 *   <b> Pre Condition </b>
 *   @n  None
 *
 *   <b> Post Condition </b>
 *   @n  Descriptor base addr pointer is loaded.
 *
 *   @b Modifies
 *   @n ata BMIDTPP register.
 *
 *   @b Example
 *   @verbatim
        CSL_AtaHandle      hAta;
        Uint32             loadVal;
        ...
        CSL_ataP_DMADescTable (hAta, loadVal);
        ...
     @endverbatim
 * ===========================================================================
 */
CSL_IDEF_INLINE
void CSL_ataP_DMADescTable (
    CSL_AtaHandle            hAta,
    Uint32                   loadVal
)
{
    CSL_FINS(hAta->regs->DMAENGINE.BMIDTPP, ATA_BMIDTPP_BMIDTP,
             (((Uint32) loadVal) >> 2));
}

/* FOR SECONDARY */

/** ============================================================================
 *   @n@b CSL_ataS_PIOEnable
 *
 *   @b Description
 *      Enables IDE Decode. PIO transactions decoded.
 *
 *   @b Arguments
 *   @verbatim
        hAta         Handle to the ATA instance
     @endverbatim
 *
 *   <b> Return Value </b>
 *       None
 *
 *   <b> Pre Condition </b>
 *   @n  None
 *
 *   <b> Post Condition </b>
 *   @n  PIO transactions decoded.
 *
 *   @b Modifies
 *   @n ata IDETIMS register.
 *
 *   @b Example
 *   @verbatim
        CSL_AtaHandle      hAta;
        ...
        CSL_ataS_PIOEnable (hAta);
        ...
     @endverbatim
 * ===========================================================================
 */
CSL_IDEF_INLINE
void CSL_ataS_PIOEnable (
    CSL_AtaHandle         hAta
)
{
    CSL_FINS(hAta->regs->CONFIG.IDETIMS, ATA_IDETIMS_IDEEN, 1);
}

/** ============================================================================
 *   @n@b CSL_ataS_PIODisable
 *
 *   @b Description
 *      PIO transactions not decoded.
 *
 *   @b Arguments
 *   @verbatim
        hAta         Handle to the ATA instance
     @endverbatim
 *
 *   <b> Return Value </b>
 *       None
 *
 *   <b> Pre Condition </b>
 *   @n  None
 *
 *   <b> Post Condition </b>
 *   @n  PIO transactions not decoded.
 *
 *   @b Modifies
 *   @n ata IDETIMS register.
 *
 *   @b Example
 *   @verbatim
        CSL_AtaHandle      hAta;
        ...
        CSL_ataS_PIODisable (hAta);
        ...
     @endverbatim
 * ===========================================================================
 */
CSL_IDEF_INLINE
void CSL_ataS_PIODisable (
    CSL_AtaHandle          hAta
)
{
    CSL_FINS(hAta->regs->CONFIG.IDETIMS, ATA_IDETIMS_IDEEN, 0);
}

/** ============================================================================
 *   @n@b CSL_ataS_DMAStartRead
 *
 *   @b Description
 *      Starts DMA operation read from device.
 *
 *   @b Arguments
 *   @verbatim
        hAta         Handle to the ATA instance
        loadVal      Value to be loaded into the register
     @endverbatim
 *
 *   <b> Return Value </b>
 *       None
 *
 *   <b> Pre Condition </b>
 *   @n  None
 *
 *   <b> Post Condition </b>
 *   @n  Starts DMA operation of reading.
 *
 *   @b Modifies
 *   @n ata BMIDTPS, UDMACTL, BMICS register.
 *
 *   @b Example
 *   @verbatim
        CSL_AtaHandle      hAta;
        Uint32             loadVal;
        ...
        CSL_ataS_DMAStartRead (hAta, loadVal);
        ...
     @endverbatim
 * ===========================================================================
 */
CSL_IDEF_INLINE
void CSL_ataS_DMAStartRead (
    CSL_AtaHandle            hAta,
    Uint32                   loadVal
)
{
    if (loadVal != NULL) {
        /* if "loadVal" is non-NULL, it specifies DMA Descriptor pointer */
        CSL_FINS(hAta->regs->DMAENGINE.BMIDTPS, ATA_BMIDTPS_BMIDTP,
                 (((Uint32) loadVal) >> 2));
    }

    /* configure for MW-DMA */
    CSL_FINS(hAta->regs->CONFIG.UDMACTL, ATA_UDMACTL_UDMAS0, 0);

    CSL_FINS(hAta->regs->CONFIG.UDMACTL, ATA_UDMACTL_UDMAS1, 0);

    /* read from device */
    CSL_FINS(hAta->regs->DMAENGINE.BMICS, ATA_BMICS_DMADIR, 1);

    CSL_FINS(hAta->regs->DMAENGINE.BMICS, ATA_BMICS_DMASTART, 1);
}

/** ============================================================================
 *   @n@b CSL_ataS_DMAStartWrite
 *
 *   @b Description
 *      Starts DMA operation write from device.
 *
 *   @b Arguments
 *   @verbatim
        hAta         Handle to the ATA instance
        loadVal      Value to be loaded into the register
     @endverbatim
 *
 *   <b> Return Value </b>
 *       None
 *
 *   <b> Pre Condition </b>
 *   @n  None
 *
 *   <b> Post Condition </b>
 *   @n  Starts DMA operation of writing.
 *
 *   @b Modifies
 *   @n ata BMIDTPS, UDMACTL, BMICS register.
 *
 *   @b Example
 *   @verbatim
        CSL_AtaHandle      hAta;
        Uint32             loadVal;
        ...
        CSL_ataS_DMAStartWrite (hAta, loadVal);
        ...
     @endverbatim
 * ===========================================================================
 */
CSL_IDEF_INLINE
void CSL_ataS_DMAStartWrite (
    CSL_AtaHandle             hAta,
    Uint32                    loadVal
)
{
    if (loadVal != NULL) {
        /* if "loadVal" is non-NULL, it specifies DMA Descriptor pointer */
        CSL_FINS(hAta->regs->DMAENGINE.BMIDTPS, ATA_BMIDTPS_BMIDTP,
                 (((Uint32) loadVal) >> 2));
    }

    /* configure for MW-DMA */
    CSL_FINS(hAta->regs->CONFIG.UDMACTL, ATA_UDMACTL_UDMAS0, 0);

    CSL_FINS(hAta->regs->CONFIG.UDMACTL, ATA_UDMACTL_UDMAS1, 0);

    /* write to device */
    CSL_FINS(hAta->regs->DMAENGINE.BMICS, ATA_BMICP_DMADIR, 0);

    CSL_FINS(hAta->regs->DMAENGINE.BMICS, ATA_BMICP_DMASTART, 1);
}

/** ============================================================================
 *   @n@b CSL_ataS_UDMAStartRead
 *
 *   @b Description
 *      Starts UDMA operation of reading.
 *
 *   @b Arguments
 *   @verbatim
        hAta         Handle to the ATA instance
        loadVal      Value to be loaded into the register
     @endverbatim
 *
 *   <b> Return Value </b>
 *       None
 *
 *   <b> Pre Condition </b>
 *   @n  None
 *
 *   <b> Post Condition </b>
 *   @n  Starts UDMA operation of reading.
 *
 *   @b Modifies
 *   @n ata BMIDTPS, UDMACTL, BMICS register.
 *
 *   @b Example
 *   @verbatim
        CSL_AtaHandle      hAta;
        Uint32             loadVal;
        ...
        CSL_ataS_UDMAStartRead (hAta, loadVal);
        ...
     @endverbatim
 * ===========================================================================
 */
CSL_IDEF_INLINE
void CSL_ataS_UDMAStartRead (
    CSL_AtaHandle             hAta,
    Uint32                    loadVal
)
{
    if (loadVal != NULL) {
        /* if "loadVal" is non-NULL, it specifies DMA Descriptor pointer */
        CSL_FINS(hAta->regs->DMAENGINE.BMIDTPS, ATA_BMIDTPS_BMIDTP,
                 (((Uint32) loadVal) >> 2));
    }

    /* configure for UDMA */
    CSL_FINS(hAta->regs->CONFIG.UDMACTL, ATA_UDMACTL_UDMAS0, 1);

    CSL_FINS(hAta->regs->CONFIG.UDMACTL, ATA_UDMACTL_UDMAS1, 1);

    /* read from device */
    CSL_FINS(hAta->regs->DMAENGINE.BMICS, ATA_BMICP_DMADIR, 1);

    CSL_FINS(hAta->regs->DMAENGINE.BMICS, ATA_BMICP_DMASTART, 1);
}

/** ============================================================================
 *   @n@b CSL_ataS_UDMAStartWrite
 *
 *   @b Description
 *      Starts UDMA operation of writing.
 *
 *   @b Arguments
 *   @verbatim
        hAta         Handle to the ATA instance
        loadVal      Value to be loaded into the register
     @endverbatim
 *
 *   <b> Return Value </b>
 *       None
 *
 *   <b> Pre Condition </b>
 *   @n  None
 *
 *   <b> Post Condition </b>
 *   @n  Starts UDMA operation of writing.
 *
 *   @b Modifies
 *   @n ata BMIDTPS, UDMACTL, BMICS register.
 *
 *   @b Example
 *   @verbatim
        CSL_AtaHandle      hAta;
        Uint32             loadVal;
        ...
        CSL_ataS_UDMAStartWrite (hAta, loadVal);
        ...
     @endverbatim
 * ===========================================================================
 */
CSL_IDEF_INLINE
void CSL_ataS_UDMAStartWrite (
    CSL_AtaHandle              hAta,
    Uint32                     loadVal
)
{
    if (loadVal != NULL) {
        /* if "loadVal" is non-NULL, it specifies DMA Descriptor pointer */
        CSL_FINS(hAta->regs->DMAENGINE.BMIDTPS, ATA_BMIDTPS_BMIDTP,
                (((Uint32) loadVal) >> 2));
    }

    /* configure for UDMA */
    CSL_FINS(hAta->regs->CONFIG.UDMACTL, ATA_UDMACTL_UDMAS0, 1);

    CSL_FINS(hAta->regs->CONFIG.UDMACTL, ATA_UDMACTL_UDMAS1, 1);

    /* write to device */
    CSL_FINS(hAta->regs->DMAENGINE.BMICS, ATA_BMICP_DMADIR, 0);

    CSL_FINS(hAta->regs->DMAENGINE.BMICS, ATA_BMICP_DMASTART, 1);
}

/** ============================================================================
 *   @n@b CSL_ataS_DMA_UDMA_Stop
 *
 *   @b Description
 *      Stop DMA & UDMA operations.
 *
 *   @b Arguments
 *   @verbatim
        hAta         Handle to the ATA instance
     @endverbatim
 *
 *   <b> Return Value </b>
 *       None
 *
 *   <b> Pre Condition </b>
 *   @n  None
 *
 *   <b> Post Condition </b>
 *   @n  DMA & UDMA operations stopped.
 *
 *   @b Modifies
 *   @n ata BMICS register.
 *
 *   @b Example
 *   @verbatim
        CSL_AtaHandle      hAta;
        ...
        CSL_ataS_DMA_UDMA_Stop (hAta);
        ...
     @endverbatim
 * ===========================================================================
 */
CSL_IDEF_INLINE
void CSL_ataS_DMA_UDMA_Stop (
    CSL_AtaHandle             hAta
)
{
    CSL_FINS(hAta->regs->DMAENGINE.BMICS, ATA_BMICS_DMASTART, 0);
}

/** ============================================================================
 *   @n@b CSL_ataS_IORDYTimeOutClear
 *
 *   @b Description
 *      Clear IORDY TimeOut pin.
 *
 *   @b Arguments
 *   @verbatim
        hAta         Handle to the ATA instance
     @endverbatim
 *
 *   <b> Return Value </b>
 *       None
 *
 *   <b> Pre Condition </b>
 *   @n  None
 *
 *   <b> Post Condition </b>
 *   @n  IORDY TimeOut pin cleared.
 *
 *   @b Modifies
 *   @n ata BMISS register.
 *
 *   @b Example
 *   @verbatim
        CSL_AtaHandle      hAta;
        ...
        CSL_ataS_IORDYTimeOutClear (hAta);
        ...
     @endverbatim
 * ===========================================================================
 */
CSL_IDEF_INLINE
void CSL_ataS_IORDYTimeOutClear (
    CSL_AtaHandle                 hAta
)
{
    CSL_FINS(hAta->regs->DMAENGINE.BMISS, ATA_BMISS_IORDYINT, 1);
}

/** ============================================================================
 *   @n@b CSL_ataS_IntrStatusClear
 *
 *   @b Description
 *      Clear Interrupt status pin.
 *
 *   @b Arguments
 *   @verbatim
        hAta         Handle to the ATA instance
     @endverbatim
 *
 *   <b> Return Value </b>
 *       None
 *
 *   <b> Pre Condition </b>
 *   @n  None
 *
 *   <b> Post Condition </b>
 *   @n  Interrupt status pin cleared.
 *
 *   @b Modifies
 *   @n ata BMISS register.
 *
 *   @b Example
 *   @verbatim
        CSL_AtaHandle      hAta;
        ...
        CSL_ataS_IntrStatusClear (hAta);
        ...
     @endverbatim
 * ===========================================================================
 */
CSL_IDEF_INLINE
void CSL_ataS_IntrStatusClear (
    CSL_AtaHandle               hAta
)
{
    CSL_FINS(hAta->regs->DMAENGINE.BMISS, ATA_BMISS_INTRSTAT, 1);
}

/** ============================================================================
 *   @n@b CSL_ataS_DMAErrorClear
 *
 *   @b Description
 *      Clear DMA Error pin.
 *
 *   @b Arguments
 *   @verbatim
        hAta         Handle to the ATA instance
     @endverbatim
 *
 *   <b> Return Value </b>
 *       None
 *
 *   <b> Pre Condition </b>
 *   @n  None
 *
 *   <b> Post Condition </b>
 *   @n  DMA Error pin cleared.
 *
 *   @b Modifies
 *   @n ata BMISS register.
 *
 *   @b Example
 *   @verbatim
        CSL_AtaHandle      hAta;
        ...
        CSL_ataS_DMAErrorClear (hAta);
        ...
     @endverbatim
 * ===========================================================================
 */
CSL_IDEF_INLINE
void CSL_ataS_DMAErrorClear (
    CSL_AtaHandle             hAta
)
{
    CSL_FINS(hAta->regs->DMAENGINE.BMISS, ATA_BMISS_DMAERROR, 1);
}

/** ============================================================================
 *   @n@b CSL_ataS_DMADescTable
 *