csl_psc_defaults.h

TI达芬奇dm644x各硬件模块测试代码

/** @file csl_psc_defaults.h
 *
 * @brief    Header file for functional layer of CSL
 *
 * Description
 *    - Default structure instantiations for the CSL_pscHwSetup() function.
 *
 *  @date 5-June-2005
 *  @author Lawrence Ronk
 */

#ifndef _CSL_PSC_DEFAULTS_H_
#define _CSL_PSC_DEFAULTS_H_

#ifdef __cplusplus
extern "C" {
#endif


#include <csl_psc.h>

 
/***************************************************************************************
* Defaults for PSC
***************************************************************************************/ 


static CSL_PscPdId        csl_pscPdIdDefault[] = {
  CSL_PSC_PD_ALWAYSON, 
  CSL_PSC_PD_DSP 
};


static CSL_PscPdState      csl_pscPdStateDefault[] = {
  CSL_PSC_PD_STATE_ON, 
  CSL_PSC_PD_STATE_ON
};    


static CSL_PscPdIntEnable  csl_pscPdIntEnableDefault[] = {
  CSL_PSC_INT_DISABLE
};


static CSL_PscPdState  pdStateRecordDefault[CSL_PSC_NUM_PD];

static CSL_PscPdCfg		   csl_pscPdCfgDefault = {
  csl_pscPdIdDefault, 
  CSL_PSC_NUM_PD,
  csl_pscPdStateDefault,
  csl_pscPdIntEnableDefault,
  pdStateRecordDefault
};


static CSL_PscMdId             csl_pscMdIdDefault[] = {
    CSL_PSC_MD_VPSSMSTR	,
    CSL_PSC_MD_VPSSSLV	,
    CSL_PSC_MD_EDMA1	,
    CSL_PSC_MD_EDMA2	,
    CSL_PSC_MD_EDMA3	,
    CSL_PSC_MD_EMAC		,
    CSL_PSC_MD_EMACCTRL	,
    CSL_PSC_MD_MDIO		,
    CSL_PSC_MD_IEEE1394	,
    CSL_PSC_MD_USB		,
    CSL_PSC_MD_ATA		,	
    CSL_PSC_MD_VLYNQ	,	
    CSL_PSC_MD_HPI		,	
    CSL_PSC_MD_DDREMIF	,	
    CSL_PSC_MD_AEMIF	,	
    CSL_PSC_MD_MMCSD	,	
    CSL_PSC_MD_MEMSTICK	,	
    CSL_PSC_MD_MCBSP	,	
    CSL_PSC_MD_I2C		,	
    CSL_PSC_MD_UART0	,	
    CSL_PSC_MD_UART1	,	
    CSL_PSC_MD_UART2	,	
    CSL_PSC_MD_SPI		,	
    CSL_PSC_MD_PWM0		,	
    CSL_PSC_MD_PWM1		,	
    CSL_PSC_MD_PWM2		,	
    CSL_PSC_MD_GPIO		,	
    CSL_PSC_MD_TIMER0	,	
    CSL_PSC_MD_TIMER1	,	
    CSL_PSC_MD_TIMER2	,	
    CSL_PSC_MD_SYSCTRL	,	
    CSL_PSC_MD_ARM		,	
    CSL_PSC_MD_BUS1		,	
    CSL_PSC_MD_BUS2		,	
    CSL_PSC_MD_BUS3		,	
    CSL_PSC_MD_BUS4		,	
    CSL_PSC_MD_BUS5		,	
    CSL_PSC_MD_BUS6		,	
    CSL_PSC_MD_BUS7		,	
    CSL_PSC_MD_DSP		,	
    CSL_PSC_MD_IMCOP		
};



static CSL_PscMdState      csl_pscMdStateDefault[] = {
  CSL_PSC_MD_STATE_ENABLE, 
  CSL_PSC_MD_STATE_ENABLE, 
  CSL_PSC_MD_STATE_ENABLE, 
  CSL_PSC_MD_STATE_ENABLE, 
  CSL_PSC_MD_STATE_ENABLE, 
  CSL_PSC_MD_STATE_ENABLE, 
  CSL_PSC_MD_STATE_ENABLE, 
  CSL_PSC_MD_STATE_ENABLE, 
  CSL_PSC_MD_STATE_ENABLE, 
  CSL_PSC_MD_STATE_ENABLE, 
  CSL_PSC_MD_STATE_ENABLE, 
  CSL_PSC_MD_STATE_ENABLE, 
  CSL_PSC_MD_STATE_ENABLE, 
  CSL_PSC_MD_STATE_ENABLE, 
  CSL_PSC_MD_STATE_ENABLE, 
  CSL_PSC_MD_STATE_ENABLE, 
  CSL_PSC_MD_STATE_ENABLE, 
  CSL_PSC_MD_STATE_ENABLE, 
  CSL_PSC_MD_STATE_ENABLE, 
  CSL_PSC_MD_STATE_ENABLE, 
  CSL_PSC_MD_STATE_ENABLE, 
  CSL_PSC_MD_STATE_ENABLE, 
  CSL_PSC_MD_STATE_ENABLE, 
  CSL_PSC_MD_STATE_ENABLE, 
  CSL_PSC_MD_STATE_ENABLE, 
  CSL_PSC_MD_STATE_ENABLE, 
  CSL_PSC_MD_STATE_ENABLE, 
  CSL_PSC_MD_STATE_ENABLE, 
  CSL_PSC_MD_STATE_ENABLE, 
  CSL_PSC_MD_STATE_ENABLE, 
  CSL_PSC_MD_STATE_ENABLE, 
  CSL_PSC_MD_STATE_ENABLE, 
  CSL_PSC_MD_STATE_ENABLE, 
  CSL_PSC_MD_STATE_ENABLE, 
  CSL_PSC_MD_STATE_ENABLE, 
  CSL_PSC_MD_STATE_ENABLE, 
  CSL_PSC_MD_STATE_ENABLE, 
  CSL_PSC_MD_STATE_ENABLE, 
  CSL_PSC_MD_STATE_ENABLE, 
  CSL_PSC_MD_STATE_ENABLE,   
  CSL_PSC_MD_STATE_ENABLE
};    


static CSL_PscMdIntEnable  csl_pscMdIntEnableDefault[] = {
  CSL_PSC_INT_DISABLE, CSL_PSC_INT_DISABLE,
  CSL_PSC_INT_DISABLE, CSL_PSC_INT_DISABLE,
  CSL_PSC_INT_DISABLE, CSL_PSC_INT_DISABLE,
  CSL_PSC_INT_DISABLE, CSL_PSC_INT_DISABLE,
  CSL_PSC_INT_DISABLE, CSL_PSC_INT_DISABLE,
  CSL_PSC_INT_DISABLE, CSL_PSC_INT_DISABLE,
  CSL_PSC_INT_DISABLE, CSL_PSC_INT_DISABLE,
  CSL_PSC_INT_DISABLE, CSL_PSC_INT_DISABLE,
  CSL_PSC_INT_DISABLE, CSL_PSC_INT_DISABLE,
  CSL_PSC_INT_DISABLE, CSL_PSC_INT_DISABLE,
  CSL_PSC_INT_DISABLE, CSL_PSC_INT_DISABLE,
  CSL_PSC_INT_DISABLE, CSL_PSC_INT_DISABLE,
  CSL_PSC_INT_DISABLE, CSL_PSC_INT_DISABLE,
  CSL_PSC_INT_DISABLE, CSL_PSC_INT_DISABLE,
  CSL_PSC_INT_DISABLE, CSL_PSC_INT_DISABLE,
  CSL_PSC_INT_DISABLE, CSL_PSC_INT_DISABLE,
  CSL_PSC_INT_DISABLE, CSL_PSC_INT_DISABLE,
  CSL_PSC_INT_DISABLE, CSL_PSC_INT_DISABLE,
  CSL_PSC_INT_DISABLE, CSL_PSC_INT_DISABLE,
  CSL_PSC_INT_DISABLE, CSL_PSC_INT_DISABLE,  
  CSL_PSC_INT_DISABLE, CSL_PSC_INT_DISABLE,
  CSL_PSC_INT_DISABLE, CSL_PSC_INT_DISABLE,
  CSL_PSC_INT_DISABLE, CSL_PSC_INT_DISABLE,
  CSL_PSC_INT_DISABLE, CSL_PSC_INT_DISABLE,
  CSL_PSC_INT_DISABLE, CSL_PSC_INT_DISABLE,
  CSL_PSC_INT_DISABLE, CSL_PSC_INT_DISABLE,
  CSL_PSC_INT_DISABLE, CSL_PSC_INT_DISABLE,
  CSL_PSC_INT_DISABLE, CSL_PSC_INT_DISABLE,
  CSL_PSC_INT_DISABLE, CSL_PSC_INT_DISABLE,
  CSL_PSC_INT_DISABLE, CSL_PSC_INT_DISABLE,
  CSL_PSC_INT_DISABLE, CSL_PSC_INT_DISABLE,
  CSL_PSC_INT_DISABLE, CSL_PSC_INT_DISABLE,
  CSL_PSC_INT_DISABLE, CSL_PSC_INT_DISABLE,
  CSL_PSC_INT_DISABLE, CSL_PSC_INT_DISABLE,
  CSL_PSC_INT_DISABLE, CSL_PSC_INT_DISABLE,
  CSL_PSC_INT_DISABLE, CSL_PSC_INT_DISABLE,
  CSL_PSC_INT_DISABLE, CSL_PSC_INT_DISABLE,
  CSL_PSC_INT_DISABLE, CSL_PSC_INT_DISABLE,
  CSL_PSC_INT_DISABLE, CSL_PSC_INT_DISABLE,
  CSL_PSC_INT_DISABLE, CSL_PSC_INT_DISABLE,    
  CSL_PSC_INT_DISABLE, CSL_PSC_INT_DISABLE,      
};

static CSL_PscMdState  mdStateRecordDefault[CSL_PSC_NUM_MD];

static CSL_PscMdCfg             csl_pscMdCfgDefault = {
  csl_pscMdIdDefault, 
  CSL_PSC_NUM_MD,
  csl_pscMdStateDefault,
  csl_pscMdIntEnableDefault,
  mdStateRecordDefault

};


static CSL_PscHwSetup             csl_pscHwSetupDefault = {
  csl_pscPdIdDefault, 
  CSL_PSC_NUM_PD,
  csl_pscPdStateDefault,
  csl_pscPdIntEnableDefault,
  pdStateRecordDefault,
  csl_pscMdIdDefault, 
  CSL_PSC_NUM_MD,
  csl_pscMdStateDefault,
  csl_pscMdIntEnableDefault,
  mdStateRecordDefault,  
  NULL
};



#ifdef __cplusplus
}
#endif
	
#endif /*_CSL_PSC_DEFAULTS_H_*/