📄 csl_emifaux.h
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nandFlashEcc4->p1024e = CSL_FEXT (hEmif->regs->NANDF4ECC,
EMIF_NANDF4ECC_P1024E);
nandFlashEcc4->p512e = CSL_FEXT (hEmif->regs->NANDF4ECC,
EMIF_NANDF4ECC_P512E);
nandFlashEcc4->p256e = CSL_FEXT (hEmif->regs->NANDF4ECC,
EMIF_NANDF4ECC_P256E);
nandFlashEcc4->p256e = CSL_FEXT (hEmif->regs->NANDF4ECC,
EMIF_NANDF4ECC_P256E);
nandFlashEcc4->p64e = CSL_FEXT (hEmif->regs->NANDF4ECC,EMIF_NANDF4ECC_P64E);
nandFlashEcc4->p32e = CSL_FEXT (hEmif->regs->NANDF4ECC,EMIF_NANDF4ECC_P32E);
nandFlashEcc4->p16e = CSL_FEXT (hEmif->regs->NANDF4ECC,EMIF_NANDF4ECC_P16E);
nandFlashEcc4->p8e = CSL_FEXT (hEmif->regs->NANDF4ECC,EMIF_NANDF4ECC_P8E);
nandFlashEcc4->p4e = CSL_FEXT (hEmif->regs->NANDF4ECC,EMIF_NANDF4ECC_P4E);
nandFlashEcc4->p2e = CSL_FEXT (hEmif->regs->NANDF4ECC,EMIF_NANDF4ECC_P2E);
nandFlashEcc4->p1e = CSL_FEXT (hEmif->regs->NANDF4ECC,EMIF_NANDF4ECC_P1E);
}
/**
* Control command functions external memory interface
*/
/** ============================================================================
* @n@b CSL_emifDdrRefThresh
*
* @b Description
* This API sets the DDR ref threshold value according to the arg passed
*
* @b Arguments
* @verbatim
hEmif Handle to the external memory interface instance
@endverbatim
*
* <b> Return Value </b>
* None
*
* <b> Pre Condition </b>
* @n None
*
* <b> Post Condition </b>
* @n EMIF ref threshold value will be set to the arguement passed
*
* @b Modifies
* @n Compact camera Port busclken register
*
* @b Example
* @verbatim
CSL_EmifHandle hEmif;
void *arg;
(int) *arg = 0x1;
...
CSL_emifDdrRefThresh (hEmif, arg);
...
@endverbatim
* ===========================================================================
*/
CSL_IDEF_INLINE
void CSL_emifDdrRefThresh (
CSL_EmifHandle hEmif,
Uint16 refThresh
)
{
CSL_FINS (hEmif->regs->SDRCR,EMIF_SDRCR_DDRRT, refThresh);
}
/** ============================================================================
* @n@b CSL_emifRefRate
*
* @b Description
* This API sets the refresh rate value with the valu of arg passed as
* parameter
*
* @b Arguments
* @verbatim
hEmif Handle to the external memory interface instance
@endverbatim
*
* <b> Return Value </b>
* None
*
* <b> Pre Condition </b>
* @n None
*
* <b> Post Condition </b>
* @n EMIF refresh rate will be set with the arguement passed
*
* @b Modifies
* @n external memory interface SDRAM control register
*
* @b Example
* @verbatim
CSL_EmifHandle hEmif;
void *arg;
(int) *arg = 0x00010;
...
CSL_emifRefRate (hEmif, arg);
...
@endverbatim
* ===========================================================================
*/
CSL_IDEF_INLINE
void CSL_emifRefRate (
CSL_EmifHandle hEmif,
Uint16 refRate
)
{
CSL_FINS (hEmif->regs->SDRCR,EMIF_SDRCR_RR, refRate);
}
/** ============================================================================
* @n@b CSL_emifDdrTapv
*
* @b Description
* This API sets the DDR PHY Control TAP value of arg passed as
* parameter
*
* @b Arguments
* @verbatim
hEmif Handle to the external memory interface instance
@endverbatim
*
* <b> Return Value </b>
* None
*
* <b> Pre Condition </b>
* @n None
*
* <b> Post Condition </b>
* @n This API sets the DDR PHY Control TAP value of arg passed as
* parameter
*
* @b Modifies
* @n external memory interface SDRAM control register
*
* @b Example
* @verbatim
CSL_EmifHandle hEmif;
void *arg;
...
CSL_emifDdrTapv (hEmif, arg);
...
@endverbatim
* ===========================================================================
*/
CSL_IDEF_INLINE
void CSL_emifDdrTapv (
CSL_EmifHandle hEmif,
Uint16 ddrtapv
)
{
CSL_FINS (hEmif->regs->DDRPHYCR, EMIF_DDRPHYCR_TAPV_EN, TRUE);
CSL_FINS (hEmif->regs->DDRPHYCR, EMIF_DDRPHYCR_TAPV, ddrtapv);
}
/** ============================================================================
* @n@b CSL_emifDdrTraIn
*
* @b Description
* This API sets the RTM PHY training time of arg passed as
* parameter
*
* @b Arguments
* @verbatim
hEmif Handle to the external memory interface instance
@endverbatim
*
* <b> Return Value </b>
* None
*
* <b> Pre Condition </b>
* @n None
*
* <b> Post Condition </b>
* @n This API sets the RTM PHY training time of arg passed as
* parameter
* @b Modifies
* @n external memory interface SDRAM control register
*
* @b Example
* @verbatim
CSL_EmifHandle hEmif;
void *arg;
(int) *arg = 0x00010;
...
CSL_emifDdrTraIn (hEmif, arg);
...
@endverbatim
* ===========================================================================
*/
CSL_IDEF_INLINE
void CSL_emifDdrTraIn (
CSL_EmifHandle hEmif,
Uint16 ddrTraIn
)
{
CSL_FINS (hEmif->regs->DDRPHYCR, EMIF_DDRPHYCR_TRAIN, ddrTraIn);
}
/** ============================================================================
* @n@b CSL_emifLtEnable
*
* @b Description
* This API enables the line trace of external memory interface instance
*
* @b Arguments
* @verbatim
hEmif Handle to the external memory interface instance
@endverbatim
*
* <b> Return Value </b>
* None
*
* <b> Pre Condition </b>
* @n None
*
* <b> Post Condition </b>
* @n EMIF line trace will be enabled
*
* @b Modifies
* @n external memory interface interrupt masked register
*
* @b Example
* @verbatim
CSL_EmifHandle hEmif;
...
CSL_emifLtEnabel (hEmif);
...
@endverbatim
* ===========================================================================
*/
CSL_IDEF_INLINE
void CSL_emifLtEnable (
CSL_EmifHandle hEmif
)
{
CSL_FINS (hEmif->regs->EIMSR, EMIF_EIMSR_LTMSET,TRUE);
}
/** ============================================================================
* @n@b CSL_emifLtDisable
*
* @b Description
* This API disables the line trace of external memory interface instance
*
* @b Arguments
* @verbatim
hEmif Handle to the external memory interface instance
@endverbatim
*
* <b> Return Value </b>
* None
*
* <b> Pre Condition </b>
* @n None
*
* <b> Post Condition </b>
* @n EMIF line trace will be enabled
*
* @b Modifies
* @n external memory interface interrupt masked register
*
* @b Example
* @verbatim
CSL_EmifHandle hEmif;
...
CSL_emifLtDisable (hEmif);
...
@endverbatim
* ===========================================================================
*/
CSL_IDEF_INLINE
void CSL_emifLtDisable (
CSL_EmifHandle hEmif
)
{
CSL_FINS (hEmif->regs->EIMCR, EMIF_EIMCR_LTMCLR,TRUE);
}
/** ============================================================================
* @n@b CSL_emifAtEnable
*
* @b Description
* This API enables the asynchronous timeout of external memory interface
* instance
*
*
* @b Arguments
* @verbatim
hEmif Handle to the external memory interface instance
@endverbatim
*
* <b> Return Value </b>
* None
*
* <b> Pre Condition </b>
* @n None
*
* <b> Post Condition </b>
* @n EMIF asynchronous timeout will be enabled
*
* @b Modifies
* @n external memory interface interrupt masked register
*
* @b Example
* @verbatim
CSL_EmifHandle hEmif;
...
CSL_emifAtEnable (hEmif);
...
@endverbatim
* ===========================================================================
*/
CSL_IDEF_INLINE
void CSL_emifAtEnable (
CSL_EmifHandle hEmif
)
{
CSL_FINS (hEmif->regs->EIMSR, EMIF_EIMSR_ATMSET,TRUE);
}
/** ============================================================================
* @n@b CSL_emifAtDisable
*
* @b Description
* This API disables the asynchronous timeout of external memory interface
* instance
*
*
* @b Arguments
* @verbatim
hEmif Handle to the external memory interface instance
@endverbatim
*
* <b> Return Value </b>
* None
*
* <b> Pre Condition </b>
* @n None
*
* <b> Post Condition </b>
* @n EMIF asynchronous timeout will be enabled
*
* @b Modifies
* @n external memory interface interrupt masked register
*
* @b Example
* @verbatim
CSL_EmifHandle hEmif;
...
CSL_emifAtEnable (hEmif);
...
@endverbatim
* ===========================================================================
*/
CSL_IDEF_INLINE
void CSL_emifAtDisable (
CSL_EmifHandle hEmif
)
{
CSL_FINS (hEmif->regs->EIMCR, EMIF_EIMCR_ATMCLR,TRUE);
}
/** ============================================================================
* @n@b CSL_emifIoCtrl
*
* @b Description
* This API sets the io control value of external memory interface instance
*
* @b Arguments
* @verbatim
hEmif Handle to the external memory interface instance
arg the io control information to be set
@endverbatim
*
* <b> Return Value </b>
* None
*
* <b> Pre Condition </b>
* @n None
*
* <b> Post Condition </b>
* @n EMIF io control register value will be set
*
* @b Modifies
* @n external memory interface io control register
*
* @b Example
* @verbatim
CSL_EmifHandle hEmif;
void *arg;
*(int *)arg = 0x0000;
...
CSL_emifIoCtrl (hEmif, arg);
...
@endverbatim
* ===========================================================================
*/
CSL_IDEF_INLINE
void CSL_emifIoCtrl (
CSL_EmifHandle hEmif,
Uint16 ioCtrl
)
{
CSL_FINS (hEmif->regs->IOCTRLR, EMIF_IOCTRLR_IOCTRL, ioCtrl);
}
/** ===========================================================================
* @n@b CSL_emifCS5EccStart
*
* @b Description
* This API strarts the Nand flash ECC for chip chip select5 of external
* memory interface instance
*
* @b Arguments
* @verbatim
hEmif Handle to the external memory interface instance
@endverbatim
*
* <b> Return Value </b>
* None
*
* <b> Pre Condition </b>
* @n None
*
* <b> Post Condition </b>
* @n EMIF CS5 ECC will be started
*
* @b Modifies
* @n external memory interface nand flash control register
*
* @b Example
* @verbatim
CSL_EmifHandle hEmif;
...
CSL_emifCS5EccStart (hEmif);
...
@endverbatim
* ============================================================================
*/
CSL_IDEF_INLINE
void CSL_emifCS5EccStart (
CSL_EmifHandle hEmif
)
{
CSL_FINS (hEmif->regs->NANDFCR, EMIF_NANDFCR_CS5ECC, TRUE);
}
/** ============================================================================
* @n@b CSL_emifCS4ECCStart
*
* @b Description
* This API strarts the Nand flash ECC for chip chip select4 of external
* memory interface instance
*
* @b Arguments
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