📄 cslr_spi.h

📁 TI达芬奇dm644x各硬件模块测试代码
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#define CSL_SPI_SPIPC4_CLKSET_HI         (0x00000001u)#define CSL_SPI_SPIPC4_ENASET_MASK       (0x00000100u)#define CSL_SPI_SPIPC4_ENASET_SHIFT      (0x00000008u)#define CSL_SPI_SPIPC4_ENASET_RESETVAL   (0x00000000u)/*----ENASET Tokens----*/#define CSL_SPI_SPIPC4_ENASET_LO         (0x00000000u)#define CSL_SPI_SPIPC4_ENASET_HI         (0x00000001u)#define CSL_SPI_SPIPC4_SCSSET7_MASK      (0x00000080u)#define CSL_SPI_SPIPC4_SCSSET7_SHIFT     (0x00000007u)#define CSL_SPI_SPIPC4_SCSSET7_RESETVAL  (0x00000000u)/*----SCSSET7 Tokens----*/#define CSL_SPI_SPIPC4_SCSSET7_LO        (0x00000000u)#define CSL_SPI_SPIPC4_SCSSET7_HI        (0x00000001u)#define CSL_SPI_SPIPC4_SCSSET6_MASK      (0x00000040u)#define CSL_SPI_SPIPC4_SCSSET6_SHIFT     (0x00000006u)#define CSL_SPI_SPIPC4_SCSSET6_RESETVAL  (0x00000000u)/*----SCSSET6 Tokens----*/#define CSL_SPI_SPIPC4_SCSSET6_LO        (0x00000000u)#define CSL_SPI_SPIPC4_SCSSET6_HI        (0x00000001u)#define CSL_SPI_SPIPC4_SCSSET5_MASK      (0x00000020u)#define CSL_SPI_SPIPC4_SCSSET5_SHIFT     (0x00000005u)#define CSL_SPI_SPIPC4_SCSSET5_RESETVAL  (0x00000000u)/*----SCSSET5 Tokens----*/#define CSL_SPI_SPIPC4_SCSSET5_LO        (0x00000000u)#define CSL_SPI_SPIPC4_SCSSET5_HI        (0x00000001u)#define CSL_SPI_SPIPC4_SCSSET4_MASK      (0x00000010u)#define CSL_SPI_SPIPC4_SCSSET4_SHIFT     (0x00000004u)#define CSL_SPI_SPIPC4_SCSSET4_RESETVAL  (0x00000000u)/*----SCSSET4 Tokens----*/#define CSL_SPI_SPIPC4_SCSSET4_LO        (0x00000000u)#define CSL_SPI_SPIPC4_SCSSET4_HI        (0x00000001u)#define CSL_SPI_SPIPC4_SCSSET3_MASK      (0x00000008u)#define CSL_SPI_SPIPC4_SCSSET3_SHIFT     (0x00000003u)#define CSL_SPI_SPIPC4_SCSSET3_RESETVAL  (0x00000000u)/*----SCSSET3 Tokens----*/#define CSL_SPI_SPIPC4_SCSSET3_LO        (0x00000000u)#define CSL_SPI_SPIPC4_SCSSET3_HI        (0x00000001u)#define CSL_SPI_SPIPC4_SCSSET2_MASK      (0x00000004u)#define CSL_SPI_SPIPC4_SCSSET2_SHIFT     (0x00000002u)#define CSL_SPI_SPIPC4_SCSSET2_RESETVAL  (0x00000000u)/*----SCSSET2 Tokens----*/#define CSL_SPI_SPIPC4_SCSSET2_LO        (0x00000000u)#define CSL_SPI_SPIPC4_SCSSET2_HI        (0x00000001u)#define CSL_SPI_SPIPC4_SCSSET1_MASK      (0x00000002u)#define CSL_SPI_SPIPC4_SCSSET1_SHIFT     (0x00000001u)#define CSL_SPI_SPIPC4_SCSSET1_RESETVAL  (0x00000000u)/*----SCSSET1 Tokens----*/#define CSL_SPI_SPIPC4_SCSSET1_LO        (0x00000000u)#define CSL_SPI_SPIPC4_SCSSET1_HI        (0x00000001u)#define CSL_SPI_SPIPC4_SCSSET0_MASK      (0x00000001u)#define CSL_SPI_SPIPC4_SCSSET0_SHIFT     (0x00000000u)#define CSL_SPI_SPIPC4_SCSSET0_RESETVAL  (0x00000000u)/*----SCSSET0 Tokens----*/#define CSL_SPI_SPIPC4_SCSSET0_LO        (0x00000000u)#define CSL_SPI_SPIPC4_SCSSET0_HI        (0x00000001u)#define CSL_SPI_SPIPC4_RESETVAL          (0x00000000u)/* SPIPC5 */#define CSL_SPI_SPIPC5_SOMICLR_MASK      (0x00000800u)#define CSL_SPI_SPIPC5_SOMICLR_SHIFT     (0x0000000Bu)#define CSL_SPI_SPIPC5_SOMICLR_RESETVAL  (0x00000000u)/*----SOMICLR Tokens----*/#define CSL_SPI_SPIPC5_SOMICLR_LO        (0x00000000u)#define CSL_SPI_SPIPC5_SOMICLR_HI        (0x00000001u)#define CSL_SPI_SPIPC5_SIMOCLR_MASK      (0x00000400u)#define CSL_SPI_SPIPC5_SIMOCLR_SHIFT     (0x0000000Au)#define CSL_SPI_SPIPC5_SIMOCLR_RESETVAL  (0x00000000u)/*----SIMOCLR Tokens----*/#define CSL_SPI_SPIPC5_SIMOCLR_LO        (0x00000000u)#define CSL_SPI_SPIPC5_SIMOCLR_HI        (0x00000001u)#define CSL_SPI_SPIPC5_CLKCLR_MASK       (0x00000200u)#define CSL_SPI_SPIPC5_CLKCLR_SHIFT      (0x00000009u)#define CSL_SPI_SPIPC5_CLKCLR_RESETVAL   (0x00000000u)/*----CLKCLR Tokens----*/#define CSL_SPI_SPIPC5_CLKCLR_LO         (0x00000000u)#define CSL_SPI_SPIPC5_CLKCLR_HI         (0x00000001u)#define CSL_SPI_SPIPC5_ENACLR_MASK       (0x00000100u)#define CSL_SPI_SPIPC5_ENACLR_SHIFT      (0x00000008u)#define CSL_SPI_SPIPC5_ENACLR_RESETVAL   (0x00000000u)/*----ENACLR Tokens----*/#define CSL_SPI_SPIPC5_ENACLR_LO         (0x00000000u)#define CSL_SPI_SPIPC5_ENACLR_HI         (0x00000001u)#define CSL_SPI_SPIPC5_SCSCLR7_MASK      (0x00000080u)#define CSL_SPI_SPIPC5_SCSCLR7_SHIFT     (0x00000007u)#define CSL_SPI_SPIPC5_SCSCLR7_RESETVAL  (0x00000000u)/*----SCSCLR7 Tokens----*/#define CSL_SPI_SPIPC5_SCSCLR7_LO        (0x00000000u)#define CSL_SPI_SPIPC5_SCSCLR7_HI        (0x00000001u)#define CSL_SPI_SPIPC5_SCSCLR6_MASK      (0x00000040u)#define CSL_SPI_SPIPC5_SCSCLR6_SHIFT     (0x00000006u)#define CSL_SPI_SPIPC5_SCSCLR6_RESETVAL  (0x00000000u)/*----SCSCLR6 Tokens----*/#define CSL_SPI_SPIPC5_SCSCLR6_LO        (0x00000000u)#define CSL_SPI_SPIPC5_SCSCLR6_HI        (0x00000001u)#define CSL_SPI_SPIPC5_SCSCLR5_MASK      (0x00000020u)#define CSL_SPI_SPIPC5_SCSCLR5_SHIFT     (0x00000005u)#define CSL_SPI_SPIPC5_SCSCLR5_RESETVAL  (0x00000000u)/*----SCSCLR5 Tokens----*/#define CSL_SPI_SPIPC5_SCSCLR5_LO        (0x00000000u)#define CSL_SPI_SPIPC5_SCSCLR5_HI        (0x00000001u)#define CSL_SPI_SPIPC5_SCSCLR4_MASK      (0x00000010u)#define CSL_SPI_SPIPC5_SCSCLR4_SHIFT     (0x00000004u)#define CSL_SPI_SPIPC5_SCSCLR4_RESETVAL  (0x00000000u)/*----SCSCLR4 Tokens----*/#define CSL_SPI_SPIPC5_SCSCLR4_LO        (0x00000000u)#define CSL_SPI_SPIPC5_SCSCLR4_HI        (0x00000001u)#define CSL_SPI_SPIPC5_SCSCLR3_MASK      (0x00000008u)#define CSL_SPI_SPIPC5_SCSCLR3_SHIFT     (0x00000003u)#define CSL_SPI_SPIPC5_SCSCLR3_RESETVAL  (0x00000000u)/*----SCSCLR3 Tokens----*/#define CSL_SPI_SPIPC5_SCSCLR3_LO        (0x00000000u)#define CSL_SPI_SPIPC5_SCSCLR3_HI        (0x00000001u)#define CSL_SPI_SPIPC5_SCSCLR2_MASK      (0x00000004u)#define CSL_SPI_SPIPC5_SCSCLR2_SHIFT     (0x00000002u)#define CSL_SPI_SPIPC5_SCSCLR2_RESETVAL  (0x00000000u)/*----SCSCLR2 Tokens----*/#define CSL_SPI_SPIPC5_SCSCLR2_LO        (0x00000000u)#define CSL_SPI_SPIPC5_SCSCLR2_HI        (0x00000001u)#define CSL_SPI_SPIPC5_SCSCLR1_MASK      (0x00000002u)#define CSL_SPI_SPIPC5_SCSCLR1_SHIFT     (0x00000001u)#define CSL_SPI_SPIPC5_SCSCLR1_RESETVAL  (0x00000000u)/*----SCSCLR1 Tokens----*/#define CSL_SPI_SPIPC5_SCSCLR1_LO        (0x00000000u)#define CSL_SPI_SPIPC5_SCSCLR1_HI        (0x00000001u)#define CSL_SPI_SPIPC5_SCSCLR0_MASK      (0x00000001u)#define CSL_SPI_SPIPC5_SCSCLR0_SHIFT     (0x00000000u)#define CSL_SPI_SPIPC5_SCSCLR0_RESETVAL  (0x00000000u)/*----SCSCLR0 Tokens----*/#define CSL_SPI_SPIPC5_SCSCLR0_LO        (0x00000000u)#define CSL_SPI_SPIPC5_SCSCLR0_HI        (0x00000001u)#define CSL_SPI_SPIPC5_RESETVAL          (0x00000000u)/* SPIPC6 */#define CSL_SPI_SPIPC6_SOMIPDR_MASK      (0x00000800u)#define CSL_SPI_SPIPC6_SOMIPDR_SHIFT     (0x0000000Bu)#define CSL_SPI_SPIPC6_SOMIPDR_RESETVAL  (0x00000000u)/*----SOMIPDR Tokens----*/#define CSL_SPI_SPIPC6_SOMIPDR_LOGIC1    (0x00000000u)#define CSL_SPI_SPIPC6_SOMIPDR_TRISTATE  (0x00000001u)#define CSL_SPI_SPIPC6_SIMOPDR_MASK      (0x00000400u)#define CSL_SPI_SPIPC6_SIMOPDR_SHIFT     (0x0000000Au)#define CSL_SPI_SPIPC6_SIMOPDR_RESETVAL  (0x00000000u)/*----SIMOPDR Tokens----*/#define CSL_SPI_SPIPC6_SIMOPDR_LOGIC1    (0x00000000u)#define CSL_SPI_SPIPC6_SIMOPDR_TRISTATE  (0x00000001u)#define CSL_SPI_SPIPC6_CLKPDR_MASK       (0x00000200u)#define CSL_SPI_SPIPC6_CLKPDR_SHIFT      (0x00000009u)#define CSL_SPI_SPIPC6_CLKPDR_RESETVAL   (0x00000000u)/*----CLKPDR Tokens----*/#define CSL_SPI_SPIPC6_CLKPDR_LOGIC1     (0x00000000u)#define CSL_SPI_SPIPC6_CLKPDR_TRISTATE   (0x00000001u)#define CSL_SPI_SPIPC6_ENAPDR_MASK       (0x00000100u)#define CSL_SPI_SPIPC6_ENAPDR_SHIFT      (0x00000008u)#define CSL_SPI_SPIPC6_ENAPDR_RESETVAL   (0x00000000u)/*----ENAPDR Tokens----*/#define CSL_SPI_SPIPC6_ENAPDR_LOGIC1     (0x00000000u)#define CSL_SPI_SPIPC6_ENAPDR_TRISTATE   (0x00000001u)#define CSL_SPI_SPIPC6_SCSPDR7_MASK      (0x00000080u)#define CSL_SPI_SPIPC6_SCSPDR7_SHIFT     (0x00000007u)#define CSL_SPI_SPIPC6_SCSPDR7_RESETVAL  (0x00000000u)/*----SCSPDR7 Tokens----*/#define CSL_SPI_SPIPC6_SCSPDR7_LOGIC1    (0x00000000u)#define CSL_SPI_SPIPC6_SCSPDR7_TRISTATE  (0x00000001u)#define CSL_SPI_SPIPC6_SCSPDR6_MASK      (0x00000040u)#define CSL_SPI_SPIPC6_SCSPDR6_SHIFT     (0x00000006u)#define CSL_SPI_SPIPC6_SCSPDR6_RESETVAL  (0x00000000u)/*----SCSPDR6 Tokens----*/#define CSL_SPI_SPIPC6_SCSPDR6_LOGIC1    (0x00000000u)#define CSL_SPI_SPIPC6_SCSPDR6_TRISTATE  (0x00000001u)#define CSL_SPI_SPIPC6_SCSPDR5_MASK      (0x00000020u)#define CSL_SPI_SPIPC6_SCSPDR5_SHIFT     (0x00000005u)#define CSL_SPI_SPIPC6_SCSPDR5_RESETVAL  (0x00000000u)/*----SCSPDR5 Tokens----*/#define CSL_SPI_SPIPC6_SCSPDR5_LOGIC1    (0x00000000u)#define CSL_SPI_SPIPC6_SCSPDR5_TRISTATE  (0x00000001u)#define CSL_SPI_SPIPC6_SCSPDR4_MASK      (0x00000010u)#define CSL_SPI_SPIPC6_SCSPDR4_SHIFT     (0x00000004u)#define CSL_SPI_SPIPC6_SCSPDR4_RESETVAL  (0x00000000u)/*----SCSPDR4 Tokens----*/#define CSL_SPI_SPIPC6_SCSPDR4_LOGIC1    (0x00000000u)#define CSL_SPI_SPIPC6_SCSPDR4_TRISTATE  (0x00000001u)#define CSL_SPI_SPIPC6_SCSPDR3_MASK      (0x00000008u)#define CSL_SPI_SPIPC6_SCSPDR3_SHIFT     (0x00000003u)#define CSL_SPI_SPIPC6_SCSPDR3_RESETVAL  (0x00000000u)/*----SCSPDR3 Tokens----*/#define CSL_SPI_SPIPC6_SCSPDR3_LOGIC1    (0x00000000u)#define CSL_SPI_SPIPC6_SCSPDR3_TRISTATE  (0x00000001u)#define CSL_SPI_SPIPC6_SCSPDR2_MASK      (0x00000004u)#define CSL_SPI_SPIPC6_SCSPDR2_SHIFT     (0x00000002u)#define CSL_SPI_SPIPC6_SCSPDR2_RESETVAL  (0x00000000u)/*----SCSPDR2 Tokens----*/#define CSL_SPI_SPIPC6_SCSPDR2_LOGIC1    (0x00000000u)#define CSL_SPI_SPIPC6_SCSPDR2_TRISTATE  (0x00000001u)#define CSL_SPI_SPIPC6_SCSPDR1_MASK      (0x00000002u)#define CSL_SPI_SPIPC6_SCSPDR1_SHIFT     (0x00000001u)#define CSL_SPI_SPIPC6_SCSPDR1_RESETVAL  (0x00000000u)/*----SCSPDR1 Tokens----*/#define CSL_SPI_SPIPC6_SCSPDR1_LOGIC1    (0x00000000u)#define CSL_SPI_SPIPC6_SCSPDR1_TRISTATE  (0x00000001u)#define CSL_SPI_SPIPC6_SCSPDR0_MASK      (0x00000001u)#define CSL_SPI_SPIPC6_SCSPDR0_SHIFT     (0x00000000u)#define CSL_SPI_SPIPC6_SCSPDR0_RESETVAL  (0x00000000u)/*----SCSPDR0 Tokens----*/#define CSL_SPI_SPIPC6_SCSPDR0_LOGIC1    (0x00000000u)#define CSL_SPI_SPIPC6_SCSPDR0_TRISTATE  (0x00000001u)#define CSL_SPI_SPIPC6_RESETVAL          (0x00000000u)/* SPIPC7 */#define CSL_SPI_SPIPC7_SOMIIPE_MASK      (0x00000800u)#define CSL_SPI_SPIPC7_SOMIIPE_SHIFT     (0x0000000Bu)#define CSL_SPI_SPIPC7_SOMIIPE_RESETVAL  (0x00000000u)/*----SOMIIPE Tokens----*/#define CSL_SPI_SPIPC7_SOMIIPE_ENABLE    (0x00000000u)#define CSL_SPI_SPIPC7_SOMIIPE_DISABLE   (0x00000001u)#define CSL_SPI_SPIPC7_SIMOIPE_MASK      (0x00000400u)#define CSL_SPI_SPIPC7_SIMOIPE_SHIFT     (0x0000000Au)#define CSL_SPI_SPIPC7_SIMOIPE_RESETVAL  (0x00000000u)/*----SIMOIPE Tokens----*/#define CSL_SPI_SPIPC7_SIMOIPE_ENABLE    (0x00000000u)#define CSL_SPI_SPIPC7_SIMOIPE_DISABLE   (0x00000001u)#define CSL_SPI_SPIPC7_CLKIPE_MASK       (0x00000200u)#define CSL_SPI_SPIPC7_CLKIPE_SHIFT      (0x00000009u)#define CSL_SPI_SPIPC7_CLKIPE_RESETVAL   (0x00000000u)/*----CLKIPE Tokens----*/#define CSL_SPI_SPIPC7_CLKIPE_ENABLE     (0x00000000u)#define CSL_SPI_SPIPC7_CLKIPE_DISABLE    (0x00000001u)#define CSL_SPI_SPIPC7_ENAIPE_MASK       (0x00000100u)#define CSL_SPI_SPIPC7_ENAIPE_SHIFT      (0x00000008u)#define CSL_SPI_SPIPC7_ENAIPE_RESETVAL   (0x00000000u)/*----ENAIPE Tokens----*/#define CSL_SPI_SPIPC7_ENAIPE_ENABLE     (0x00000000u)#define CSL_SPI_SPIPC7_ENAIPE_DISABLE    (0x00000001u)#define CSL_SPI_SPIPC7_SCSIPE7_MASK      (0x00000080u)#define CSL_SPI_SPIPC7_SCSIPE7_SHIFT     (0x00000007u)#define CSL_SPI_SPIPC7_SCSIPE7_RESETVAL  (0x00000000u)/*----SCSIPE7 Tokens----*/#define CSL_SPI_SPIPC7_SCSIPE7_ENABLE    (0x00000000u)#define CSL_SPI_SPIPC7_SCSIPE7_DISABLE   (0x00000001u)#define CSL_SPI_SPIPC7_SCSIPE6_MASK      (0x00000040u)#define CSL_SPI_SPIPC7_SCSIPE6_SHIFT     (0x00000006u)#define CSL_SPI_SPIPC7_SCSIPE6_RESETVAL  (0x00000000u)/*----SCSIPE6 Tokens----*/#define CSL_SPI_SPIPC7_SCSIPE6_ENABLE    (0x00000000u)#define CSL_SPI_SPIPC7_SCSIPE6_DISABLE   (0x00000001u)#define CSL_SPI_SPIPC7_SCSIPE5_MASK      (0x00000020u)#define CSL_SPI_SPIPC7_SCSIPE5_SHIFT     (0x00000005u)#define CSL_SPI_SPIPC7_SCSIPE5_RESETVAL  (0x00000000u)/*----SCSIPE5 Tokens----*/#define CSL_SPI_SPIPC7_SCSIPE5_ENABLE    (0x00000000u)#define CSL_SPI_SPIPC7_SCSIPE5_DISABLE   (0x00000001u)#define CSL_SPI_SPIPC7_SCSIPE4_MASK      (0x00000010u)#define CSL_SPI_SPIPC7_SCSIPE4_SHIFT     (0x00000004u)#define CSL_SPI_SPIPC7_SCSIPE4_RESETVAL  (0x00000000u)/*----SCSIPE4 Tokens----*/#define CSL_SPI_SPIPC7_SCSIPE4_ENABLE    (0x00000000u)#define CSL_SPI_SPIPC7_SCSIPE4_DISABLE   (0x00000001u)#define CSL_SPI_SPIPC7_SCSIPE3_MASK      (0x00000008u)#define CSL_SPI_SPIPC7_SCSIPE3_SHIFT     (0x00000003u)#define CSL_SPI_SPIPC7_SCSIPE3_RESETVAL  (0x00000000u)/*----SCSIPE3 Tokens----*/#define CSL_SPI_SPIPC7_SCSIPE3_ENABLE    (0x00000000u)#define CSL_SPI_SPIPC7_SCSIPE3_DISABLE   (0x00000001u)#define CSL_SPI_SPIPC7_SCSIPE2_MASK      (0x00000004u)#define CSL_SPI_SPIPC7_SCSIPE2_SHIFT     (0x00000002u)#define CSL_SPI_SPIPC7_SCSIPE2_RESETVAL  (0x00000000u)/*----SCSIPE2 Tokens----*/#define CSL_SPI_SPIPC7_SCSIPE2_ENABLE    (0x00000000u)#define CSL_SPI_SPIPC7_SCSIPE2_DISABLE   (0x00000001u)#define CSL_SPI_SPIPC7_SCSIPE1_MASK      (0x00000002u)#define CSL_SPI_SPIPC7_SCSIPE1_SHIFT     (0x00000001u)
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