csl_uartaux.h

TI达芬奇dm644x各硬件模块测试代码

 *  @verbatim
       CSL_UartHandle     hUart;
       CSL_BitMask32      mask;           
       ...
       CSL_uartIntrEnable ( hUart, mask );
       ...
    @endverbatim
 * =============================================================================
 */
CSL_IDEF_INLINE
void CSL_uartIntrEnable (
    CSL_UartHandle      hUart,
    CSL_BitMask32       mask,
    Uint32              cmd
)
{
    CSL_UartRegsOvly uartRegs = hUart->regs;
    /* To access RBR, THR and IER registers */    
    CSL_FINSR(uartRegs->LCR, 7, 7, 0);            
    if (cmd == CSL_UART_CMD_INTR_ENABLE) {        
        uartRegs->IER = mask;     
    } 
    else {                                      
        uartRegs->IER &= ~(mask);
    }                                              
}


/** ============================================================================
 *  @n@b CSL_uartRatsHigh
 *
 *  @b Description
 *  @n Forces RTS output high of Universal asynchronous receive transmitter 
 *  @verbatim
       hUart                      Handle to the Universal asynchronous receiver 
                                  transmitter instance
 *  @endverbatim
 *
 *  <b> Return Value </b>  None
 *
 *  <b> Pre Condition </b>
 *  @n  None
 *
 *  <b> Post Condition </b>
 *   @n Forces RTS output high of Universal asynchronous receive transmitter  
 *      
 *  @b Modifies
 *  @n None
 *
 *  @b Example
 *  @verbatim
       CSL_UartHandle     hUart;
       ...
       CSL_uartRtsHigh (hUart);
       ...
    @endverbatim
 * =============================================================================
 */
CSL_IDEF_INLINE 
void CSL_uartRtsHigh (
    CSL_UartHandle      hUart
)
{    
    CSL_UartRegsOvly uartRegs = hUart->regs;
    CSL_FINS (uartRegs->MCR, UART_MCR_RTS, CSL_UART_MCR_RTS_HIGH);
}


/** ============================================================================
 *  @n@b CSL_uartRatsLow
 *
 *  @b Description
 *  @n Forces RTS output low of Universal asynchronous receive transmitter 
 *  @verbatim
       hUart                      Handle to the Universal asynchronous receiver 
                                  transmitter instance
 *  @endverbatim
 *
 *  <b> Return Value </b>  None
 *
 *  <b> Pre Condition </b>
 *  @n  None
 *
 *  <b> Post Condition </b>
 *   @n Forces RTS output low of Universal asynchronous receive transmitter  
 *      
 *  @b Modifies
 *  @n None
 *
 *  @b Example
 *  @verbatim
       CSL_UartHandle     hUart;
       ...
       CSL_uartRtslow (hUart);
       ...
    @endverbatim
 * =============================================================================
 */
CSL_IDEF_INLINE 
void CSL_uartRtsLow (
    CSL_UartHandle      hUart
)
{
    CSL_UartRegsOvly uartRegs = hUart->regs;
    CSL_FINS (uartRegs->MCR, UART_MCR_RTS, CSL_UART_MCR_RTS_LOW);
}


/** ============================================================================
 *  @n@b CSL_uartDtrHigh
 *
 *  @b Description
 *  @n Forces DTR output high of Universal asynchronous receive transmitter 
 *  @verbatim
       hUart                      Handle to the Universal asynchronous receiver 
                                  transmitter instance
 *  @endverbatim
 *
 *  <b> Return Value </b>  None
 *
 *  <b> Pre Condition </b>
 *  @n  None
 *
 *  <b> Post Condition </b>
 *   @n Forces DTR output high of Universal asynchronous receive transmitter 
 *      
 *  @b Modifies
 *  @n None
 *
 *  @b Example
 *  @verbatim
       CSL_UartHandle     hUart;
       ...
       CSL_uartDtrHigh (hUart);
       ...
    @endverbatim
 * =============================================================================
 */
CSL_IDEF_INLINE 
void CSL_uartDtrHigh (
    CSL_UartHandle      hUart
)
{
    CSL_UartRegsOvly uartRegs = hUart->regs;
    CSL_FINS (uartRegs->MCR, UART_MCR_DTR, CSL_UART_MCR_DTR_HIGH);
}


/** ============================================================================
 *  @n@b CSL_uartDtrslow
 *
 *  @b Description
 *  @n Forces DTR output lowof Universal asynchronous receive transmitter 
 *  @verbatim
       hUart                      Handle to the Universal asynchronous receiver 
                                  transmitter instance
 *  @endverbatim
 *
 *  <b> Return Value </b>  None
 *
 *  <b> Pre Condition </b>
 *  @n  None
 *
 *  <b> Post Condition </b>
 *   @n Forces DTR output low of Universal asynchronous receive transmitter 
 *      
 *  @b Modifies
 *  @n None
 *
 *  @b Example
 *  @verbatim
       CSL_UartHandle     hUart;
       ...
       CSL_uartDtrlow (hUart);
       ...
    @endverbatim
 * =============================================================================
 */
CSL_IDEF_INLINE 
void CSL_uartDtrLow (
    CSL_UartHandle      hUart
)
{
    CSL_UartRegsOvly uartRegs = hUart->regs;
    CSL_FINS (uartRegs->MCR, UART_MCR_DTR, CSL_UART_MCR_DTR_LOW);
}


/** ============================================================================
 *  @n@b CSL_uartOut1High
 *
 *  @b Description
 *  @n Forces OUT1 output high of Universal asynchronous receive transmitter 
 *  @verbatim
       hUart                      Handle to the Universal asynchronous receiver 
                                  transmitter instance
 *  @endverbatim
 *
 *  <b> Return Value </b>  None
 *
 *  <b> Pre Condition </b>
 *  @n  None
 *
 *  <b> Post Condition </b>
 *   @n Forces OUT1 output high of Universal asynchronous receive transmitter
 *      
 *  @b Modifies
 *  @n None
 *
 *  @b Example
 *  @verbatim
       CSL_UartHandle     hUart;
       ...
       CSL_uartOut1High (hUart);
       ...
    @endverbatim
 * =============================================================================
 */
CSL_IDEF_INLINE 
void CSL_uartOut1High (
    CSL_UartHandle      hUart
)
{
    CSL_UartRegsOvly uartRegs = hUart->regs;
    CSL_FINS (uartRegs->MCR, UART_MCR_OUT1, CSL_UART_MCR_OUT1_HIGH);
}


/** ============================================================================
 *  @n@b CSL_uartOut1Low
 *
 *  @b Description
 *  @n Forces OUT1 output low of Universal asynchronous receive transmitter 
 *  @verbatim
       hUart                      Handle to the Universal asynchronous receiver 
                                  transmitter instance
 *  @endverbatim
 *
 *  <b> Return Value </b>  None
 *
 *  <b> Pre Condition </b>
 *  @n  None
 *
 *  <b> Post Condition </b>
 *   @n Forces OUT1 output low of Universal asynchronous receive transmitter
 *      
 *  @b Modifies
 *  @n None
 *
 *  @b Example
 *  @verbatim
       CSL_UartHandle     hUart;
       ...
       CSL_uartOut1Low (hUart);
       ...
    @endverbatim
 * =============================================================================
 */
CSL_IDEF_INLINE 
void CSL_uartOut1Low (
    CSL_UartHandle      hUart
)
{
    CSL_UartRegsOvly uartRegs = hUart->regs;
    CSL_FINS (uartRegs->MCR, UART_MCR_OUT1, CSL_UART_MCR_OUT1_LOW);
}


/** ============================================================================
 *  @n@b CSL_uartOut2High
 *
 *  @b Description
 *  @n Forces OUT2 output high of Universal asynchronous receive transmitter 
 *  @verbatim
       hUart                      Handle to the Universal asynchronous receiver 
                                  transmitter instance
 *  @endverbatim
 *
 *  <b> Return Value </b>  None
 *
 *  <b> Pre Condition </b>
 *  @n  None
 *
 *  <b> Post Condition </b>
 *   @n Forces OUT2 output high of Universal asynchronous receive transmitter
 *      
 *  @b Modifies
 *  @n None
 *
 *  @b Example
 *  @verbatim
       CSL_UartHandle     hUart;
       ...
       CSL_uartOut2High (hUart);
       ...
    @endverbatim
 * =============================================================================
 */
CSL_IDEF_INLINE 
void CSL_uartOut2High (
    CSL_UartHandle      hUart
)
{
    CSL_UartRegsOvly uartRegs = hUart->regs;
    CSL_FINS (uartRegs->MCR, UART_MCR_OUT2, CSL_UART_MCR_OUT2_HIGH);
}


/** ============================================================================
 *  @n@b CSL_uartOut2Low
 *
 *  @b Description
 *  @n Forces OUT2 output low of Universal asynchronous receive transmitter 
 *  @verbatim
       hUart                      Handle to the Universal asynchronous receiver 
                                  transmitter instance
 *  @endverbatim
 *
 *  <b> Return Value </b>  None
 *
 *  <b> Pre Condition </b>
 *  @n  None
 *
 *  <b> Post Condition </b>
 *   @n Forces OUT2 output low of Universal asynchronous receive transmitter
 *      
 *  @b Modifies
 *  @n None
 *
 *  @b Example
 *  @verbatim
       CSL_UartHandle     hUart;
       ...
       CSL_uartOut2Low (hUart);
       ...
    @endverbatim
 * =============================================================================
 */
CSL_IDEF_INLINE 
void CSL_uartOut2Low (
    CSL_UartHandle     hUart
)
{
    CSL_UartRegsOvly uartRegs = hUart->regs;
    CSL_FINS (uartRegs->MCR, UART_MCR_OUT2, CSL_UART_MCR_OUT2_LOW);
}


/** ============================================================================
 *  @n@b CSL_uartFifoDisable
 *
 *  @b Description
 *  @n Disables FIFO mode of Universal asynchronous receive transmitter 
 *  @verbatim
       hUart                      Handle to the Universal asynchronous receiver 
                                  transmitter instance
 *  @endverbatim
 *
 *  <b> Return Value </b>  None
 *
 *  <b> Pre Condition </b>
 *  @n  None
 *
 *  <b> Post Condition </b>
 *   @n Disables FIFO mode of Universal asynchronous receive transmitter tter
 *      
 *  @b Modifies
 *  @n None
 *
 *  @b Example
 *  @verbatim
       CSL_UartHandle     hUart;
       ...
       CSL_uartFifoDisable (hUart);
       ...
    @endverbatim
 * =============================================================================
 */
CSL_IDEF_INLINE 
void CSL_uartFifoDisable (
    CSL_UartHandle      hUart
)
{
    CSL_UartRegsOvly uartRegs = hUart->regs;
    CSL_FINS (uartRegs->FCR, UART_FCR_FIFOEN, CSL_UART_FCR_FIFOEN_DISABLE);
}


/** ============================================================================
 *  @n@b CSL_uartFifoEnable
 *
 *  @b Description
 *  @n Enables FIFO mode of Universal asynchronous receive transmitter 
 *  @verbatim
       hUart                      Handle to the Universal asynchronous receiver 
                                  transmitter instance
 *  @endverbatim
 *
 *  <b> Return Value </b>  None
 *
 *  <b> Pre Condition </b>
 *  @n  None
 *
 *  <b> Post Condition </b>
 *   @n Enables FIFO mode of Universal asynchronous receive transmitter tter
 *      
 *  @b Modifies
 *  @n None
 *
 *  @b Example
 *  @verbatim
       CSL_UartHandle     hUart;
       ...
       CSL_uartFifoEnable (hUart);
       ...
    @endverbatim
 * =============================================================================
 */
CSL_IDEF_INLINE 
void CSL_uartFifoEnable (
    CSL_UartHandle      hUart
)
{
    CSL_UartRegsOvly uartRegs = hUart->regs;
    CSL_FINS (uartRegs->FCR, UART_FCR_FIFOEN, CSL_UART_FCR_FIFOEN_ENABLE);
}


/** ============================================================================
 *  @n@b CSL_uartConfigFifo
 *
 *  @b Description
 *  @n Configures FIFO, set triggerlevel and DMA mode of Universal asynchronous 
       receive transmitter 
 *  @verbatim
       hUart                      Handle to the Universal asynchronous receiver 
                                  transmitter instance
       fifoConfig                 fifo configuration information
 *  @endverbatim
 *
 *  <b> Return Value </b>  None
 *
 *  <b> Pre Condition </b>
 *  @n  None
 *
 *  <b> Post Condition </b>
 *   @n Configures FIFO, set triggerlevel and DMA mode of Universal asynchronous
        receive transmitter 
 *      
 *  @b Modifies
 *  @n None
 *
 *  @b Example
 *  @verbatim
       CSL_UartHandle     hUart;
       CSL_UartConfigFifo fifoConfig;
       ...
       CSL_uartConfigFifo ( hUart, fifoConfig );
       ...
    @endverbatim
 * =============================================================================
 */
CSL_IDEF_INLINE 
void CSL_uartConfigFifo (
    CSL_UartHandle      hUart,
    CSL_UartFifoConfig  fifoConfig    
)
{
    CSL_UartRegsOvly uartRegs = hUart->regs;
    CSL_FINS (uartRegs->FCR, UART_FCR_RXFIFTL, fifoConfig.trigLevel);
    CSL_FINS (uartRegs->FCR, UART_FCR_DMAMODE1, fifoConfig.dmaMode);
}


/** ============================================================================
 *  @n@b CSL_uartResetTxFifo
 *
 *  @b Description
 *  @n Reset TxFIFO counters of Universal asynchronous receive transmitter 
 *  @verbatim
       hUart                      Handle to the Universal asynchronous receiver 
                                  transmitter instance
 *  @endverbatim
 *
 *  <b> Return Value </b>  None
 *
 *  <b> Pre Condition </b>
 *  @n  None
 *
 *  <b> Post Condition </b>
 *   @n Reset TxFIFO counters of Universal asynchronous receive transmitter 
 *      
 *  @b Modifies
 *  @n None
 *
 *  @b Example
 *  @verbatim
       CSL_UartHandle     hUart;
       ...
       CSL_uartResetTxFifo (hUart);
       ...
    @endverbatim
 * =============================================================================
 */
CSL_IDEF_INLINE 
void CSL_uartResetTxFifo (
    CSL_UartHandle      hUart
)
{
    CSL_UartRegsOvly uartRegs = hUart->regs;
    CSL_FINS (uartRegs->FCR, UART_FCR_TXCLR, CSL_UART_FCR_TXCLR_CLR);
}


/** ============================================================================
 *  @n@b CSL_uartResetRxFifo
 *
 *  @b Description
 *  @n Reset RxFIFO counters of Universal asynchronous receive transmitter 
 *  @verbatim
       hUart                      Handle to the Universal asynchronous receiver 
                                  transmitter instance
 *  @endverbatim
 *
 *  <b> Return Value </b>  None
 *
 *  <b> Pre Condition </b>
 *  @n  None
 *
 *  <b> Post Condition </b>
 *   @n Reset RxFIFO counters of Universal asynchronous receive transmitter 
 *      
 *  @b Modifies
 *  @n None
 *
 *  @b Example
 *  @verbatim
       CSL_UartHandle     hUart;
       ...
       CSL_uartResetRxFifo (hUart);
       ...
    @endverbatim
 * =============================================================================
 */
CSL_IDEF_INLINE 
void CSL_uartResetRxFifo (
    CSL_UartHandle      hUart
)
{
    CSL_UartRegsOvly uartRegs = hUart->regs;
    CSL_FINS (uartRegs->FCR, UART_FCR_RXCLR, CSL_UART_FCR_RXCLR_CLR);
}


/** ============================================================================
 *  @n@b CSL_uartBreakEnable
 *
 *  @b Description