csl_uartaux.h

TI达芬奇dm644x各硬件模块测试代码

/*  ============================================================================
 *   Copyright (c) Texas Instruments Inc 2002, 2003, 2004, 2005                 
 *                                                                              
 *   Use of this software is controlled by the terms and conditions found in the
 *   license agreement under which this software has been supplied.             
 *   ===========================================================================
 */
 
/** @file csl_uartAux.h
 *
 * @brief  Header file for functional layer of CSL
 *
 *  Path: \\(CSLPATH)\\ipmodules\\uart\\src
 *
 * Description
 *    - The defines inline function definitions 
 *
 */
 
/* =============================================================================
 *  Revision History
 *  ===============
 *  
 *  07-Sep-2004 brn File Created.
 *  11-Oct_2004 brn File updated with the review comments
 *  29_Jun-2005 brn In CSL_uartRead function the call made call-by-reference 
                    with the existing call-by-value
 * =============================================================================
 */
 
 
#ifndef _CSL_UARTAUX_H_
#define _CSL_UARTAUX_H_

#include <csl_uart.h>

#ifdef __cplusplus
extern "C" {
#endif

/**
 *  Status query functions of the Universal asynchronous receiver transmitter
 */

/** ============================================================================
 *  @n@b CSL_uartGetLineStatus
 *
 *  @b Description
 *  @n Gets line status of the Universal asynchronous receiver transmitter from
 *     line status register
 *
 *  @b Arguments
 *  @verbatim
       hUart          Handle to the Universal asynchronous receiver transmitter
                      instance
 *  @endverbatim
 *
 *  <b> Return Value </b>  CSL_BitMask
 *
 *  <b> Pre Condition </b>
 *  @n  None
 *
 *  <b> Post Condition </b>
 *   @n Returns current value of the Universal asynchronous receiver transmitter
 *      line status register
 *
 *  @b Modifies
 *  @n  None
 *
 *  @b Example
 *  @verbatim
       CSL_UartHandle     hUart;
       CSL_BitMask        lineStatus;           
       ...
       lineStatus = CSL_uartGetLineStatus (hUart);
       ...
    @endverbatim
 * =============================================================================
 */
CSL_IDEF_INLINE
CSL_BitMask32 CSL_uartGetLineStatus (
    CSL_UartHandle     hUart
)
{
    CSL_BitMask32   lineStatus;
    lineStatus = hUart->regs->LSR;
    return lineStatus;
}


/** ============================================================================
 *  @n@b CSL_uartGetModemStatus
 *
 *  @b Description
 *  @n Gets modem status of the Universal asynchronous receiver transmitter 
 *     from line status register
 *
 *  @b Arguments
 *  @verbatim
       hUart          Handle to the Universal asynchronous receiver transmitter
                      instance
 *  @endverbatim
 *
 *  <b> Return Value </b>  CSL_BitMask
 *
 *  <b> Pre Condition </b>
 *  @n  None
 *
 *  <b> Post Condition </b>
 *   @n Returns current value of the Universal asynchronous receiver transmitter
 *      modem status register
 *
 *  @b Modifies
 *  @n  None
 *
 *  @b Example
 *  @verbatim
       CSL_UartHandle     hUart;
       CSL_BitMask        modemStatus;           
       ...
       modemStatus = CSL_uartGetModemStatus (hUart);
       ...
    @endverbatim
 * =============================================================================
 */
CSL_IDEF_INLINE
CSL_BitMask32 CSL_uartGetModemStatus (
    CSL_UartHandle     hUart
)
{
    CSL_BitMask32   modemStatus;
    modemStatus = hUart->regs->MSR;
    return modemStatus;
}


/** ============================================================================
 *  @n@b CSL_uartGetIntrStatus
 *
 *  @b Description
 *  @n Gets intrupt status of the Universal asynchronous receiver transmitter 
 *      from interrupt status register
 *
 *  @b Arguments
 *  @verbatim
       hUart          Handle to the Universal asynchronous receiver transmitter
                      instance
 *  @endverbatim
 *
 *  <b> Return Value </b>  CSL_BitMask
 *
 *  <b> Pre Condition </b>
 *  @n  None
 *
 *  <b> Post Condition </b>
 *   @n Returns current value of the Universal asynchronous receiver transmitter
 *      modem status register
 *
 *  @b Modifies
 *  @n  None
 *
 *  @b Example
 *  @verbatim
       CSL_UartHandle     hUart;
       CSL_BitMask        intrStatus;           
       ...
       intrStatus = CSL_uartGetModemStatus (hUart);
       ...
    @endverbatim
 * =============================================================================
 */
CSL_IDEF_INLINE
CSL_BitMask32 CSL_uartGetIntrStatus (
    CSL_UartHandle     hUart
)
{
    CSL_BitMask32   intrStatus;
    CSL_FINSR(hUart->regs->LCR, 7, 7, 0);
    intrStatus = hUart->regs->IER;
    return intrStatus;
}


/** ============================================================================
 *  @n@b CSL_uartGetVersion
 *
 *  @b Description
 *  @n Gets the versin of the Universal asynchronous receiver transmitter 
 *      from peripheral id register
 *
 *  @b Arguments
 *  @verbatim
       hUart          Handle to the Universal asynchronous receiver transmitter
                      instance
 *  @endverbatim
 *
 *  <b> Return Value </b>  CSL_BitMask
 *
 *  <b> Pre Condition </b>
 *  @n  None
 *
 *  <b> Post Condition </b>
 *   @n Returns current value of the Universal asynchronous receiver transmitter
 *      version 
 *
 *  @b Modifies
 *  @n  None
 *
 *  @b Example
 *  @verbatim
       CSL_UartHandle     hUart;
       Uint8              version;           
       ...
       version = CSL_uartGetVersion (hUart);
       ...
    @endverbatim
 * =============================================================================
 */
CSL_IDEF_INLINE
Uint8 CSL_uartGetVersion (
    CSL_UartHandle     hUart
)
{
    Uint8    version;
    version = CSL_FEXT (hUart->regs->PID1, UART_PID1_REV);
    return version;
}


/** ============================================================================
 *  @n@b CSL_uartGetIntrSource
 *
 *  @b Description
 *  @n Gets the intreeupt source value of the Universal asynchronous receiver 
 *     transmitter from interrupt id register
 *  @b Arguments
 *  @verbatim
       hUart          Handle to the Universal asynchronous receiver transmitter
                      instance
 *  @endverbatim
 *
 *  <b> Return Value </b>  CSL_BitMask
 *
 *  <b> Pre Condition </b>
 *  @n  None
 *
 *  <b> Post Condition </b>
 *   @n Returns current value of the Universal asynchronous receiver transmitter
 *      version 
 *
 *  @b Modifies
 *  @n  None
 *
 *  @b Example
 *  @verbatim
       CSL_UartHandle     hUart;
       intrStatus         intrSource;           
       ...
       intrSource = CSL_uartGetIntrSource (hUart);
       ...
    @endverbatim
 * =============================================================================
 */
CSL_IDEF_INLINE 
CSL_UartIntrSource CSL_uartGetIntrSource (
    CSL_UartHandle     hUart
)
{
    CSL_UartIntrSource  intrSource;
    intrSource = (CSL_UartIntrSource) CSL_FEXTR ( hUart->regs->IIR, 5, 0 );      
    return intrSource;
}


/**
 *  Control command functions of the UART
 */

/** ============================================================================
 *  @n@b CSL_uartWrite
 *
 *  @b Description
 *  @n writs the data from Universal asynchronous receive transmitter 
 *  @verbatim
       hUart                      Handle to the Universal asynchronous receiver 
                                  transmitter instance
       CSL_UartBufferDescriptor   structure to the UART buffer descriptor       
 *  @endverbatim
 *
 *  <b> Return Value </b>  None
 *
 *  <b> Pre Condition </b>
 *  @n  None
 *
 *  <b> Post Condition </b>
 *   @n writes the data from Universal asynchronous receiver transmitter 
 *      
 *  @b Modifies
 *  @n  None
 *
 *  @b Example
 *  @verbatim
       CSL_UartHandle     hUart;
       CSL_UartBufferDescriptor  discriptor;           
       ...
       CSL_uartWrite ( hUart, &discriptor );
       ...
    @endverbatim
 * =============================================================================
 */
CSL_IDEF_INLINE 
void CSL_uartWrite (
    CSL_UartHandle            hUart,
    CSL_UartBufferDescriptor  *descriptor
)
{
    
    Uint8   *tmpbuff;
    Uint32  numBytes;
    CSL_UartRegsOvly uartRegs = hUart->regs;
    descriptor->transfernum = 0;
    numBytes = descriptor->num;
    tmpbuff = descriptor->buff;
    
    /* To access RBR, THR and IER registers */
    
    CSL_FINSR(uartRegs->LCR, 7, 7, 0);
    
    while (!(uartRegs->LSR & CSL_UART_LINESTAT_THR_EMPTY)) {
      // Empty 
    }
    
    while ( numBytes > 0 ) {
      uartRegs->THR = *tmpbuff++; 
      descriptor->transfernum += 1;
      numBytes -= 1;
      /* check if THR is empty before sending another byte */
      while (!(uartRegs->LSR & CSL_UART_LINESTAT_THR_EMPTY)) {
      /* Empty */      
      }
    }
}


/** ============================================================================
 *  @n@b CSL_uartRead
 *
 *  @b Description
 *  @n reads the data into Universal asynchronous receive transmitter 
 *  @verbatim
       hUart                      Handle to the Universal asynchronous receiver 
                                  transmitter instance
       CSL_UartBufferDescriptor   structure to the UART buffer descriptor       
 *  @endverbatim
 *
 *  <b> Return Value </b>  None
 *
 *  <b> Pre Condition </b>
 *  @n  None
 *
 *  <b> Post Condition </b>
 *   @n writes the data from Universal asynchronous receiver transmitter 
 *      
 *  @b Modifies
 *  @n None
 *
 *  @b Example
 *  @verbatim
       CSL_UartHandle            hUart;
       CSL_UartBufferDescriptor  discriptor;           
       ...
       CSL_uartRead ( hUart, &discriptor );
       ...
    @endverbatim
 * =============================================================================
 */
CSL_IDEF_INLINE 
void CSL_uartRead (
    CSL_UartHandle      hUart,
    CSL_UartBufferDescriptor  *descriptor
)
{
    //CSL_Status status = CSL_SOK;
    Uint8   *tmpbuff;
    Uint32  numBytes;
    Uint32  tmpstat;
    //Uint16  divisor; 
    CSL_UartRegsOvly uartRegs = hUart->regs;
    
    descriptor->transfernum = 0;
    descriptor->error  = 0;
    numBytes = descriptor->num;
    tmpbuff = descriptor->buff;
    tmpstat = uartRegs->LSR;
    /* To access RBR, THR and IER registers */
    CSL_FINSR(uartRegs->LCR, 7, 7, 0);
    
    while ( (numBytes > 0) && (tmpstat & CSL_UART_LINESTAT_DATAREADY) ) 
    {
        
        if (tmpstat & CSL_UART_LINESTAT_RXFIFO_ERR) 
        {
            descriptor->error |= CSL_UART_LINESTAT_RXFIFO_ERR;
            if (tmpstat & CSL_UART_LINESTAT_PARITY_ERR)
              descriptor->error |= CSL_UART_LINESTAT_PARITY_ERR;
            if (tmpstat & CSL_UART_LINESTAT_FRAME_ERR)
              descriptor->error |= CSL_UART_LINESTAT_FRAME_ERR;  
            if (tmpstat & CSL_UART_LINESTAT_OVERRUN_ERR)
            descriptor->error |= CSL_UART_LINESTAT_OVERRUN_ERR;                        
                      
        }                                               
        *tmpbuff++ = uartRegs->RBR; 
        descriptor->transfernum += 1;
        numBytes -= 1;
        tmpstat = uartRegs->LSR;
    }
}        
   

/** ============================================================================
 *  @n@b CSL_uartWriteByte
 *
 *  @b Description
 *  @n writes bytes from Universal asynchronous receive transmitter 
 *  @verbatim
       hUart                      Handle to the Universal asynchronous receiver 
                                  transmitter instance
       wByte                      write bye value                         
 *  @endverbatim
 *
 *  <b> Return Value </b>  None
 *
 *  <b> Pre Condition </b>
 *  @n  None
 *
 *  <b> Post Condition </b>
 *   @n writes the byte data from Universal asynchronous receiver transmitter to
        transmitter holding  register
 *      
 *  @b Modifies
 *  @n None
 *
 *  @b Example
 *  @verbatim
       CSL_UartHandle     hUart;
       uint8              wByte;           
       ...
       CSL_uartRead ( hUart, wByte );
       ...
    @endverbatim
 * =============================================================================
 */
CSL_IDEF_INLINE
void CSL_uartWriteByte (
    CSL_UartHandle      hUart,
    Uint8               wByte
)
{
    CSL_UartRegsOvly uartRegs = hUart->regs;
   /* Remove this comment Once the UART starts working    
    * We have commented because, there is some problem in VPHIBARI
    * plotform. Its is giving the error that #20 (offdet of DLL) and
    * #24 (offset of DLH). 
    */
   
    while (!(uartRegs->LSR & CSL_UART_LINESTAT_THR_EMPTY)) {
              // Empty 
           }
            
    /* To access RBR, THR and IER registers */
    CSL_FINSR(uartRegs->LCR, 7, 7, 0);
    uartRegs->THR = wByte;
}


/** ============================================================================
 *  @n@b CSL_uartReadByte
 *
 *  @b Description
 *  @n reads byte from Universal asynchronous receive transmitter 
 *  @verbatim
       hUart                      Handle to the Universal asynchronous receiver 
                                  transmitter instance
       wByte                      write bye value                         
 *  @endverbatim
 *
 *  <b> Return Value </b>  None
 *
 *  <b> Pre Condition </b>
 *  @n  None
 *
 *  <b> Post Condition </b>
 *   @n writes the data from Universal asynchronous receiver transmitter to 
        transmitter holding  register
 *      
 *  @b Modifies
 *  @n None
 *
 *  @b Example
 *  @verbatim
       CSL_UartHandle     hUart;
       uint8              rByte;           
       ...
       rByte =  CSL_uartRead (hUart);
       ...
    @endverbatim
 * =============================================================================
 */
CSL_IDEF_INLINE 
Uint8 CLS_uartReadByte (
    CSL_UartHandle      hUart
)
{
    CSL_UartRegsOvly uartRegs = hUart->regs;
    Uint8             rByte;
        
    /* Remove this comment Once the UART starts working    
    * We have commented because, there is some problem in VPHIBARI
    * plotform. Its is giving the error that #20 (offdet of DLL) and
    * #24 (offset of DLH). 
    */
    
    while (!(uartRegs->LSR & CSL_UART_LINESTAT_DATAREADY)) { 
      //Empty
    }
     
    /* To access RBR, THR and IER registers */
    CSL_FINSR(uartRegs->LCR, 7, 7, 0);
    
    rByte = CSL_FEXT(uartRegs->RBR, UART_RBR_DATA);
    return rByte;
}


/** ============================================================================
 *  @n@b CSL_uartIntrDisable
 *
 *  @b Description
 *  @n Disables interrupts specified by input bitmask of Universal asynchronous 
 *     receive transmitter 
 *  @verbatim
       hUart                      Handle to the Universal asynchronous receiver 
                                  transmitter instance
       mask                       mask value to disabling the interrupt
 *  @endverbatim
 *
 *  <b> Return Value </b>  None
 *
 *  <b> Pre Condition </b>
 *  @n  None
 *
 *  <b> Post Condition </b>
 *   @n disables the interrupt of Universal asynchronous receive transmitter 
 *      
 *  @b Modifies
 *  @n None
 *
 *  @b Example