⭐ 欢迎来到虫虫下载站! | 📦 资源下载 📁 资源专辑 ℹ️ 关于我们
⭐ 虫虫下载站

📄 csl_vlynqaux.h

📁 TI达芬奇dm644x各硬件模块测试代码
💻 H
📖 第 1 页 / 共 5 页
字号:
    hVlynq->regs->INTVEC1 |= intEnable;    return;}/** ============================================================================ *   @n@b CSL_vlynqIntvec1Disable * *   @b Description *   @n Disables the INTVEC1 (7-4) interrupt(s). * *   @b Arguments *   @verbatim        hVlynq          Handle to the VLYNQ instance        intDisable      value for Disables the INTVEC1 (7-4) interrupt(s).     @endverbatim * *   <b> Return Value </b> *       None * *   <b> Pre Condition </b> *   @n  None * *   <b> Post Condition </b> *   @n  the INTVEC1 (7-4) interrupt(s) Disables value passed. * *   @b Modifies *   @n VLYNQ Interrupt Vector 7-4 Register. * *   @b Example *   @verbatim        CSL_VlynqHandle     hVlynq;         ...        CSL_vlynqIntvec1Disable (hVlynq, 0x01);        ...     @endverbatim * =========================================================================== */CSL_IDEF_INLINEvoid CSL_vlynqIntvec1Disable (    CSL_VlynqHandle  hVlynq,    Uint32           intDisable){    /** Disable INTVEC1 (7-4) interrupt(s) */    hVlynq->regs->INTVEC1 &= ~(intDisable);    return;}/** ============================================================================ *   @n@b CSL_vlynqInt7TypeSet * *   @b Description *   @n Set the Interrupt type. * *   @b Arguments *   @verbatim        hVlynq       Handle to the VLYNQ instance        intType7     Interrupt type to be set.     @endverbatim * *   <b> Return Value </b> *       None * *   <b> Pre Condition </b> *   @n  None * *   <b> Post Condition </b> *   @n  The Interrupt type is set to the value passed. * *   @b Modifies *   @n VLYNQ Interrupt Vector 7-4 Register. * *   @b Example *   @verbatim        CSL_VlynqHandle     hVlynq;         ...        CSL_vlynqInt7TypeSet (hVlynq, intType7 );        ...     @endverbatim * =========================================================================== */CSL_IDEF_INLINEvoid CSL_vlynqInt7TypeSet (    CSL_VlynqHandle  hVlynq,    CSL_VlynqIntType intType7){    /** INTVEC1s' Interrupt-7 type */    CSL_FINS(hVlynq->regs->INTVEC1, VLYNQ_INTVEC1_INTTYPE7, intType7);    return;}/** ============================================================================ *   @n@b CSL_vlynqInt7PolSet * *   @b Description *   @n Set the Interrupt polarity. * *   @b Arguments *   @verbatim        hVlynq       Handle to the VLYNQ instance        intPol7      Interrupt polarity to be set.     @endverbatim * *   <b> Return Value </b> *       None * *   <b> Pre Condition </b> *   @n  None * *   <b> Post Condition </b> *   @n  The Interrupt polarity is set to the value passed. * *   @b Modifies *   @n VLYNQ Interrupt Vector 7-4 Register. * *   @b Example *   @verbatim        CSL_VlynqHandle     hVlynq;         ...        CSL_vlynqInt7PolSet (hVlynq, intPol7);        ...     @endverbatim * =========================================================================== */CSL_IDEF_INLINEvoid CSL_vlynqInt7PolSet (    CSL_VlynqHandle     hVlynq,    CSL_VlynqIntPolType intPol7){    /** INTVEC1s' Interrupt-7 polarity */    CSL_FINS(hVlynq->regs->INTVEC1, VLYNQ_INTVEC1_INTPOL7,intPol7);    return;}/** ============================================================================ *   @n@b CSL_vlynqInt7IntvecSet * *   @b Description *   @n Set the Interrupt vector. * *   @b Arguments *   @verbatim        hVlynq       Handle to the VLYNQ instance        intVector7   Interrupt vector to be set.     @endverbatim * *   <b> Return Value </b> *       None * *   <b> Pre Condition </b> *   @n  None * *   <b> Post Condition </b> *   @n  The Interrupt vector is set to the value passed. * *   @b Modifies *   @n VLYNQ Interrupt Vector 7-4 Register. * *   @b Example *   @verbatim        CSL_VlynqHandle     hVlynq;         ...        CSL_vlynqInt7IntvecSet (hVlynq, intVector7);        ...     @endverbatim * =========================================================================== */CSL_IDEF_INLINEvoid CSL_vlynqInt7IntvecSet (    CSL_VlynqHandle     hVlynq,    CSL_VlynqIntVector  intVector7){    /** INTVEC1's Interrupt-7 interrupt vector */    CSL_FINS(hVlynq->regs->INTVEC1, VLYNQ_INTVEC1_INTVEC7, intVector7);    return;}/** ============================================================================ *   @n@b CSL_vlynqInt6TypeSet * *   @b Description *   @n Set the Interrupt type. * *   @b Arguments *   @verbatim        hVlynq       Handle to the VLYNQ instance        intType6     Interrupt type to be set.     @endverbatim * *   <b> Return Value </b> *       None * *   <b> Pre Condition </b> *   @n  None * *   <b> Post Condition </b> *   @n  The Interrupt type is set to the value passed. * *   @b Modifies *   @n VLYNQ Interrupt Vector 7-4 Register. * *   @b Example *   @verbatim        CSL_VlynqHandle     hVlynq;         ...        CSL_vlynqInt6TypeSet (hVlynq, intType6 );        ...     @endverbatim * =========================================================================== */CSL_IDEF_INLINEvoid CSL_vlynqInt6TypeSet (    CSL_VlynqHandle  hVlynq,    CSL_VlynqIntType intType6){    /** INTVEC1s' Interrupt-6 type */    CSL_FINS(hVlynq->regs->INTVEC1, VLYNQ_INTVEC1_INTTYPE6, intType6);    return;}/** ============================================================================ *   @n@b CSL_vlynqInt6PolSet * *   @b Description *   @n Set the Interrupt polarity. * *   @b Arguments *   @verbatim        hVlynq       Handle to the VLYNQ instance        intPol6      Interrupt polarity to be set.     @endverbatim * *   <b> Return Value </b> *       None * *   <b> Pre Condition </b> *   @n  None * *   <b> Post Condition </b> *   @n  The Interrupt polarity is set to the value passed. * *   @b Modifies *   @n VLYNQ Interrupt Vector 7-4 Register. * *   @b Example *   @verbatim        CSL_VlynqHandle     hVlynq;         ...        CSL_vlynqInt6PolSet (hVlynq, intPol6);        ...     @endverbatim * =========================================================================== */CSL_IDEF_INLINEvoid CSL_vlynqInt6PolSet (    CSL_VlynqHandle     hVlynq,    CSL_VlynqIntPolType intPol6){    /** INTVEC1s' Interrupt-6 polarity */    CSL_FINS(hVlynq->regs->INTVEC1, VLYNQ_INTVEC1_INTPOL6,intPol6);    return;}/** ============================================================================ *   @n@b CSL_vlynqInt6IntvecSet * *   @b Description *   @n Set the Interrupt vector. * *   @b Arguments *   @verbatim        hVlynq       Handle to the VLYNQ instance        intVector6   Interrupt vector to be set.     @endverbatim * *   <b> Return Value </b> *       None * *   <b> Pre Condition </b> *   @n  None * *   <b> Post Condition </b> *   @n  The Interrupt vector is set to the value passed. * *   @b Modifies *   @n VLYNQ Interrupt Vector 7-4 Register. * *   @b Example *   @verbatim        CSL_VlynqHandle     hVlynq;         ...        CSL_vlynqInt6IntvecSet (hVlynq, intVector6);        ...     @endverbatim * =========================================================================== */CSL_IDEF_INLINEvoid CSL_vlynqInt6IntvecSet (    CSL_VlynqHandle     hVlynq,    CSL_VlynqIntVector  intVector6){    /** INTVEC1's Interrupt-6 interrupt vector */    CSL_FINS(hVlynq->regs->INTVEC1, VLYNQ_INTVEC1_INTVEC6, intVector6);    return;}/** ============================================================================ *   @n@b CSL_vlynqInt5TypeSet * *   @b Description *   @n Set the Interrupt type. * *   @b Arguments *   @verbatim        hVlynq       Handle to the VLYNQ instance        intType5     Interrupt type to be set.     @endverbatim * *   <b> Return Value </b> *       None * *   <b> Pre Condition </b> *   @n  None * *   <b> Post Condition </b> *   @n  The Interrupt type is set to the value passed. * *   @b Modifies *   @n VLYNQ Interrupt Vector 7-4 Register. * *   @b Example *   @verbatim        CSL_VlynqHandle     hVlynq;         ...        CSL_vlynqInt5TypeSet (hVlynq, intType5 );        ...     @endverbatim * =========================================================================== */CSL_IDEF_INLINEvoid CSL_vlynqInt5TypeSet (    CSL_VlynqHandle  hVlynq,    CSL_VlynqIntType intType5){    /** INTVEC1s' Interrupt-5 type */    CSL_FINS(hVlynq->regs->INTVEC1, VLYNQ_INTVEC1_INTTYPE5, intType5);    return;}/** ============================================================================ *   @n@b CSL_vlynqInt5PolSet * *   @b Description *   @n Set the Interrupt polarity. * *   @b Arguments *   @verbatim        hVlynq       Handle to the VLYNQ instance        intPol5      Interrupt polarity to be set.     @endverbatim * *   <b> Return Value </b> *       None * *   <b> Pre Condition </b> *   @n  None * *   <b> Post Condition </b> *   @n  The Interrupt polarity is set to the value passed. * *   @b Modifies *   @n VLYNQ Interrupt Vector 7-4 Register. * *   @b Example *   @verbatim        CSL_VlynqHandle     hVlynq;         ...        CSL_vlynqInt5PolSet (hVlynq, intPol5);        ...     @endverbatim * =========================================================================== */CSL_IDEF_INLINEvoid CSL_vlynqInt5PolSet (    CSL_VlynqHandle     hVlynq,    CSL_VlynqIntPolType intPol5){    /** INTVEC1s' Interrupt-5 polarity */    CSL_FINS(hVlynq->regs->INTVEC1, VLYNQ_INTVEC1_INTPOL5,intPol5);    return;}/** ============================================================================ *   @n@b CSL_vlynqInt5IntvecSet * *   @b Description *   @n Set the Interrupt vector. * *   @b Arguments *   @verbatim        hVlynq       Handle to the VLYNQ instance        intVector5   Interrupt vector to be set.     @endverbatim * *   <b> Return Value </b> *       None * *   <b> Pre Condition </b> *   @n  None * *   <b> Post Condition </b> *   @n  The Interrupt vector is set to the value passed. * *   @b Modifies *   @n VLYNQ Interrupt Vector 7-4 Register. * *   @b Example *   @verbatim        CSL_VlynqHandle     hVlynq;         ...        CSL_vlynqInt5IntvecSet (hVlynq, intVector5);        ...     @endverbatim * =========================================================================== */CSL_IDEF_INLINEvoid CSL_vlynqInt5IntvecSet (    CSL_VlynqHandle     hVlynq,    CSL_VlynqIntVector  intVector5){    /** INTVEC1's Interrupt-5 interrupt vector */    CSL_FINS(hVlynq->regs->INTVEC1, VLYNQ_INTVEC1_INTVEC5, intVector5);    return;}/** ============================================================================ *   @n@b CSL_vlynqInt4TypeSet * *   @b Description *   @n Set the Interrupt type. * *   @b Arguments *   @verbatim        hVlynq       Handle to the VLYNQ instance        intType4     Interrupt type to be set.     @endverbatim * *   <b> Return Value </b> *       None * *   <b> Pre Condition </b> *   @n  None * *   <b> Post Condition </b> *   @n  The Interrupt type is set to the value passed. * *   @b Modifies *   @n VLYNQ Interrupt Vector 7-4 Register. * *   @b Example *   @verbatim        CSL_VlynqHandle     hVlynq;         ...        CSL_vlynqInt4TypeSet (hVlynq, intType4 );        ...     @endverbatim * =========================================================================== */CSL_IDEF_INLINEvoid CSL_vlynqInt4TypeSet (    CSL_VlynqHandle  hVlynq,    CSL_VlynqIntType intType4){    /** INTVEC1s' Interrupt-4 type */    CSL_FINS(hVlynq->regs->INTVEC1, VLYNQ_INTVEC1_INTYPE4, intType4);    return;}/** ============================================================================ *   @n@b CSL_vlynqInt4PolSet * *   @b Description *   @n Set the Interrupt polarity. * *   @b Arguments *   @verbatim        hVlynq       Handle to the VLYNQ instance        intPol4      Interrupt polarity to be set.     @endverbatim * *   <b> Return Value </b> *       None * *   <b> Pre Condition </b> *   @n  None * *   <b> Post Condition </b> *   @n  The Interrupt polarity is set to the value passed. * *   @b Modifies *   @n VLYNQ Interrupt Vector 7-4 Register. * *   @b Example *   @verbatim        CSL_VlynqHandle     hVlynq;         ...        CSL_vlynqInt4PolSet (hVlynq, intPol4);        ...     @endverbatim * =========================================================================== */CSL_IDEF_INLINEvoid CSL_vlynqInt4PolSet (    CSL_VlynqHandle     hVlynq,    CSL_VlynqIntPolType intPol4

⌨️ 快捷键说明

复制代码 Ctrl + C
搜索代码 Ctrl + F
全屏模式 F11
切换主题 Ctrl + Shift + D
显示快捷键 ?
增大字号 Ctrl + =
减小字号 Ctrl + -