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📄 csl_tmr.h

📁 TI达芬奇dm644x各硬件模块测试代码
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/*  ============================================================================ *   Copyright (c) Texas Instruments Inc 2002, 2003, 2004, 2005 * *   Use of this software is controlled by the terms and conditions found in the *   license agreement under which this software has been supplied. *   =========================================================================== *//** @file csl_tmr.h * *  @brief  Header file for functional layer of ARM TIMER CSL * *  Description *  - Comprises the function declarations for the various APIs and the *    associated enumerations, type and symbol definitions for the TIMER *    module. * *  Path: \\(CSLPATH)\\ipmodules\\timer\\src *//** @mainpage TIMER CSL 3.x * *  @section Introduction * *  @subsection xxx Purpose and Scope *  The purpose of this document is to identify a set of common CSL APIs for *  the TIMER Module across various devices. The CSL developer is expected *  to refer to this document while designing APIs for these modules. Some *  of the listed APIs may not be applicable to a given TIMER Module. While *  in other cases this list of APIs may not be sufficient to cover all the *  features of a particular TIMER Module. The CSL developer should use his *  discretion in designing new APIs or extending the existing ones to cover *  these. * *  @subsection aaa Terms and Abbreviations *    -# CSL:  Chip Support Library *    -# API:  Application Programmer Interface * * @subsection References *    -# CSL-001-DES, CSL 3.x Design Specification Document Version 1.02 *//* ============================================================================= *  Revision History *  =============== *  1-Sept-2004 HMM File Created. * ============================================================================= */#ifndef _CSL_TMR_H_#define _CSL_TMR_H_#ifdef __cplusplusextern "C" {#endif#include <csl.h>#include <csl_error.h>#include <csl_types.h>#include <cslr_tmr.h>#include <soc.h>/* *  General purpose global typedef declarations *//** @brief       Enumeration of supported command operations * *  This enum describes the commands used to control the GP timer through *  @a CSL_tmrHwControl () */typedef enum {    /**     * @brief   Loads the GP Timer Period Register 12     * @param   Uint32 *     */    CSL_TMR_CMD_LOAD_PRD12 = 0,    /**     * @brief   Loads the GP Timer Period Register 34     * @param   Uint32 *     */    CSL_TMR_CMD_LOAD_PRD34 = 1,    /**     * @brief   Loads the GP Timer Pre-scalar Register 34     * @param   Uint8 *     */    CSL_TMR_CMD_LOAD_PRESCALAR34 = 2,    /**     * @brief   Enable the GP timer 12     * @param   CSL_TmrEnamode     */    CSL_TMR_CMD_START12 = 3,    /**     * @brief   Enable the GP timer 34     * @param   CSL_TmrEnamode     */    CSL_TMR_CMD_START34 = 4,    /**     * @brief   Stop the GP timer 12     * @param   None     */    CSL_TMR_CMD_STOP12 = 5,    /**     * @brief   Stop the GP timer 34     * @param   None     */    CSL_TMR_CMD_STOP34 = 6,    /**     * @brief   Reset the GP timer 12     * @param   None     */    CSL_TMR_CMD_RESET12 = 7,    /**     * @brief   Reset the GP timer 34     * @param   None     */    CSL_TMR_CMD_RESET34 = 8,    /**     * @brief   Set the GPIO data for timer input 12     * @param   Bool     */    CSL_TMR_CMD_SET_GPIO_DATA_TINP12 = 9,    /**     * @brief   Set the GPIO data for timer output 12     * @param   Bool     */    CSL_TMR_CMD_SET_GPIO_DATA_TOUTP12 = 10,    /**     * @brief   Set the GPIO data for timer input 34     * @param   Bool     */    CSL_TMR_CMD_SET_GPIO_DATA_TINP34 = 11,    /**     * @brief   Set the GPIO data for timer output 34     * @param   Bool     */    CSL_TMR_CMD_SET_GPIO_DATA_TOUTP34 = 12,    /**     * @brief   Configure the GP Timer input 12 mode     * @param   Bool     */    CSL_TMR_CMD_CONFIG_GPIO_DIR_TINP12 = 13,    /**     * @brief   Configure the GP Timer input 34 mode     * @param   Bool     */    CSL_TMR_CMD_CONFIG_GPIO_DIR_TINP34 = 14,    /**     * @brief   Configure the GP Timer output 12 mode     * @param   Bool     */    CSL_TMR_CMD_CONFIG_GPIO_DIR_TOUTP12 = 15,    /**     * @brief   Configure the GP Timer output 34 mode     * @param   Bool     */    CSL_TMR_CMD_CONFIG_GPIO_DIR_TOUTP34 = 16,    /**     * @brief   Start the timer in GPtimer64 OR Chained mode     * @param   None     */    CSL_TMR_CMD_START64 = 17,    /**     * @brief   Stop the timer of GPtimer64 OR Chained     * @param   None     */    CSL_TMR_CMD_STOP64 = 18,    /**     * @brief   Reset the timer of GPtimer64 OR Chained     * @param   None     */    CSL_TMR_CMD_RESET64 = 19} CSL_TmrHwControlCmd;/** @brief       Enumeration of supported status query operations * *  This enum describes the commands used to get status of various parameters *  of the GP timer. These values are used in @a CSL_tmrGetHwStatus () */typedef enum {    /**     * @brief   Gets the current value of the GP timer TIMx register     * @param   Uint32 *     */    CSL_TMR_QUERY_COUNT12 = 0,    /**     * @brief   Gets the current value of the GP timer TIMx register     * @param   Uint32 *     */    CSL_TMR_QUERY_COUNT34 = 1,    /**     * @brief   This query command returns the status     *          about whether the GP timer12 is running or stopped     * @param   CSL_TmrTstat     */    CSL_TMR_QUERY_TSTAT12 = 2,    /**     * @brief   This query command returns the status     *          about whether the GP timer12 is running or stopped     * @param   CSL_TmrTstat     */    CSL_TMR_QUERY_TSTAT34 = 3,    /**     * @brief   Get the GPIO data from timer input12     * @param   Bool     */    CSL_TMR_QUERY_GPIO_DATA_TINP12 = 4,    /**     * @brief   Get the GPIO data from timer output12     * @param   Bool     */    CSL_TMR_QUERY_GPIO_DATA_TOUTP12 = 5,    /**     * @brief   Get the GPIO data from timer input34     * @param   Bool     */    CSL_TMR_QUERY_GPIO_DATA_TINP34 = 6,    /**     * @brief   Get the GPIO data from timer output34     * @param   Bool     */    CSL_TMR_QUERY_GPIO_DATA_TOUTP34 = 7,    /**     * @brief   This query command returns the GP timer's     *          Peripheral Identification number     * @param   CSL_TmrPidNumber     */    CSL_TMR_QUERY_PID_NUMBER = 8} CSL_TmrHwStatusQuery;/** @brief  Enumeration for timer input (gated/ not gated) */typedef enum {    /** timer input not gated */    CSL_TMR_CLOCK_INP_NOGATE = 0,    /** timer input gated */    CSL_TMR_CLOCK_INP_GATE = 1} CSL_TmrIpGate;/** @brief  Enumeration for timer clock source selection */typedef enum {    /** timer clock VBUS source selection */    CSL_TMR_CLKSRC_VBUS = 0,    /** timer clock Timer input pin source selection */    CSL_TMR_CLKSRC_TMRINP = 1} CSL_TmrClksrc;/** @brief  Enumeration for timer Enable Mode */typedef enum {    /** The timer is disabled and maintains current value */    CSL_TMR_ENAMODE_DISABLE = 0,    /**  The timer is enabled one time */    CSL_TMR_ENAMODE_ENABLE  = 1,    /**  The timer is enabled continuously */    CSL_TMR_ENAMODE_CONT = 2} CSL_TmrEnamode;/** @brief  Enumeration for timer pulse width */typedef enum {    /** One timer clock cycle */    CSL_TMR_PWID_ONECLK = 0,    /** Two timer clock cycle */    CSL_TMR_PWID_TWOCLKS = 1,    /** Three timer clock cycle */    CSL_TMR_PWID_THREECLKS = 2,    /** Four timer clock cycle */    CSL_TMR_PWID_FOURCLKS = 3} CSL_TmrPulseWidth;/** @brief  Enumeration for timer mode (pulse/clock) */typedef enum {    /** Pulse mode */    CSL_TMR_CP_PULSE = 0,    /** Clock mode */    CSL_TMR_CP_CLOCK = 1} CSL_TmrClockPulse;/** @brief  Enumeration for timer input (uninverted/inverted) */typedef enum {    /** Uninverted timer input drives timer */    CSL_TMR_INVINP_UNINVERTED = 0,    /** Inverted timer input drives timer */    CSL_TMR_INVINP_INVERTED = 1} CSL_TmrInvInp;/** @brief  Enumeration for timer output (uninverted/inverted) */typedef enum {    /** Uninverted timer output */    CSL_TMR_INVOUTP_UNINVERTED = 0,    /** Inverted timer output */    CSL_TMR_INVOUTP_INVERTED = 1} CSL_TmrInvOutp;/** @brief  Enumeration for timer mode */typedef enum {    /** The timer is in 64-bit GP timer mode */    CSL_TMR_TIMMODE_GPT = 0,    /** The timer is in dual 32-bit timer, unchained mode */    CSL_TMR_TIMMODE_DUAL_UNCHAINED = 1,    /** The timer is in 64-bit Watchdog timer mode */    CSL_TMR_TIMMODE_WDT = 2,    /** The timer is in dual 32-bit timer, chained mode */    CSL_TMR_TIMMODE_DUAL_CHAINED = 3} CSL_TmrMode;/** @brief  Enumeration for timer state */typedef enum {    /** timer TIMxx is in reset */    CSL_TMR_TIMxxRS_RESET_ON = 0,    /** timer TIM34 is not in reset. TIM34 can be used as a 32-bit timer */    CSL_TMR_TIMxxRS_RESET_OFF = 1} CSL_TmrState;/** @brief Structure to get the PID number */typedef struct {    /** Identifies the type of peripheral */    Uint8 tmrType;    /** Identifies the class of peripheral */    Uint8 tmrClass;    /** Identifies the revision level of the timer */    Uint8 tmrRevision;} CSL_TmrPidNumber;/** @brief  Enumeration for timer T status */typedef enum {    /** Timer status drives High */    CSL_TMR_TSTAT_HIGH = 1,    /** Timer status drives Low */    CSL_TMR_TSTAT_LOW = 0} CSL_TmrTstat;/** * @brief Hardware setup structure. */typedef struct {    /** Enable the timer input TINP34 to source the interrupt     *  or event in GPIO mode     */    Bool tmrGpInt34Eni;    /** Enable the timer output TOUTP34 to source the interrupt     *  or event in GPIO mode     */    Bool tmrGpInt34Eno;    /** Invert bit for timer input TINP34 when it is used to source     *  an interrupt or event (GPINT34_ENI=1)     */    Bool tmrGpInt34Invi;    /** Invert bit for timer output TOUTP34 when it is used to source     *  an interrupt or event (GPINT34_ENO=1)     */    Bool tmrGpInt34Invo;    /** Enable the timer input TINP12 to source the interrupt     *  or event in GPIO mode     */    Bool tmrGpInt12Eni;    /** Enable the timer output TOUTP12 to source the interrupt     *  or event in GPIO mode     */    Bool tmrGpInt12Eno;    /** Invert bit for timer input TINP12 when it is used to source     *  an interrupt or event (GPINT12_ENI=1)     */    Bool tmrGpInt12Invi;    /** Invert bit for timer output TOUTP12 when it is used to source     *  an interrupt or event (GPINT12_ENO=1)     */    Bool tmrGpInt12Invo;    /**Enable the timer input TINP34 in GPIO mode */    Bool tmrGpIoEni34;    /**Enable the timer output TOUTP34 in GPIO mode */    Bool tmrGpIoEno34;    /**Enable the timer input TINP12 in GPIO mode */    Bool tmrGpIoEni12;    /** Enable the timer output TOUTP12 in GPIO mode */    Bool tmrGpIoEno12;    /** Controls the direction of the timer output TOUTP34 in GPIO mode */    Bool tmrGpDirDiro34;    /** Controls the direction of the timer input TINP34 in GPIO mode */    Bool tmrGpDirDiri34;    /** Controls the direction of the timer output TOUTP12 in GPIO mode */    Bool tmrGpDirDiro12;    /** Controls the direction of the timer input TINP12 in GPIO mode */    Bool tmrGpDirDiri12;    /** 32 bit load value to be loaded to Timer Period Register 12 */    Uint32 tmrTimerPeriod12;    /** 32 bit load value to be loaded to Timer Period Register 34 */    Uint32 tmrTimerPeriod34;    /** 32 bit load value to be loaded to Timer Counter Register 12 */    Uint32 tmrTimerCounter12;    /** 32 bit load value to be loaded to Timer Counter Register 34 */    Uint32 tmrTimerCounter34;    /** TIEN determines if the timer clock is gated by the timer input.     *  Applicable only when CLKSRC=0     */    CSL_TmrIpGate tmrIpGate34;    /** CLKSRC determines the selected clock source for the timer */    CSL_TmrClksrc tmrClksrc34;    /** Pulse width. used in pulse mode (C/P_=0) by the timer */    CSL_TmrPulseWidth tmrPulseWidth34;    /** Clock/Pulse mode for timer34 output */    CSL_TmrClockPulse tmrClockPulse34;    /** Timer input inverter control. Only affects operation     *  if CLKSRC=1, Timer Input pin     */    CSL_TmrInvInp tmrInvInp34;    /** Timer output inverter control */    CSL_TmrInvOutp tmrInvOutp34;    /** TIEN determines if the timer clock is gated by the timer input.     *  Applicable only when CLKSRC=0     */    CSL_TmrIpGate tmrIpGate12;    /** CLKSRC determines the selected clock source for the timer */    CSL_TmrClksrc tmrClksrc12;    /** Pulse width. used in pulse mode (C/P_=0) by the timer */    CSL_TmrPulseWidth tmrPulseWidth12;    /** Clock/Pulse mode for timer12 output */    CSL_TmrClockPulse tmrClockPulse12;    /** Timer input inverter control. Only affects operation     *  if CLKSRC=1, Timer Input pin     */    CSL_TmrInvInp tmrInvInp12;    /** Timer output inverter control */    CSL_TmrInvOutp tmrInvOutp12;    /** TIM34 pre-scalar counter specifies the count for TIM34 */    Uint8 tmrPreScalarCounter34;    /** Configures the GP timer in GP mode or in     *  general purpose timer mode or Dual 32 bit timer mode     */    CSL_TmrMode             tmrTimerMode;} CSL_TmrHwSetup;/** *  @brief Config-structure Used to configure the GP timer using *  @a CSL_tmrHwSetupRaw() */typedef struct CSL_TmrConfig {    /** Emulation Management/Clock Speed Registers */    Uint32 EMUMGT_CLKSPD;    /** GPIO IO Interrupt Control and Enable Registers */    Uint32 GPINT_GPEN;    /** GPTDAT_GPDIR */    Uint32 GPTDAT_GPDIR;    /** Timer Counter Register 12 */    Uint32 TIM12;    /** Timer Counter Register 34 */    Uint32 TIM34;    /** Timer Period Register 12 */    Uint32 PRD12;    /** Timer Period Register 34 */    Uint32 PRD34;    /** Timer Control Register */    Uint32 TCR;    /** Timer Global Control Register */    Uint32 TGCR;    /** Watchdog Timer Control Register */

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