cslr_uart.h

TI达芬奇dm644x各硬件模块测试代码

/*  ============================================================================
 *   Copyright (c) Texas Instruments Inc 2002, 2003, 2004, 2005                 
 *                                                                              
 *   Use of this software is controlled by the terms and conditions found in the
 *   license agreement under which this software has been supplied.             
 *   ===========================================================================
 */

#ifndef _CSLR_UART_H_
#define _CSLR_UART_H_

/** @file cslr_uart.h
 *  Path: \\(CSLPATH)\\soc\\davinci\\arm9\\src 
 *  @brief This file contains the Register Desciptions for UART
 * 
***************************************************************************/

/* =============================================================================
 *  Revision History
 *  ===============
 *  10-Jan-2005 brn File Upadted for DLL and DLH regieters according to the 
 *                  comments from "TI"
 * =============================================================================
 */


#include <cslr.h>
#include <tistdtypes.h>

/**************************************************************************\
* Register Overlay Structure
\**************************************************************************/
typedef struct  {
    volatile Uint32 RBR;
    volatile Uint32 IER;
    volatile Uint32 IIR;
    volatile Uint32 LCR;
    volatile Uint32 MCR;
    volatile Uint32 LSR;
    volatile Uint32 MSR;
    volatile Uint32 SCR;
    volatile Uint32 DLL;
    /*volatile Uint8 RSVD0[3]; Made DLL as 32 bit and removed with the 
                               comments from TI 
    */
    volatile Uint32 DLH;
    /*volatile Uint8 RSVD1[3]; Made DLL as 32 bit and removed with the 
                               comments from TI
    */
    volatile Uint32 PID1;
    volatile Uint32 PID2;
    volatile Uint32 PWREMU_MGMT;
} CSL_UartRegs;

/**************************************************************************\
* Overlay structure typedef definition
\**************************************************************************/
typedef volatile CSL_UartRegs             *CSL_UartRegsOvly;

/* Following 2 lines are added due to CSL3.x tools limitations */
#define THR RBR   /* RBR & THR have same offset */
#define FCR IIR   /* IIR & FCR have same offset */

/**************************************************************************\
* Field Definition Macros
\**************************************************************************/

/* RBR */

#define CSL_UART_RBR_DATA_MASK           (0x000000FFu)
#define CSL_UART_RBR_DATA_SHIFT          (0x00000000u)
#define CSL_UART_RBR_DATA_RESETVAL       (0x00000000u)

#define CSL_UART_RBR_RESETVAL            (0x00000000u)

/* THR */

#define CSL_UART_THR_DATA_MASK           (0x000000FFu)
#define CSL_UART_THR_DATA_SHIFT          (0x00000000u)
#define CSL_UART_THR_DATA_RESETVAL       (0x00000000u)

#define CSL_UART_THR_RESETVAL            (0x00000000u)

/* IER */

#define CSL_UART_IER_EDSSI_MASK          (0x00000008u)
#define CSL_UART_IER_EDSSI_SHIFT         (0x00000003u)
#define CSL_UART_IER_EDSSI_RESETVAL      (0x00000000u)

/*----EDSSI Tokens----*/
#define CSL_UART_IER_EDSSI_DISABLE       (0x00000000u)
#define CSL_UART_IER_EDSSI_ENABLE        (0x00000001u)

#define CSL_UART_IER_ELSI_MASK           (0x00000004u)
#define CSL_UART_IER_ELSI_SHIFT          (0x00000002u)
#define CSL_UART_IER_ELSI_RESETVAL       (0x00000000u)

/*----ELSI Tokens----*/
#define CSL_UART_IER_ELSI_DISABLE        (0x00000000u)
#define CSL_UART_IER_ELSI_ENABLE         (0x00000001u)

#define CSL_UART_IER_ETBEI_MASK          (0x00000002u)
#define CSL_UART_IER_ETBEI_SHIFT         (0x00000001u)
#define CSL_UART_IER_ETBEI_RESETVAL      (0x00000000u)

/*----ETBEI Tokens----*/
#define CSL_UART_IER_ETBEI_DISABLE       (0x00000000u)
#define CSL_UART_IER_ETBEI_ENABLE        (0x00000001u)

#define CSL_UART_IER_ERBI_MASK           (0x00000001u)
#define CSL_UART_IER_ERBI_SHIFT          (0x00000000u)
#define CSL_UART_IER_ERBI_RESETVAL       (0x00000000u)

/*----ERBI Tokens----*/
#define CSL_UART_IER_ERBI_DISABLE        (0x00000000u)
#define CSL_UART_IER_ERBI_ENABLE         (0x00000001u)

#define CSL_UART_IER_RESETVAL            (0x00000000u)

/* IIR */

#define CSL_UART_IIR_FIFOEN_MASK         (0x000000C0u)
#define CSL_UART_IIR_FIFOEN_SHIFT        (0x00000006u)
#define CSL_UART_IIR_FIFOEN_RESETVAL     (0x00000000u)

#define CSL_UART_IIR_INTID_MASK          (0x0000000Eu)
#define CSL_UART_IIR_INTID_SHIFT         (0x00000001u)
#define CSL_UART_IIR_INTID_RESETVAL      (0x00000000u)

/*----INTID Tokens----*/
#define CSL_UART_IIR_INTID_MODSTAT       (0x00000000u)
#define CSL_UART_IIR_INTID_THRE          (0x00000001u)
#define CSL_UART_IIR_INTID_RDA           (0x00000002u)
#define CSL_UART_IIR_INTID_RLS           (0x00000003u)
#define CSL_UART_IIR_INTID_CTI           (0x00000006u)

#define CSL_UART_IIR_IPEND_MASK          (0x00000001u)
#define CSL_UART_IIR_IPEND_SHIFT         (0x00000000u)
#define CSL_UART_IIR_IPEND_RESETVAL      (0x00000001u)

/*----IPEND Tokens----*/
#define CSL_UART_IIR_IPEND_NONE          (0x00000001u)

#define CSL_UART_IIR_RESETVAL            (0x00000001u)

/* FCR */

#define CSL_UART_FCR_RXFIFTL_MASK        (0x000000C0u)
#define CSL_UART_FCR_RXFIFTL_SHIFT       (0x00000006u)
#define CSL_UART_FCR_RXFIFTL_RESETVAL    (0x00000000u)

/*----RXFIFTL Tokens----*/
#define CSL_UART_FCR_RXFIFTL_CHAR1       (0x00000000u)
#define CSL_UART_FCR_RXFIFTL_CHAR4       (0x00000001u)
#define CSL_UART_FCR_RXFIFTL_CHAR8       (0x00000002u)
#define CSL_UART_FCR_RXFIFTL_CHAR14      (0x00000003u)

#define CSL_UART_FCR_DMAMODE1_MASK       (0x00000008u)
#define CSL_UART_FCR_DMAMODE1_SHIFT      (0x00000003u)
#define CSL_UART_FCR_DMAMODE1_RESETVAL   (0x00000000u)

/*----DMAMODE1 Tokens----*/
#define CSL_UART_FCR_DMAMODE1_DISABLE    (0x00000000u)
#define CSL_UART_FCR_DMAMODE1_ENABLE     (0x00000001u)

#define CSL_UART_FCR_TXCLR_MASK          (0x00000004u)
#define CSL_UART_FCR_TXCLR_SHIFT         (0x00000002u)
#define CSL_UART_FCR_TXCLR_RESETVAL      (0x00000000u)

/*----TXCLR Tokens----*/
#define CSL_UART_FCR_TXCLR_CLR           (0x00000001u)

#define CSL_UART_FCR_RXCLR_MASK          (0x00000002u)
#define CSL_UART_FCR_RXCLR_SHIFT         (0x00000001u)
#define CSL_UART_FCR_RXCLR_RESETVAL      (0x00000000u)

/*----RXCLR Tokens----*/
#define CSL_UART_FCR_RXCLR_CLR           (0x00000001u)

#define CSL_UART_FCR_FIFOEN_MASK         (0x00000001u)
#define CSL_UART_FCR_FIFOEN_SHIFT        (0x00000000u)
#define CSL_UART_FCR_FIFOEN_RESETVAL     (0x00000000u)

/*----FIFOEN Tokens----*/
#define CSL_UART_FCR_FIFOEN_DISABLE      (0x00000000u)
#define CSL_UART_FCR_FIFOEN_ENABLE       (0x00000001u)

#define CSL_UART_FCR_RESETVAL            (0x00000000u)

/* LCR */

#define CSL_UART_LCR_DLAB_MASK           (0x00000080u)
#define CSL_UART_LCR_DLAB_SHIFT          (0x00000007u)
#define CSL_UART_LCR_DLAB_RESETVAL       (0x00000000u)

#define CSL_UART_LCR_BC_MASK             (0x00000040u)
#define CSL_UART_LCR_BC_SHIFT            (0x00000006u)
#define CSL_UART_LCR_BC_RESETVAL         (0x00000000u)

/*----BC Tokens----*/
#define CSL_UART_LCR_BC_DISABLE          (0x00000000u)
#define CSL_UART_LCR_BC_ENABLE           (0x00000001u)

#define CSL_UART_LCR_SP_MASK             (0x00000020u)
#define CSL_UART_LCR_SP_SHIFT            (0x00000005u)
#define CSL_UART_LCR_SP_RESETVAL         (0x00000000u)

#define CSL_UART_LCR_EPS_MASK            (0x00000010u)
#define CSL_UART_LCR_EPS_SHIFT           (0x00000004u)
#define CSL_UART_LCR_EPS_RESETVAL        (0x00000000u)

#define CSL_UART_LCR_PEN_MASK            (0x00000008u)
#define CSL_UART_LCR_PEN_SHIFT           (0x00000003u)
#define CSL_UART_LCR_PEN_RESETVAL        (0x00000000u)