dianyabiao.analyze_file.qmsg

对adc0809的控制及数码管输出

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analyze Current File Quartus II " "Info: Running Quartus II Analyze Current File" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.2 Build 151 09/26/2007 SJ Full Version " "Info: Version 7.2 Build 151 09/26/2007 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_TIME" "Fri May 15 22:40:34 2009 " "Info: Processing started: Fri May 15 22:40:34 2009" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off dianyabiao -c dianyabiao --analyze_file=G:\\d电路\\EDA\\d电压表\\vhdl程序\\dianyabiao.vhd " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off dianyabiao -c dianyabiao --analyze_file=G:\\d电路\\EDA\\d电压表\\vhdl程序\\dianyabiao.vhd" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0}
{ "Error" "EVRFX_VHDL_SYNTAX_ERROR" "\";\";  expecting \"then\" dianyabiao.vhd(43) " "Error (10500): VHDL syntax error at dianyabiao.vhd(43) near text \";\";  expecting \"then\"" {  } { { "dianyabiao.vhd" "" { Text "G:/d电路/EDA/d电压表/vhdl程序/dianyabiao.vhd" 43 0 0 } }  } 0 10500 "VHDL syntax error at %2!s! near text %1!s!" 0 0 "" 0}
{ "Error" "EVRFX_VHDL_SYNTAX_ERROR" "\"case\";  expecting \";\" dianyabiao.vhd(67) " "Error (10500): VHDL syntax error at dianyabiao.vhd(67) near text \"case\";  expecting \";\"" {  } { { "dianyabiao.vhd" "" { Text "G:/d电路/EDA/d电压表/vhdl程序/dianyabiao.vhd" 67 0 0 } }  } 0 10500 "VHDL syntax error at %2!s! near text %1!s!" 0 0 "" 0}
{ "Error" "EVRFX_VHDL_SYNTAX_ERROR" "\"when\";  expecting \"end\", or \"(\", or an identifier (\"when\" is a reserved keyword), or a sequential statement dianyabiao.vhd(69) " "Error (10500): VHDL syntax error at dianyabiao.vhd(69) near text \"when\";  expecting \"end\", or \"(\", or an identifier (\"when\" is a reserved keyword), or a sequential statement" {  } { { "dianyabiao.vhd" "" { Text "G:/d电路/EDA/d电压表/vhdl程序/dianyabiao.vhd" 69 0 0 } }  } 0 10500 "VHDL syntax error at %2!s! near text %1!s!" 0 0 "" 0}
{ "Error" "EVRFX_VHDL_SYNTAX_ERROR" "\"when\";  expecting \"end\", or \"(\", or an identifier (\"when\" is a reserved keyword), or a sequential statement dianyabiao.vhd(70) " "Error (10500): VHDL syntax error at dianyabiao.vhd(70) near text \"when\";  expecting \"end\", or \"(\", or an identifier (\"when\" is a reserved keyword), or a sequential statement" {  } { { "dianyabiao.vhd" "" { Text "G:/d电路/EDA/d电压表/vhdl程序/dianyabiao.vhd" 70 0 0 } }  } 0 10500 "VHDL syntax error at %2!s! near text %1!s!" 0 0 "" 0}
{ "Error" "EVRFX_VHDL_SYNTAX_ERROR" "\"when\";  expecting \"end\", or \"(\", or an identifier (\"when\" is a reserved keyword), or a sequential statement dianyabiao.vhd(71) " "Error (10500): VHDL syntax error at dianyabiao.vhd(71) near text \"when\";  expecting \"end\", or \"(\", or an identifier (\"when\" is a reserved keyword), or a sequential statement" {  } { { "dianyabiao.vhd" "" { Text "G:/d电路/EDA/d电压表/vhdl程序/dianyabiao.vhd" 71 0 0 } }  } 0 10500 "VHDL syntax error at %2!s! near text %1!s!" 0 0 "" 0}
{ "Error" "EVRFX_VHDL_SYNTAX_ERROR" "\"when\";  expecting \"end\", or \"(\", or an identifier (\"when\" is a reserved keyword), or a sequential statement dianyabiao.vhd(75) " "Error (10500): VHDL syntax error at dianyabiao.vhd(75) near text \"when\";  expecting \"end\", or \"(\", or an identifier (\"when\" is a reserved keyword), or a sequential statement" {  } { { "dianyabiao.vhd" "" { Text "G:/d电路/EDA/d电压表/vhdl程序/dianyabiao.vhd" 75 0 0 } }  } 0 10500 "VHDL syntax error at %2!s! near text %1!s!" 0 0 "" 0}
{ "Error" "EVRFX_VHDL_SYNTAX_ERROR" "\"when\";  expecting \"end\", or \"(\", or an identifier (\"when\" is a reserved keyword), or a sequential statement dianyabiao.vhd(76) " "Error (10500): VHDL syntax error at dianyabiao.vhd(76) near text \"when\";  expecting \"end\", or \"(\", or an identifier (\"when\" is a reserved keyword), or a sequential statement" {  } { { "dianyabiao.vhd" "" { Text "G:/d电路/EDA/d电压表/vhdl程序/dianyabiao.vhd" 76 0 0 } }  } 0 10500 "VHDL syntax error at %2!s! near text %1!s!" 0 0 "" 0}
{ "Error" "EVRFX_VHDL_SYNTAX_ERROR" "\"when\";  expecting \"end\", or \"(\", or an identifier (\"when\" is a reserved keyword), or a sequential statement dianyabiao.vhd(77) " "Error (10500): VHDL syntax error at dianyabiao.vhd(77) near text \"when\";  expecting \"end\", or \"(\", or an identifier (\"when\" is a reserved keyword), or a sequential statement" {  } { { "dianyabiao.vhd" "" { Text "G:/d电路/EDA/d电压表/vhdl程序/dianyabiao.vhd" 77 0 0 } }  } 0 10500 "VHDL syntax error at %2!s! near text %1!s!" 0 0 "" 0}
{ "Error" "EVRFX_VHDL_SYNTAX_ERROR" "\"when\";  expecting \"end\", or \"(\", or an identifier (\"when\" is a reserved keyword), or a sequential statement dianyabiao.vhd(78) " "Error (10500): VHDL syntax error at dianyabiao.vhd(78) near text \"when\";  expecting \"end\", or \"(\", or an identifier (\"when\" is a reserved keyword), or a sequential statement" {  } { { "dianyabiao.vhd" "" { Text "G:/d电路/EDA/d电压表/vhdl程序/dianyabiao.vhd" 78 0 0 } }  } 0 10500 "VHDL syntax error at %2!s! near text %1!s!" 0 0 "" 0}
{ "Error" "EVRFX_VHDL_SYNTAX_ERROR" "\"when\";  expecting \"end\", or \"(\", or an identifier (\"when\" is a reserved keyword), or a sequential statement dianyabiao.vhd(79) " "Error (10500): VHDL syntax error at dianyabiao.vhd(79) near text \"when\";  expecting \"end\", or \"(\", or an identifier (\"when\" is a reserved keyword), or a sequential statement" {  } { { "dianyabiao.vhd" "" { Text "G:/d电路/EDA/d电压表/vhdl程序/dianyabiao.vhd" 79 0 0 } }  } 0 10500 "VHDL syntax error at %2!s! near text %1!s!" 0 0 "" 0}
{ "Error" "EVRFX_VHDL_SYNTAX_ERROR" "\"when\";  expecting \"end\", or \"(\", or an identifier (\"when\" is a reserved keyword), or a sequential statement dianyabiao.vhd(80) " "Error (10500): VHDL syntax error at dianyabiao.vhd(80) near text \"when\";  expecting \"end\", or \"(\", or an identifier (\"when\" is a reserved keyword), or a sequential statement" {  } { { "dianyabiao.vhd" "" { Text "G:/d电路/EDA/d电压表/vhdl程序/dianyabiao.vhd" 80 0 0 } }  } 0 10500 "VHDL syntax error at %2!s! near text %1!s!" 0 0 "" 0}
{ "Error" "EVRFX_VHDL_SYNTAX_ERROR" "\"when\";  expecting \"end\", or \"(\", or an identifier (\"when\" is a reserved keyword), or a sequential statement dianyabiao.vhd(81) " "Error (10500): VHDL syntax error at dianyabiao.vhd(81) near text \"when\";  expecting \"end\", or \"(\", or an identifier (\"when\" is a reserved keyword), or a sequential statement" {  } { { "dianyabiao.vhd" "" { Text "G:/d电路/EDA/d电压表/vhdl程序/dianyabiao.vhd" 81 0 0 } }  } 0 10500 "VHDL syntax error at %2!s! near text %1!s!" 0 0 "" 0}
{ "Error" "EVRFX_VHDL_SYNTAX_ERROR" "\"when\";  expecting \"end\", or \"(\", or an identifier (\"when\" is a reserved keyword), or a sequential statement dianyabiao.vhd(82) " "Error (10500): VHDL syntax error at dianyabiao.vhd(82) near text \"when\";  expecting \"end\", or \"(\", or an identifier (\"when\" is a reserved keyword), or a sequential statement" {  } { { "dianyabiao.vhd" "" { Text "G:/d电路/EDA/d电压表/vhdl程序/dianyabiao.vhd" 82 0 0 } }  } 0 10500 "VHDL syntax error at %2!s! near text %1!s!" 0 0 "" 0}
{ "Error" "EVRFX_VHDL_SYNTAX_ERROR" "\"when\";  expecting \"end\", or \"(\", or an identifier (\"when\" is a reserved keyword), or a sequential statement dianyabiao.vhd(83) " "Error (10500): VHDL syntax error at dianyabiao.vhd(83) near text \"when\";  expecting \"end\", or \"(\", or an identifier (\"when\" is a reserved keyword), or a sequential statement" {  } { { "dianyabiao.vhd" "" { Text "G:/d电路/EDA/d电压表/vhdl程序/dianyabiao.vhd" 83 0 0 } }  } 0 10500 "VHDL syntax error at %2!s! near text %1!s!" 0 0 "" 0}
{ "Error" "EVRFX_VHDL_SYNTAX_ERROR" "\"when\";  expecting \"end\", or \"(\", or an identifier (\"when\" is a reserved keyword), or a sequential statement dianyabiao.vhd(84) " "Error (10500): VHDL syntax error at dianyabiao.vhd(84) near text \"when\";  expecting \"end\", or \"(\", or an identifier (\"when\" is a reserved keyword), or a sequential statement" {  } { { "dianyabiao.vhd" "" { Text "G:/d电路/EDA/d电压表/vhdl程序/dianyabiao.vhd" 84 0 0 } }  } 0 10500 "VHDL syntax error at %2!s! near text %1!s!" 0 0 "" 0}
{ "Error" "EVRFX_VHDL_SYNTAX_ERROR" "\"when\";  expecting \"end\", or \"(\", or an identifier (\"when\" is a reserved keyword), or a sequential statement dianyabiao.vhd(85) " "Error (10500): VHDL syntax error at dianyabiao.vhd(85) near text \"when\";  expecting \"end\", or \"(\", or an identifier (\"when\" is a reserved keyword), or a sequential statement" {  } { { "dianyabiao.vhd" "" { Text "G:/d电路/EDA/d电压表/vhdl程序/dianyabiao.vhd" 85 0 0 } }  } 0 10500 "VHDL syntax error at %2!s! near text %1!s!" 0 0 "" 0}
{ "Error" "EVRFX_VHDL_SYNTAX_ERROR" "\"case\";  expecting \"process\" dianyabiao.vhd(86) " "Error (10500): VHDL syntax error at dianyabiao.vhd(86) near text \"case\";  expecting \"process\"" {  } { { "dianyabiao.vhd" "" { Text "G:/d电路/EDA/d电压表/vhdl程序/dianyabiao.vhd" 86 0 0 } }  } 0 10500 "VHDL syntax error at %2!s! near text %1!s!" 0 0 "" 0}
{ "Error" "EQEXE_ERROR_COUNT" "Analyze Current File 17 s 0 s Quartus II " "Error: Quartus II Analyze Current File was unsuccessful. 17 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "155 " "Info: Allocated 155 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0 "" 0} { "Error" "EQEXE_END_BANNER_TIME" "Fri May 15 22:40:37 2009 " "Error: Processing ended: Fri May 15 22:40:37 2009" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0} { "Error" "EQEXE_ELAPSED_TIME" "00:00:03 " "Error: Elapsed time: 00:00:03" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0}  } {  } 0 0 "%6!s! %1!s! was unsuccessful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}