dianyabiao.qsf

对adc0809的控制及数码管输出

# Copyright (C) 1991-2007 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files from any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		dianyabiao_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


set_global_assignment -name FAMILY ACEX1K
set_global_assignment -name DEVICE "EP1K50QC208-3"
set_global_assignment -name TOP_LEVEL_ENTITY dianyabiao
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 7.2
set_global_assignment -name PROJECT_CREATION_TIME_DATE "13:35:44  MAY 03, 2009"
set_global_assignment -name LAST_QUARTUS_VERSION 7.2
set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS OFF -section_id eda_palace
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 208
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 3
set_global_assignment -name VHDL_FILE dianyabiao.vhd
set_global_assignment -name VECTOR_WAVEFORM_FILE dianyabiao.vwf
set_global_assignment -name SIMULATION_MODE FUNCTIONAL
set_global_assignment -name INCREMENTAL_VECTOR_INPUT_SOURCE dianyabiao.vwf
set_location_assignment PIN_7 -to clk
set_location_assignment PIN_54 -to jiao[0]
set_location_assignment PIN_53 -to jiao[1]
set_location_assignment PIN_47 -to jiao[2]
set_location_assignment PIN_46 -to jiao[3]
set_location_assignment PIN_63 -to sent[0]
set_location_assignment PIN_62 -to sent[1]
set_location_assignment PIN_61 -to sent[2]
set_location_assignment PIN_60 -to sent[3]
set_location_assignment PIN_58 -to sent[4]
set_location_assignment PIN_57 -to sent[5]
set_location_assignment PIN_56 -to sent[6]
set_location_assignment PIN_55 -to sent[7]
set_global_assignment -name HEX_FILE romd.hex
set_global_assignment -name MIF_FILE romd.mif
set_global_assignment -name VHDL_FILE data_rom2.vhd
set_global_assignment -name HEX_FILE rom_4.hex
set_global_assignment -name HEX_FILE rom_3.hex
set_global_assignment -name HEX_FILE rom_2.hex
set_global_assignment -name HEX_FILE rom_1.hex
set_location_assignment PIN_8 -to abc_in[2]
set_location_assignment PIN_9 -to abc_in[1]
set_location_assignment PIN_10 -to abc_in[0]
set_location_assignment PIN_11 -to abc_out[2]
set_location_assignment PIN_12 -to abc_out[1]
set_location_assignment PIN_13 -to abc_out[0]
set_location_assignment PIN_36 -to ale
set_location_assignment PIN_31 -to start
set_location_assignment PIN_30 -to eoc
set_location_assignment PIN_28 -to en
set_location_assignment PIN_25 -to d[7]
set_location_assignment PIN_27 -to d[6]
set_location_assignment PIN_26 -to d[5]
set_location_assignment PIN_29 -to d[4]
set_location_assignment PIN_24 -to d[3]
set_location_assignment PIN_19 -to d[2]
set_location_assignment PIN_18 -to d[1]
set_location_assignment PIN_16 -to d[0]