zcq6.asm

一个大容量的FLASH存储器芯片的读写程序

	xrl	a,	#0dah
	jz	main20
	mov	a,	r2
	xrl	a,	#0aeh
	jz	main20
	lcall	delay15ms
	ljmp	main3
main23_a:
	ljmp	main23
main20:
	cpl	p2.2
	mov	a,	r2
	mov	sbuf,	a
	jnb	ti,	$
	clr	ti
main201:
	jb	bit_cse1,	main200
	clr	p2.0
	ljmp	main21
main200:
	clr	p2.1
main21:
	lcall	read_data
	setb	p2.0
	setb	p2.1
	jnb	bit_readep,	main201			;main22 
	clr	bit_readep
	setb	p2.1
	setb	p2.0
	setb	p2.2
	clr	p2.7
	clr	p1.5
	clr	p2.3
	mov	a,	#3ch
;	mov	p0,	a
	mov	rg_delay1,	#0ffh
	mov	rg_delay2,	#0Bh
	MOV	RG_DELAY3,	#0FFH
;	setb	bit_yy
	setb	bit_down_ok
	clr	bit_start
main22:
	lcall	delay15ms
	ljmp	main3
main23:
	jnb	p2.6,	main2_b
	clr	bit_down_ok
main3:
	ljmp	main10
main2_b:
	ljmp	main2
;***********************************
;read flash one_byte
;***********************************
read_mm36sb020_byte:
	mov	r7,	#08h
	clr	c
read_byte1:
	clr	flash_sclk
	setb	flash_sclk
	setb	flash_sdo
	mov	c,	flash_sdo
read_byte3:
	rrc	a
	djnz	r7,	read_byte1
	setb	flash_sdo
	clr	flash_sclk
	mov	r0,	#rg_sj1
	mov	@r0,	a
	ret
;************************************
;write flash one_byte
;************************************
write_mm36sb020_byte:
	mov	r7,	#08h
	mov	a,	@r0
	clr	c
write_byte1:
	clr	flash_sclk
	rrc	a
	mov	flash_sdi,	c
write_byte3:
	setb	flash_sclk
	djnz	r7,	write_byte1
	setb	flash_sdi
	clr	flash_sclk
	ret
;**************************************
write_status:
	mov	a,	#94h
	mov	r0,	#rg_sj1
	mov	@r0,	a
	lcall	write_mm36sb020_byte
write_status1:
	lcall	read_mm36sb020_byte
	mov	a,	rg_sj1
	jb	acc.0,	write_status
	ret
;*****************************************
read_data:
	clr	p2.0
	mov	a,	#00h
	mov	rg_flash_adrs,	a
	mov	a,	#01h
	mov	rg_flash_adrsl,	a
	clr	a
	mov	rg_flash_adrsh,	a
read_data0:
	mov	a,	#9ch
	mov	r0,	#rg_sj1 
	mov	@r0,	a
	lcall	write_mm36sb020_byte
	mov	r0,	#rg_sj1
	mov	a,	rg_flash_adrs
	mov	@r0,	a
	lcall	write_mm36sb020_byte
	mov	r0,	#rg_sj1
	mov	a,	rg_flash_adrsl
	mov	@r0,	a
	lcall	write_mm36sb020_byte
	mov	r0,	#rg_sj1
	mov	a,	rg_flash_adrsh
	mov	@r0,	a
	lcall	write_mm36sb020_byte
	lcall	read_mm36sb020_byte 
	mov	r0,	#rg_sj1
	mov	a,	@r0
	mov	sbuf,	a
	jnb	ti,	$
	clr	ti
	inc	rg_flash_adrs
	mov	a,	rg_flash_adrs
	cjne	a,	#80h,	read_data2
	mov	rg_flash_adrs,	#00h
	cpl	p2.2
	inc	rg_flash_adrsl
	mov	a,	rg_flash_adrsl
	cjne	a,	#0ffh,	read_data2
	inc	rg_flash_adrsh
	mov	a,	rg_flash_adrsh
	cjne	a,	#07h,	read_data2
	ljmp	read_data6
	jb	bit_cse1,	read_data6
	clr	a
	mov	rg_flash_adrs,	a
	mov	rg_flash_adrsl,	a
	mov	rg_flash_adrsh,	a
	clr	p2.1
	setb	p2.0
	setb	bit_cse1
read_data2:
	jb	bit_stop,	read_data6
	ljmp	read_data0				
read_end:
	ret
read_data6:
	clr	bit_stop
	clr	bit_cse1
	setb	bit_readep
	setb	p2.1
	clr	p2.0
	lcall	flash_ersc
	setb	p2.0
	clr	p2.1
	lcall	flash_ersc
	setb	p2.1
	clr	p2.0
	mov	a,	#00h
	mov	rg_adrs_jsq,	a
	mov	a,	#01h
	mov	rg_adrs_jsq1,	a
	clr	a
	mov	rg_adrs_jsq2,	a
	mov	a,	#01h
	mov	rg_adrs_cash,	a
	mov	r1,	#rg_adrs_jsq 
	mov	rg_address,	#00h
	lcall	write_address  
	setb	p2.0 
	ljmp	read_end 
;*********************************************
write_data:
	cpl	p2.2
	mov	rg_write_jsq,	#7fh		;80h
	mov	rg_write_jsq1,	#00h
write_data00: 
	mov	a,	#0a8h
	mov	r0,	#rg_sj1
	mov	@r0,	a
	lcall	write_mm36sb020_byte
	mov	a,	rg_adrs_jsq		;送页内地址
	mov	r0,	#rg_sj1
	mov	@r0,	a
	lcall	write_mm36sb020_byte
	mov	r0,	#rg_sj
	lcall	write_mm36sb020_byte
;	inc	rg_write_jsq1
;=========================================================
;地址记录程序
write_data01:
	mov	a,	rg_write_jsq
	jnz	write_data0
	setb	bit_tsbz
	setb	bit_tsbz1		;modify 06.06.07   	test	
;********************************************************
	mov	a,	#0b0h 
	mov	@r0,	a
	lcall	write_mm36sb020_byte
	mov	a,	rg_adrs_jsq1			;页低地址
	mov	r0,	#rg_sj1
	mov	@r0,	a
	lcall	write_mm36sb020_byte
	mov	a,	rg_adrs_jsq2			;页高地址
	mov	r0,	#rg_sj1
	mov	@r0,	a
	lcall	write_mm36sb020_byte 
	lcall	write_status
	mov	rg_adrs_jsq,	#00h	;modify 06.06.06	test
;*********************************************************	
	inc	rg_adrs_jsq1
	mov	rg_write_jsq,	#7fh		;80h
	mov	a,	rg_adrs_jsq1		
	cjne	a,	#0ffh,	write_data0
	inc	rg_adrs_jsq2			
	mov	a,	rg_adrs_jsq2		
	cjne	a,	#07h,	write_data0
	ljmp	write_data4
	jb	bit_cse,	write_data4a
	mov	rg_adrs_jsq,	#00h		
	mov	rg_adrs_jsq1,	#00h		
	mov	rg_adrs_jsq2,	#00h		
	mov	rg_cash,	#02h
	clr	p2.1
	setb	p2.0
	cpl	p2.2
	setb	bit_cse
write_data0:
	mov	rg_delay,	#0ffh
	clr	bit_time
write_data0b:
;	jb	bit_stop,	write_data1
	jnb	ri,	write_data3
	clr	ri
	mov	a,	sbuf
	mov	r0,	#rg_sj
	mov	@r0,	a
	clr	bit_tsbz1			;modify 06.06.07   test
	jb	bit_tsbz,	write_data4b	;modify 06.06.06   test
	dec	rg_write_jsq
	inc	rg_adrs_jsq			;modify 06.06.06   good
write_data03:
	ljmp	write_data00
write_data4a:
	ljmp	write_data4
write_data4b:				;test
	clr	bit_tsbz
	ljmp	write_data03
;***************************************
write_data3:
	jb	bit_time,	write_data30
	ljmp	write_data0b
write_data30:
	clr	bit_time
	clr	bit_tsbz
	jb	bit_tsbz1,	write_data1		
	mov	a,	rg_write_jsq
	jz	write_data310
	ljmp	write_data31
write_data310:
	mov	a,	#0b0h 
	mov	@r0,	a
	lcall	write_mm36sb020_byte
	mov	a,	rg_adrs_jsq1			;页低地址
	mov	r0,	#rg_sj1
	mov	@r0,	a
	lcall	write_mm36sb020_byte
	mov	a,	rg_adrs_jsq2			;页高地址
	mov	r0,	#rg_sj1
	mov	@r0,	a
	lcall	write_mm36sb020_byte 
	lcall	write_status	
	inc	rg_adrs_jsq1
	inc	rg_adrs_jsq
	ljmp	write_data1
write_data31:
	inc	rg_adrs_jsq
	mov	a,	#0a8h
	mov	r0,	#rg_sj1
	mov	@r0,	a
	lcall	write_mm36sb020_byte
	mov	a,	rg_adrs_jsq		;送页内地址
	mov	r0,	#rg_sj1
	mov	@r0,	a
	lcall	write_mm36sb020_byte
	mov	rg_sj,	#0ffh
	mov	r0,	#rg_sj
	lcall	write_mm36sb020_byte
	dec	rg_write_jsq
	mov	a,	rg_write_jsq
	jnz	write_data31
	ljmp	write_data310
;*******************************************
write_data1:
	clr	bit_stop
	setb	p2.1
	clr	p2.0
	mov	rg_address,	#00h
	mov	a,	rg_cash
	mov	rg_adrs_cash,	a
	mov	r1,	#rg_adrs_jsq
	lcall	write_address
	setb	p2.0
	clr	bit_time
	setb	bit_zcwc
write_data2: 
	ret
write_data4:
	clr	bit_cse
	mov	rg_adrs_jsq,	#00h		
	mov	rg_adrs_jsq1,	#01h		
	mov	rg_adrs_jsq2,	#00h		
	clr	bit_first
	ljmp	write_data1
;************************************************
write_address:
	mov	a,	#0a8h
	mov	r0,	#rg_sj1
	mov	@r0,	a
	lcall	write_mm36sb020_byte
	mov	a,	rg_address			;送页内地址
	mov	r0,	#rg_sj1
	mov	@r0,	a
	lcall	write_mm36sb020_byte
	mov	a,	@r1
	mov	r0,	#rg_sj1 
	mov	@r0,	a
	lcall	write_mm36sb020_byte
	mov	a,	rg_address
	xrl	a,	#04h
	jz	write_address1
	inc	r1
	inc	rg_address
	ljmp	write_address
write_address1:
	mov	a,	rg_address
	cjne	a,	#80h,	write_address2
	ljmp	write_address3
write_address2:
	mov	a,	#0a8h
	mov	r0,	#rg_sj1
	mov	@r0,	a
	lcall	write_mm36sb020_byte
	mov	a,	rg_address		;送页内地址
	mov	r0,	#rg_sj1
	mov	@r0,	a
	lcall	write_mm36sb020_byte
	mov	rg_sj,	#0ffh
	mov	r0,	#rg_sj
	lcall	write_mm36sb020_byte
	inc	rg_address
	ljmp	write_address1
write_address3:		
	mov	r0,	#rg_sj1
	mov	a,	#0b0h
	mov	@r0,	a
	lcall	write_mm36sb020_byte
	mov	a,	#00h
	mov	r0,	#rg_sj1
	mov	@r0,	a
	lcall	write_mm36sb020_byte
	mov	a,	#00h
	mov	r0,	#rg_sj1
	mov	@r0,	a
	lcall	write_mm36sb020_byte
	lcall	write_status
	mov	rg_address,	#00h 
	ret
;***********************************************
read_adress:
	mov	a,	#9ch
	mov	r0,	#rg_sj1
	mov	@r0,	a
	lcall	write_mm36sb020_byte
	mov	a,	rg_adress1			;页内地址
	mov	r0,	#rg_sj1 
	mov	@r0,	a
	lcall	write_mm36sb020_byte
	mov	a,	#00h		;页低地址
	mov	r0,	#rg_sj1
	mov	@r0,	a
	lcall	write_mm36sb020_byte
	mov	a,	#00h		;页高地址
	mov	r0,	#rg_sj1
	mov	@r0,	a
	lcall	write_mm36sb020_byte
	lcall	read_mm36sb020_byte
	mov	r0,	#rg_sj1
	mov	a,	@r0
	mov	@r1,	a
	inc	rg_adress1
	mov	a,	rg_adress1
	xrl	a,	#04h
	jz	read_adress1
	inc	r1
	ljmp	read_adress 
read_adress1:
	mov	rg_adress1,	#00h
	ret
;***********************************************
;调试程序
test_data:
;	clr	p2.0
	mov	r4,	#0ffh
	mov	r1,	#rg_cssj
	mov	rg_tssj,	#10h
	mov	rg_tssj1,	#01h
	mov	rg_tt,	#00h
	mov	rg_tt1,	#7fh
test_data1:
	mov	r0,	#rg_sj1
	mov	a,	#0a8h
	mov	@r0,	a
	mov	r0,	#rg_sj1
	lcall	write_mm36sb020_byte
	mov	a,	rg_tssj
	mov	r0,	#rg_sj1
	mov	@r0,	a
	lcall	write_mm36sb020_byte
	mov	a,	@r1
	mov	r0,	#rg_sj
	mov	@r0,	a
	lcall	write_mm36sb020_byte
	mov	a,	#0b0h
	mov	r0,	#rg_sj1
	mov	@r0,	a
	lcall	write_mm36sb020_byte
	mov	a,	rg_tssj1
	mov	r0,	#rg_sj1
	mov	@r0,	a
	lcall	write_mm36sb020_byte
	mov	a,	#00h
	mov	r0,	#rg_sj1
	mov	@r0,	a
	lcall	write_mm36sb020_byte
	lcall	write_status
	djnz	r4,	test_data10
	mov	a,	rg_tssj
	mov	rg_adrs_jsq,	a
	mov	a,	rg_tssj1
	mov	rg_adrs_jsq1,	a
	mov	rg_adrs_jsq2,	#00h
	mov	rg_adrs_cash,	#01h
	mov	r1,	#rg_adrs_jsq
	lcall	write_address 
	ljmp	test_data2
test_data10:
	inc	rg_tssj
	inc	r1
	inc	rg_tt
	mov	a,	rg_tt
	cjne	a,	#10h,	test_data12
	mov	r1,	#rg_cssj
	mov	rg_tt,	#00h
test_data12:
	dec	rg_tt1
	mov	a,	rg_tt1
	jnz	test_data13
	mov	rg_tt1,	#7fh
	inc	rg_tssj1
test_data13:	
	ljmp	test_data1
test_data2:
	ret
;***********************************************
data_comp:
	mov	a,	rg_sj
	cjne	a,	#0ddh,	data_comp1
	setb	bit_ok
	ljmp	data_end
data_comp1:
	cjne	a,	#0dbh,	data_comp2
	setb	bit_ok
	ljmp	data_end
data_comp2:
	cjne	a,	#0b3h,	data_comp4
	setb	bit_ok
	ljmp	data_end
data_comp4:
	cjne	a,	#0b9h,	data_comp5
	setb	bit_ok
	ljmp	data_end
data_comp5:
	cjne	a,	#0b2h,	data_comp6
	setb	bit_ok
	ljmp	data_end
data_comp6:
	cjne	a,	#0b8h,	data_comp7
	setb	bit_ok
	ljmp	data_end
data_comp7:
	cjne	a,	#0b1h,	data_comp8
	setb	bit_ok
	ljmp	data_end
data_comp8:
	cjne	a,	#0b7h,	data_comp9
	setb	bit_ok
	ljmp	data_end
data_comp9:
	cjne	a,	#0b0h,	data_comp10
	setb	bit_ok
	ljmp	data_end
data_comp10:
	cjne	a,	#0b6h,	data_comp11
	setb	bit_ok
	ljmp	data_end
data_comp11:
	cjne	a,	#0bah,	data_comp12
	setb	bit_ok
	ljmp	data_end
data_comp12:
	cjne	a,	#0bbh,	data_comp13
	setb	bit_ok
	ljmp	data_end
data_comp13:
	clr	bit_ok
data_end:
	ret
;**********************************************
flash_ersc:
	mov	a,	#0f6h
	mov	r0,	#rg_sj1
	mov	@r0,	a
	lcall	write_mm36sb020_byte
	mov	a,	#90h
	mov	r0,	#rg_sj1
	mov	@r0,	a
	lcall	write_mm36sb020_byte
	lcall	write_status
	ret
;************************************************
	end