eng_padlock.c

OpenSSL 0.9.8k 最新版OpenSSL

static inline void
padlock_verify_context(struct padlock_cipher_data *cdata)
{
	asm volatile (
	"pushfl\n"
"	btl	$30,(%%esp)\n"
"	jnc	1f\n"
"	cmpl	%2,%1\n"
"	je	1f\n"
"	popfl\n"
"	subl	$4,%%esp\n"
"1:	addl	$4,%%esp\n"
"	movl	%2,%0"
	:"+m"(padlock_saved_context)
	: "r"(padlock_saved_context), "r"(cdata) : "cc");
}

/* Template for padlock_xcrypt_* modes */
/* BIG FAT WARNING: 
 * 	The offsets used with 'leal' instructions
 * 	describe items of the 'padlock_cipher_data'
 * 	structure.
 */
#define PADLOCK_XCRYPT_ASM(name,rep_xcrypt)	\
static inline void *name(size_t cnt,		\
	struct padlock_cipher_data *cdata,	\
	void *out, const void *inp) 		\
{	void *iv; 				\
	asm volatile ( "pushl	%%ebx\n"	\
		"	leal	16(%0),%%edx\n"	\
		"	leal	32(%0),%%ebx\n"	\
			rep_xcrypt "\n"		\
		"	popl	%%ebx"		\
		: "=a"(iv), "=c"(cnt), "=D"(out), "=S"(inp) \
		: "0"(cdata), "1"(cnt), "2"(out), "3"(inp)  \
		: "edx", "cc", "memory");	\
	return iv;				\
}

/* Generate all functions with appropriate opcodes */
PADLOCK_XCRYPT_ASM(padlock_xcrypt_ecb, ".byte 0xf3,0x0f,0xa7,0xc8")	/* rep xcryptecb */
PADLOCK_XCRYPT_ASM(padlock_xcrypt_cbc, ".byte 0xf3,0x0f,0xa7,0xd0")	/* rep xcryptcbc */
PADLOCK_XCRYPT_ASM(padlock_xcrypt_cfb, ".byte 0xf3,0x0f,0xa7,0xe0")	/* rep xcryptcfb */
PADLOCK_XCRYPT_ASM(padlock_xcrypt_ofb, ".byte 0xf3,0x0f,0xa7,0xe8")	/* rep xcryptofb */
#endif

/* The RNG call itself */
static inline unsigned int
padlock_xstore(void *addr, unsigned int edx_in)
{
	unsigned int eax_out;

	asm volatile (".byte 0x0f,0xa7,0xc0"	/* xstore */
	    : "=a"(eax_out),"=m"(*(unsigned *)addr)
	    : "D"(addr), "d" (edx_in)
	    );

	return eax_out;
}

/* Why not inline 'rep movsd'? I failed to find information on what
 * value in Direction Flag one can expect and consequently have to
 * apply "better-safe-than-sorry" approach and assume "undefined."
 * I could explicitly clear it and restore the original value upon
 * return from padlock_aes_cipher, but it's presumably too much
 * trouble for too little gain...
 *
 * In case you wonder 'rep xcrypt*' instructions above are *not*
 * affected by the Direction Flag and pointers advance toward
 * larger addresses unconditionally.
 */ 
static inline unsigned char *
padlock_memcpy(void *dst,const void *src,size_t n)
{
	long       *d=dst;
	const long *s=src;

	n /= sizeof(*d);
	do { *d++ = *s++; } while (--n);

	return dst;
}

#elif defined(_MSC_VER)
/*
 * Unlike GCC these are real functions. In order to minimize impact
 * on performance we adhere to __fastcall calling convention in
 * order to get two first arguments passed through %ecx and %edx.
 * Which kind of suits very well, as instructions in question use
 * both %ecx and %edx as input:-)
 */
#define REP_XCRYPT(code)		\
	_asm _emit 0xf3			\
	_asm _emit 0x0f _asm _emit 0xa7	\
	_asm _emit code

/* BIG FAT WARNING: 
 * 	The offsets used with 'lea' instructions
 * 	describe items of the 'padlock_cipher_data'
 * 	structure.
 */
#define PADLOCK_XCRYPT_ASM(name,code)	\
static void * __fastcall 		\
	name (size_t cnt, void *cdata,	\
	void *outp, const void *inp)	\
{	_asm	mov	eax,edx		\
	_asm	lea	edx,[eax+16]	\
	_asm	lea	ebx,[eax+32]	\
	_asm	mov	edi,outp	\
	_asm	mov	esi,inp		\
	REP_XCRYPT(code)		\
}

PADLOCK_XCRYPT_ASM(padlock_xcrypt_ecb,0xc8)
PADLOCK_XCRYPT_ASM(padlock_xcrypt_cbc,0xd0)
PADLOCK_XCRYPT_ASM(padlock_xcrypt_cfb,0xe0)
PADLOCK_XCRYPT_ASM(padlock_xcrypt_ofb,0xe8)

static int __fastcall
padlock_xstore(void *outp,unsigned int code)
{	_asm	mov	edi,ecx
	_asm _emit 0x0f _asm _emit 0xa7 _asm _emit 0xc0
}

static void __fastcall
padlock_reload_key(void)
{	_asm pushfd _asm popfd		}

static void __fastcall
padlock_verify_context(void *cdata)
{	_asm	{
		pushfd
		bt	DWORD PTR[esp],30
		jnc	skip
		cmp	ecx,padlock_saved_context
		je	skip
		popfd
		sub	esp,4
	skip:	add	esp,4
		mov	padlock_saved_context,ecx
		}
}

static int
padlock_available(void)
{	_asm	{
		pushfd
		pop	eax
		mov	ecx,eax
		xor	eax,1<<21
		push	eax
		popfd
		pushfd
		pop	eax
		xor	eax,ecx
		bt	eax,21
		jnc	noluck
		mov	eax,0
		cpuid
		xor	eax,eax
		cmp	ebx,'tneC'
		jne	noluck
		cmp	edx,'Hrua'
		jne	noluck
		cmp	ecx,'slua'
		jne	noluck
		mov	eax,0xC0000000
		cpuid
		mov	edx,eax
		xor	eax,eax
		cmp	edx,0xC0000001
		jb	noluck
		mov	eax,0xC0000001
		cpuid
		xor	eax,eax
		bt	edx,6
		jnc	skip_a
		bt	edx,7
		jnc	skip_a
		mov	padlock_use_ace,1
		inc	eax
	skip_a:	bt	edx,2
		jnc	skip_r
		bt	edx,3
		jnc	skip_r
		mov	padlock_use_rng,1
		inc	eax
	skip_r:
	noluck:
		}
}

static void __fastcall
padlock_bswapl(void *key)
{	_asm	{
		pushfd
		cld
		mov	esi,ecx
		mov	edi,ecx
		mov	ecx,60
	up:	lodsd
		bswap	eax
		stosd
		loop	up
		popfd
		}
}

/* MS actually specifies status of Direction Flag and compiler even
 * manages to compile following as 'rep movsd' all by itself...
 */
#define padlock_memcpy(o,i,n) ((unsigned char *)memcpy((o),(i),(n)&~3U))
#endif

/* ===== AES encryption/decryption ===== */
#ifndef OPENSSL_NO_AES

#if defined(NID_aes_128_cfb128) && ! defined (NID_aes_128_cfb)
#define NID_aes_128_cfb	NID_aes_128_cfb128
#endif

#if defined(NID_aes_128_ofb128) && ! defined (NID_aes_128_ofb)
#define NID_aes_128_ofb	NID_aes_128_ofb128
#endif

#if defined(NID_aes_192_cfb128) && ! defined (NID_aes_192_cfb)
#define NID_aes_192_cfb	NID_aes_192_cfb128
#endif

#if defined(NID_aes_192_ofb128) && ! defined (NID_aes_192_ofb)
#define NID_aes_192_ofb	NID_aes_192_ofb128
#endif

#if defined(NID_aes_256_cfb128) && ! defined (NID_aes_256_cfb)
#define NID_aes_256_cfb	NID_aes_256_cfb128
#endif

#if defined(NID_aes_256_ofb128) && ! defined (NID_aes_256_ofb)
#define NID_aes_256_ofb	NID_aes_256_ofb128
#endif

/* List of supported ciphers. */
static int padlock_cipher_nids[] = {
	NID_aes_128_ecb,
	NID_aes_128_cbc,
	NID_aes_128_cfb,
	NID_aes_128_ofb,

	NID_aes_192_ecb,
	NID_aes_192_cbc,
	NID_aes_192_cfb,
	NID_aes_192_ofb,

	NID_aes_256_ecb,
	NID_aes_256_cbc,
	NID_aes_256_cfb,
	NID_aes_256_ofb,
};
static int padlock_cipher_nids_num = (sizeof(padlock_cipher_nids)/
				      sizeof(padlock_cipher_nids[0]));

/* Function prototypes ... */
static int padlock_aes_init_key(EVP_CIPHER_CTX *ctx, const unsigned char *key,
				const unsigned char *iv, int enc);
static int padlock_aes_cipher(EVP_CIPHER_CTX *ctx, unsigned char *out,
			      const unsigned char *in, size_t nbytes);

#define NEAREST_ALIGNED(ptr) ( (unsigned char *)(ptr) +		\
	( (0x10 - ((size_t)(ptr) & 0x0F)) & 0x0F )	)
#define ALIGNED_CIPHER_DATA(ctx) ((struct padlock_cipher_data *)\
	NEAREST_ALIGNED(ctx->cipher_data))

#define EVP_CIPHER_block_size_ECB	AES_BLOCK_SIZE
#define EVP_CIPHER_block_size_CBC	AES_BLOCK_SIZE
#define EVP_CIPHER_block_size_OFB	1
#define EVP_CIPHER_block_size_CFB	1

/* Declaring so many ciphers by hand would be a pain.
   Instead introduce a bit of preprocessor magic :-) */
#define	DECLARE_AES_EVP(ksize,lmode,umode)	\
static const EVP_CIPHER padlock_aes_##ksize##_##lmode = {	\
	NID_aes_##ksize##_##lmode,		\
	EVP_CIPHER_block_size_##umode,	\
	AES_KEY_SIZE_##ksize,		\
	AES_BLOCK_SIZE,			\
	0 | EVP_CIPH_##umode##_MODE,	\
	padlock_aes_init_key,		\
	padlock_aes_cipher,		\
	NULL,				\
	sizeof(struct padlock_cipher_data) + 16,	\
	EVP_CIPHER_set_asn1_iv,		\
	EVP_CIPHER_get_asn1_iv,		\
	NULL,				\
	NULL				\
}

DECLARE_AES_EVP(128,ecb,ECB);
DECLARE_AES_EVP(128,cbc,CBC);
DECLARE_AES_EVP(128,cfb,CFB);
DECLARE_AES_EVP(128,ofb,OFB);

DECLARE_AES_EVP(192,ecb,ECB);
DECLARE_AES_EVP(192,cbc,CBC);
DECLARE_AES_EVP(192,cfb,CFB);
DECLARE_AES_EVP(192,ofb,OFB);

DECLARE_AES_EVP(256,ecb,ECB);
DECLARE_AES_EVP(256,cbc,CBC);
DECLARE_AES_EVP(256,cfb,CFB);
DECLARE_AES_EVP(256,ofb,OFB);

static int
padlock_ciphers (ENGINE *e, const EVP_CIPHER **cipher, const int **nids, int nid)
{
	/* No specific cipher => return a list of supported nids ... */
	if (!cipher) {
		*nids = padlock_cipher_nids;
		return padlock_cipher_nids_num;
	}

	/* ... or the requested "cipher" otherwise */
	switch (nid) {
	  case NID_aes_128_ecb:
	    *cipher = &padlock_aes_128_ecb;
	    break;
	  case NID_aes_128_cbc:
	    *cipher = &padlock_aes_128_cbc;
	    break;
	  case NID_aes_128_cfb:
	    *cipher = &padlock_aes_128_cfb;
	    break;
	  case NID_aes_128_ofb:
	    *cipher = &padlock_aes_128_ofb;
	    break;

	  case NID_aes_192_ecb:
	    *cipher = &padlock_aes_192_ecb;
	    break;
	  case NID_aes_192_cbc:
	    *cipher = &padlock_aes_192_cbc;
	    break;
	  case NID_aes_192_cfb:
	    *cipher = &padlock_aes_192_cfb;
	    break;
	  case NID_aes_192_ofb:
	    *cipher = &padlock_aes_192_ofb;
	    break;

	  case NID_aes_256_ecb:
	    *cipher = &padlock_aes_256_ecb;
	    break;
	  case NID_aes_256_cbc:
	    *cipher = &padlock_aes_256_cbc;
	    break;
	  case NID_aes_256_cfb:
	    *cipher = &padlock_aes_256_cfb;
	    break;
	  case NID_aes_256_ofb:
	    *cipher = &padlock_aes_256_ofb;
	    break;

	  default:
	    /* Sorry, we don't support this NID */
	    *cipher = NULL;
	    return 0;
	}

	return 1;
}

/* Prepare the encryption key for PadLock usage */
static int
padlock_aes_init_key (EVP_CIPHER_CTX *ctx, const unsigned char *key,
		      const unsigned char *iv, int enc)
{
	struct padlock_cipher_data *cdata;
	int key_len = EVP_CIPHER_CTX_key_length(ctx) * 8;

	if (key==NULL) return 0;	/* ERROR */

	cdata = ALIGNED_CIPHER_DATA(ctx);
	memset(cdata, 0, sizeof(struct padlock_cipher_data));

	/* Prepare Control word. */
	if (EVP_CIPHER_CTX_mode(ctx) == EVP_CIPH_OFB_MODE)
		cdata->cword.b.encdec = 0;
	else
		cdata->cword.b.encdec = (ctx->encrypt == 0);
	cdata->cword.b.rounds = 10 + (key_len - 128) / 32;
	cdata->cword.b.ksize = (key_len - 128) / 64;

	switch(key_len) {
		case 128:
			/* PadLock can generate an extended key for
			   AES128 in hardware */
			memcpy(cdata->ks.rd_key, key, AES_KEY_SIZE_128);
			cdata->cword.b.keygen = 0;
			break;

		case 192:
		case 256:
			/* Generate an extended AES key in software.
			   Needed for AES192/AES256 */
			/* Well, the above applies to Stepping 8 CPUs
			   and is listed as hardware errata. They most
			   likely will fix it at some point and then
			   a check for stepping would be due here. */