📄 mpc8560ads.h
字号:
#define CFG_PROMPT_HUSH_PS2 "> "#endif/* pass open firmware flat tree */#define CONFIG_OF_FLAT_TREE 1#define CONFIG_OF_BOARD_SETUP 1/* maximum size of the flat tree (8K) */#define OF_FLAT_TREE_MAX_SIZE 8192#define OF_CPU "PowerPC,8560@0"#define OF_SOC "soc8560@e0000000"#define OF_TBCLK (bd->bi_busfreq / 8)#define OF_STDOUT_PATH "/soc8560@e0000000/serial@4500"/* * I2C */#define CONFIG_FSL_I2C /* Use FSL common I2C driver */#define CONFIG_HARD_I2C /* I2C with hardware support*/#undef CONFIG_SOFT_I2C /* I2C bit-banged */#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */#define CFG_I2C_SLAVE 0x7F#define CFG_I2C_NOPROBES {0x69} /* Don't probe these addrs */#define CFG_I2C_OFFSET 0x3000/* RapidIO MMU */#define CFG_RIO_MEM_BASE 0xc0000000 /* base address */#define CFG_RIO_MEM_PHYS CFG_RIO_MEM_BASE#define CFG_RIO_MEM_SIZE 0x20000000 /* 128M *//* * General PCI * Addresses are mapped 1-1. */#define CFG_PCI1_MEM_BASE 0x80000000#define CFG_PCI1_MEM_PHYS CFG_PCI1_MEM_BASE#define CFG_PCI1_MEM_SIZE 0x20000000 /* 512M */#define CFG_PCI1_IO_BASE 0xe2000000#define CFG_PCI1_IO_PHYS CFG_PCI1_IO_BASE#define CFG_PCI1_IO_SIZE 0x1000000 /* 16M */#if defined(CONFIG_PCI)#define CONFIG_NET_MULTI#define CONFIG_PCI_PNP /* do pci plug-and-play */#undef CONFIG_EEPRO100#undef CONFIG_TULIP#if !defined(CONFIG_PCI_PNP) #define PCI_ENET0_IOADDR 0xe0000000 #define PCI_ENET0_MEMADDR 0xe0000000 #define PCI_IDSEL_NUMBER 0x0c /* slot0->3(IDSEL)=12->15 */#endif#undef CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */#define CFG_PCI_SUBSYS_VENDORID 0x1057 /* Motorola */#endif /* CONFIG_PCI */#if defined(CONFIG_TSEC_ENET)#ifndef CONFIG_NET_MULTI#define CONFIG_NET_MULTI 1#endif#define CONFIG_MII 1 /* MII PHY management */#define CONFIG_MPC85XX_TSEC1 1#define CONFIG_MPC85XX_TSEC1_NAME "TSEC0"#define CONFIG_MPC85XX_TSEC2 1#define CONFIG_MPC85XX_TSEC2_NAME "TSEC1"#undef CONFIG_MPC85XX_FEC#define TSEC1_PHY_ADDR 0#define TSEC2_PHY_ADDR 1#define TSEC1_PHYIDX 0#define TSEC2_PHYIDX 0/* Options are: TSEC[0-1] */#define CONFIG_ETHPRIME "TSEC0"#elif defined(CONFIG_ETHER_ON_FCC) /* CPM FCC Ethernet */#define CONFIG_ETHER_ON_FCC /* define if ether on FCC */#undef CONFIG_ETHER_NONE /* define if ether on something else */#define CONFIG_ETHER_INDEX 2 /* which channel for ether */#if (CONFIG_ETHER_INDEX == 2) /* * - Rx-CLK is CLK13 * - Tx-CLK is CLK14 * - Select bus for bd/buffers * - Full duplex */ #define CFG_CMXFCR_MASK (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK) #define CFG_CMXFCR_VALUE (CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14) #define CFG_CPMFCR_RAMTYPE 0 #define CFG_FCC_PSMR (FCC_PSMR_FDE) #define FETH2_RST 0x01#elif (CONFIG_ETHER_INDEX == 3) /* need more definitions here for FE3 */ #define FETH3_RST 0x80#endif /* CONFIG_ETHER_INDEX */#define CONFIG_MII /* MII PHY management */#define CONFIG_BITBANGMII /* bit-bang MII PHY management *//* * GPIO pins used for bit-banged MII communications */#define MDIO_PORT 2 /* Port C */#define MDIO_ACTIVE (iop->pdir |= 0x00400000)#define MDIO_TRISTATE (iop->pdir &= ~0x00400000)#define MDIO_READ ((iop->pdat & 0x00400000) != 0)#define MDIO(bit) if(bit) iop->pdat |= 0x00400000; \ else iop->pdat &= ~0x00400000#define MDC(bit) if(bit) iop->pdat |= 0x00200000; \ else iop->pdat &= ~0x00200000#define MIIDELAY udelay(1)#endif/* * Environment */#ifndef CFG_RAMBOOT #define CFG_ENV_IS_IN_FLASH 1 #define CFG_ENV_ADDR (CFG_MONITOR_BASE + 0x40000) #define CFG_ENV_SECT_SIZE 0x40000 /* 256K(one sector) for env */ #define CFG_ENV_SIZE 0x2000#else #define CFG_NO_FLASH 1 /* Flash is not usable now */ #define CFG_ENV_IS_NOWHERE 1 /* Store ENV in memory only */ #define CFG_ENV_ADDR (CFG_MONITOR_BASE - 0x1000) #define CFG_ENV_SIZE 0x2000#endif#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */#if defined(CFG_RAMBOOT) #if defined(CONFIG_PCI) #define CONFIG_COMMANDS ((CONFIG_CMD_DFL \ | CFG_CMD_PING \ | CFG_CMD_PCI \ | CFG_CMD_I2C) \ & \ ~(CFG_CMD_ENV \ | CFG_CMD_LOADS)) #elif defined(CONFIG_TSEC_ENET) #define CONFIG_COMMANDS ((CONFIG_CMD_DFL \ | CFG_CMD_PING \ | CFG_CMD_I2C) \ & ~(CFG_CMD_ENV)) #elif defined(CONFIG_ETHER_ON_FCC) #define CONFIG_COMMANDS ((CONFIG_CMD_DFL \ | CFG_CMD_MII \ | CFG_CMD_PING \ | CFG_CMD_I2C) \ & ~(CFG_CMD_ENV)) #endif#else #if defined(CONFIG_PCI) #define CONFIG_COMMANDS (CONFIG_CMD_DFL \ | CFG_CMD_PCI \ | CFG_CMD_PING \ | CFG_CMD_I2C) #elif defined(CONFIG_TSEC_ENET) #define CONFIG_COMMANDS (CONFIG_CMD_DFL \ | CFG_CMD_PING \ | CFG_CMD_I2C) #elif defined(CONFIG_ETHER_ON_FCC) #define CONFIG_COMMANDS (CONFIG_CMD_DFL \ | CFG_CMD_MII \ | CFG_CMD_PING \ | CFG_CMD_I2C) #endif#endif#include <cmd_confdefs.h>#undef CONFIG_WATCHDOG /* watchdog disabled *//* * Miscellaneous configurable options */#define CFG_LONGHELP /* undef to save memory */#define CFG_LOAD_ADDR 0x1000000 /* default load address */#define CFG_PROMPT "=> " /* Monitor Command Prompt */#if (CONFIG_COMMANDS & CFG_CMD_KGDB) #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */#else #define CFG_CBSIZE 256 /* Console I/O Buffer Size */#endif#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */#define CFG_MAXARGS 16 /* max number of command args */#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */#define CFG_HZ 1000 /* decrementer freq: 1ms ticks *//* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*//* Cache Configuration */#define CFG_DCACHE_SIZE 32768#define CFG_CACHELINE_SIZE 32#if (CONFIG_COMMANDS & CFG_CMD_KGDB)#define CFG_CACHELINE_SHIFT 5 /*log base 2 of the above value*/#endif/* * Internal Definitions * * Boot Flags */#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */#define BOOTFLAG_WARM 0x02 /* Software reboot */#if (CONFIG_COMMANDS & CFG_CMD_KGDB)#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */#endif/* * Environment Configuration *//* The mac addresses for all ethernet interface */#if defined(CONFIG_TSEC_ENET) || defined(CONFIG_ETHER_ON_FCC)#define CONFIG_ETHADDR 00:E0:0C:00:00:FD#define CONFIG_HAS_ETH1#define CONFIG_ETH1ADDR 00:E0:0C:00:01:FD#define CONFIG_HAS_ETH2#define CONFIG_ETH2ADDR 00:E0:0C:00:02:FD#endif#define CONFIG_IPADDR 192.168.1.253#define CONFIG_HOSTNAME unknown#define CONFIG_ROOTPATH /nfsroot#define CONFIG_BOOTFILE your.uImage#define CONFIG_SERVERIP 192.168.1.1#define CONFIG_GATEWAYIP 192.168.1.1#define CONFIG_NETMASK 255.255.255.0#define CONFIG_LOADADDR 200000 /* default location for tftp and bootm */#define CONFIG_BOOTDELAY 10 /* -1 disables auto-boot */#undef CONFIG_BOOTARGS /* the boot command will set bootargs */#define CONFIG_BAUDRATE 115200#define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "consoledev=ttyS0\0" \ "ramdiskaddr=400000\0" \ "ramdiskfile=your.ramdisk.u-boot\0"#define CONFIG_NFSBOOTCOMMAND \ "setenv bootargs root=/dev/nfs rw " \ "nfsroot=$serverip:$rootpath " \ "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \ "console=$consoledev,$baudrate $othbootargs;" \ "tftp $loadaddr $bootfile;" \ "bootm $loadaddr"#define CONFIG_RAMBOOTCOMMAND \ "setenv bootargs root=/dev/ram rw " \ "console=$consoledev,$baudrate $othbootargs;" \ "tftp $ramdiskaddr $ramdiskfile;" \ "tftp $loadaddr $bootfile;" \ "bootm $loadaddr $ramdiskaddr"#define CONFIG_BOOTCOMMAND CONFIG_NFSBOOTCOMMAND#endif /* __CONFIG_H */
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -