📄 tqm834x.h
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#define PCI_ENET0_MEMADDR CFG_PCI1_MEM_BASE #define PCI_IDSEL_NUMBER 0x1c /* slot0 (IDSEL) = 28 */#endif#define CFG_PCI_SUBSYS_VENDORID 0x1957 /* Freescale */#endif /* CONFIG_PCI *//* * Environment */#define CONFIG_ENV_OVERWRITE#ifndef CFG_RAMBOOT #define CFG_ENV_IS_IN_FLASH 1 #define CFG_ENV_ADDR (CFG_MONITOR_BASE + 0x40000) #define CFG_ENV_SECT_SIZE 0x20000 /* 256K(one sector) for env */ #define CFG_ENV_SIZE 0x2000#else #define CFG_NO_FLASH 1 /* Flash is not usable now */ #define CFG_ENV_IS_NOWHERE 1 /* Store ENV in memory only */ #define CFG_ENV_ADDR (CFG_MONITOR_BASE - 0x1000) #define CFG_ENV_SIZE 0x2000#endif#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change *//* Common commands */#define CFG_CMD_TQM8349_COMMON CFG_CMD_DATE | CFG_CMD_I2C | CFG_CMD_DTT\ | CFG_CMD_PING | CFG_CMD_EEPROM \ | CFG_CMD_MII | CFG_CMD_JFFS2#if defined(CFG_RAMBOOT)#if defined(CONFIG_PCI)#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_PCI \ | CFG_CMD_TQM8349_COMMON) \ & \ ~(CFG_CMD_ENV | CFG_CMD_LOADS))#else#define CONFIG_COMMANDS ((CONFIG_CMD_DFL \ | CFG_CMD_TQM8349_COMMON) \ & \ ~(CFG_CMD_ENV | CFG_CMD_LOADS))#endif#else /* CFG_RAMBOOT */#if defined(CONFIG_PCI)#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_PCI \ | CFG_CMD_TQM8349_COMMON)#else#define CONFIG_COMMANDS (CONFIG_CMD_DFL \ | CFG_CMD_TQM8349_COMMON)#endif#endif /* CFG_RAMBOOT */#include <cmd_confdefs.h>/* * Miscellaneous configurable options */#define CFG_LONGHELP /* undef to save memory */#define CFG_LOAD_ADDR 0x2000000 /* default load address */#define CFG_PROMPT "=> " /* Monitor Command Prompt */#define CONFIG_CMDLINE_EDITING 1 /* add command line history */#define CFG_HUSH_PARSER 1 /* Use the HUSH parser */#ifdef CFG_HUSH_PARSER#define CFG_PROMPT_HUSH_PS2 "> "#endif#if (CONFIG_COMMANDS & CFG_CMD_KGDB) #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */#else #define CFG_CBSIZE 256 /* Console I/O Buffer Size */#endif#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */#define CFG_MAXARGS 16 /* max number of command args */#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */#define CFG_HZ 1000 /* decrementer freq: 1ms ticks */#undef CONFIG_WATCHDOG /* watchdog disabled *//* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*//* * Cache Configuration */#define CFG_DCACHE_SIZE 32768#define CFG_CACHELINE_SIZE 32#if (CONFIG_COMMANDS & CFG_CMD_KGDB)#define CFG_CACHELINE_SHIFT 5 /*log base 2 of the above value*/#endif#define CFG_HRCW_LOW (\ HRCWL_LCL_BUS_TO_SCB_CLK_1X1 |\ HRCWL_DDR_TO_SCB_CLK_1X1 |\ HRCWL_CSB_TO_CLKIN_4X1 |\ HRCWL_VCO_1X2 |\ HRCWL_CORE_TO_CSB_2X1)#if defined(PCI_64BIT)#define CFG_HRCW_HIGH (\ HRCWH_PCI_HOST |\ HRCWH_64_BIT_PCI |\ HRCWH_PCI1_ARBITER_ENABLE |\ HRCWH_PCI2_ARBITER_DISABLE |\ HRCWH_CORE_ENABLE |\ HRCWH_FROM_0X00000100 |\ HRCWH_BOOTSEQ_DISABLE |\ HRCWH_SW_WATCHDOG_DISABLE |\ HRCWH_ROM_LOC_LOCAL_16BIT |\ HRCWH_TSEC1M_IN_GMII |\ HRCWH_TSEC2M_IN_GMII )#else#define CFG_HRCW_HIGH (\ HRCWH_PCI_HOST |\ HRCWH_32_BIT_PCI |\ HRCWH_PCI1_ARBITER_ENABLE |\ HRCWH_PCI2_ARBITER_DISABLE |\ HRCWH_CORE_ENABLE |\ HRCWH_FROM_0X00000100 |\ HRCWH_BOOTSEQ_DISABLE |\ HRCWH_SW_WATCHDOG_DISABLE |\ HRCWH_ROM_LOC_LOCAL_16BIT |\ HRCWH_TSEC1M_IN_GMII |\ HRCWH_TSEC2M_IN_GMII )#endif/* System IO Config */#define CFG_SICRH SICRH_TSOBI1#define CFG_SICRL SICRL_LDP_A/* i-cache and d-cache disabled */#define CFG_HID0_INIT 0x000000000#define CFG_HID0_FINAL CFG_HID0_INIT#define CFG_HID2 HID2_HBE/* DDR 0 - 512M */#define CFG_IBAT0L (CFG_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)#define CFG_IBAT0U (CFG_SDRAM_BASE | BATU_BL_256M | BATU_VS | BATU_VP)#define CFG_IBAT1L (CFG_SDRAM_BASE + 0x10000000 | BATL_PP_10 | BATL_MEMCOHERENCE)#define CFG_IBAT1U (CFG_SDRAM_BASE + 0x10000000 | BATU_BL_256M | BATU_VS | BATU_VP)/* stack in DCACHE @ 512M (no backing mem) */#define CFG_IBAT2L (CFG_INIT_RAM_ADDR | BATL_PP_10 | BATL_MEMCOHERENCE)#define CFG_IBAT2U (CFG_INIT_RAM_ADDR | BATU_BL_128K | BATU_VS | BATU_VP)/* PCI */#ifdef CONFIG_PCI#define CFG_IBAT3L (CFG_PCI1_MEM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)#define CFG_IBAT3U (CFG_PCI1_MEM_BASE | BATU_BL_256M | BATU_VS | BATU_VP)#define CFG_IBAT4L (CFG_PCI1_MEM_BASE + 0x10000000 | BATL_PP_10 | BATL_MEMCOHERENCE)#define CFG_IBAT4U (CFG_PCI1_MEM_BASE + 0x10000000 | BATU_BL_256M | BATU_VS | BATU_VP)#define CFG_IBAT5L (CFG_PCI1_IO_BASE | BATL_PP_10 | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)#define CFG_IBAT5U (CFG_PCI1_IO_BASE + 0x10000000 | BATU_BL_16M | BATU_VS | BATU_VP)#else#define CFG_IBAT3L (0)#define CFG_IBAT3U (0)#define CFG_IBAT4L (0)#define CFG_IBAT4U (0)#define CFG_IBAT5L (0)#define CFG_IBAT5U (0)#endif/* IMMRBAR */#define CFG_IBAT6L (CFG_IMMRBAR | BATL_PP_10 | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)#define CFG_IBAT6U (CFG_IMMRBAR | BATU_BL_1M | BATU_VS | BATU_VP)/* FLASH */#define CFG_IBAT7L (CFG_FLASH_BASE | BATL_PP_10 | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)#define CFG_IBAT7U (CFG_FLASH_BASE | BATU_BL_256M | BATU_VS | BATU_VP)#define CFG_DBAT0L CFG_IBAT0L#define CFG_DBAT0U CFG_IBAT0U#define CFG_DBAT1L CFG_IBAT1L#define CFG_DBAT1U CFG_IBAT1U#define CFG_DBAT2L CFG_IBAT2L#define CFG_DBAT2U CFG_IBAT2U#define CFG_DBAT3L CFG_IBAT3L#define CFG_DBAT3U CFG_IBAT3U#define CFG_DBAT4L CFG_IBAT4L#define CFG_DBAT4U CFG_IBAT4U#define CFG_DBAT5L CFG_IBAT5L#define CFG_DBAT5U CFG_IBAT5U#define CFG_DBAT6L CFG_IBAT6L#define CFG_DBAT6U CFG_IBAT6U#define CFG_DBAT7L CFG_IBAT7L#define CFG_DBAT7U CFG_IBAT7U/* * Internal Definitions * * Boot Flags */#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */#define BOOTFLAG_WARM 0x02 /* Software reboot */#if (CONFIG_COMMANDS & CFG_CMD_KGDB)#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */#endif/* * Environment Configuration */#if defined(CONFIG_TSEC_ENET)#define CONFIG_ETHADDR D2:DA:5E:44:BC:29#define CONFIG_HAS_ETH1#define CONFIG_ETH1ADDR 1E:F3:40:21:92:53#endif#define CONFIG_IPADDR 192.168.205.1#define CONFIG_HOSTNAME tqm8349#define CONFIG_ROOTPATH /opt/eldk/ppc_6xx#define CONFIG_BOOTFILE /tftpboot/tqm83xx/uImage#define CONFIG_SERVERIP 192.168.1.1#define CONFIG_GATEWAYIP 192.168.1.1#define CONFIG_NETMASK 255.255.255.0#define CONFIG_LOADADDR 200000 /* default location for tftp and bootm */#define CONFIG_BOOTDELAY 6 /* -1 disables auto-boot */#undef CONFIG_BOOTARGS /* the boot command will set bootargs */#define CONFIG_BAUDRATE 115200#define CONFIG_PREBOOT "echo;" \ "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \ "echo"#undef CONFIG_BOOTARGS#define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "hostname=tqm83xx\0" \ "nfsargs=setenv bootargs root=/dev/nfs rw " \ "nfsroot=${serverip}:${rootpath}\0" \ "ramargs=setenv bootargs root=/dev/ram rw\0" \ "addip=setenv bootargs ${bootargs} " \ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ ":${hostname}:${netdev}:off panic=1\0" \ "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0"\ "flash_nfs=run nfsargs addip addtty;" \ "bootm ${kernel_addr}\0" \ "flash_self=run ramargs addip addtty;" \ "bootm ${kernel_addr} ${ramdisk_addr}\0" \ "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;" \ "bootm\0" \ "rootpath=/opt/eldk/ppc_6xx\0" \ "bootfile=/tftpboot/tqm83xx/uImage\0" \ "kernel_addr=80060000\0" \ "ramdisk_addr=80160000\0" \ "load=tftp 100000 /tftpboot/tqm83xx/u-boot.bin\0" \ "update=protect off 80000000 8003ffff; " \ "era 80000000 8003ffff; cp.b 100000 80000000 40000\0" \ "upd=run load;run update\0" \ ""#define CONFIG_BOOTCOMMAND "run flash_self"/* * JFFS2 partitions *//* mtdparts command line support */#define CONFIG_JFFS2_CMDLINE#define MTDIDS_DEFAULT "nor0=TQM834x-0"/* default mtd partition table */#define MTDPARTS_DEFAULT "mtdparts=TQM834x-0:256k(u-boot),128k(env),"\ "1m(kernel),2m(initrd),"\ "-(user);"\#endif /* __CONFIG_H */⌨️ 快捷键说明
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