mpc8260ads.h

嵌入式试验箱S3C2410的bootloader源代码

/*
 * (C) Copyright 2001
 * Stuart Hughes <[e-mail]>
 * This file is based on similar values for other boards found in other
 * U-Boot config files, and some that I found in the mpc8260ads manual.
 *
 * Note: my board is a PILOT rev.
 * Note: the mpc8260ads doesn't come with a proper Ethernet MAC address.
 *
 * (C) Copyright 2003-2004 Arabella Software Ltd.
 * Yuli Barcohen <[e-mail]>
 * Added support for SDRAM DIMMs SPD EEPROM, MII, JFFS2.
 * Ported to PQ2FADS-ZU and PQ2FADS-VR boards.
 * Ported to MPC8272ADS board.
 *
 * Copyright (c) 2005 MontaVista Software, Inc.
 * Vitaly Bordug <[e-mail]>
 * Added support for PCI bridge on MPC8272ADS
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/*
 * High Level Configuration Options
 * (easy to change)
 */

#define CONFIG_MPC8260ADS	1	/* Motorola PQ2 ADS family board */

#define CONFIG_CPM2		1	/* Has a CPM2 */

/*
 * Figure out if we are booting low via flash HRCW or high via the BCSR.
 */
#if (TEXT_BASE != 0xFFF00000)		/* Boot low (flash HRCW) */
#   define CFG_LOWBOOT		1
#endif

/* ADS flavours */
#define CFG_8260ADS		1	/* MPC8260ADS */
#define CFG_8266ADS		2	/* MPC8266ADS */
#define CFG_PQ2FADS		3	/* PQ2FADS-ZU or PQ2FADS-VR */
#define CFG_8272ADS		4	/* MPC8272ADS */

#ifndef CONFIG_ADSTYPE
#define CONFIG_ADSTYPE		CFG_8260ADS
#endif /* CONFIG_ADSTYPE */

#if CONFIG_ADSTYPE == CFG_8272ADS
#define CONFIG_MPC8272		1
#else
#define CONFIG_MPC8260		1
#endif /* CONFIG_ADSTYPE == CFG_8272ADS */

#define CONFIG_BOARD_EARLY_INIT_F 1	/* Call board_early_init_f	*/

/* allow serial and ethaddr to be overwritten */
#define CONFIG_ENV_OVERWRITE

/*
 * select serial console configuration
 *
 * if either CONFIG_CONS_ON_SMC or CONFIG_CONS_ON_SCC is selected, then
 * CONFIG_CONS_INDEX must be set to the channel number (1-2 for SMC, 1-4
 * for SCC).
 *
 * if CONFIG_CONS_NONE is defined, then the serial console routines must
 * defined elsewhere (for example, on the cogent platform, there are serial
 * ports on the motherboard which are used for the serial console - see
 * cogent/cma101/serial.[ch]).
 */
#undef	CONFIG_CONS_ON_SMC		/* define if console on SMC */
#define CONFIG_CONS_ON_SCC		/* define if console on SCC */
#undef	CONFIG_CONS_NONE		/* define if console on something else */
#define CONFIG_CONS_INDEX	1	/* which serial channel for console */

/*
 * select ethernet configuration
 *
 * if either CONFIG_ETHER_ON_SCC or CONFIG_ETHER_ON_FCC is selected, then
 * CONFIG_ETHER_INDEX must be set to the channel number (1-4 for SCC, 1-3
 * for FCC)
 *
 * if CONFIG_ETHER_NONE is defined, then either the ethernet routines must be
 * defined elsewhere (as for the console), or CFG_CMD_NET must be removed
 * from CONFIG_COMMANDS to remove support for networking.
 */
#undef	CONFIG_ETHER_ON_SCC		/* define if ether on SCC   */
#define CONFIG_ETHER_ON_FCC		/* define if ether on FCC   */
#undef	CONFIG_ETHER_NONE		/* define if ether on something else */

#ifdef CONFIG_ETHER_ON_FCC

#define CONFIG_ETHER_INDEX	2	/* which SCC/FCC channel for ethernet */

#if   CONFIG_ETHER_INDEX == 1

# define CFG_PHY_ADDR		0
# define CFG_CMXFCR_VALUE	(CMXFCR_RF1CS_CLK11 | CMXFCR_TF1CS_CLK10)
# define CFG_CMXFCR_MASK	(CMXFCR_FC1 | CMXFCR_RF1CS_MSK | CMXFCR_TF1CS_MSK)

#elif CONFIG_ETHER_INDEX == 2

#if CONFIG_ADSTYPE == CFG_8272ADS	/* RxCLK is CLK15, TxCLK is CLK16 */
# define CFG_PHY_ADDR		3
# define CFG_CMXFCR_VALUE	(CMXFCR_RF2CS_CLK15 | CMXFCR_TF2CS_CLK16)
#else					/* RxCLK is CLK13, TxCLK is CLK14 */
# define CFG_PHY_ADDR		0
# define CFG_CMXFCR_VALUE	(CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14)
#endif /* CONFIG_ADSTYPE == CFG_8272ADS */

# define CFG_CMXFCR_MASK	(CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK)

#endif	/* CONFIG_ETHER_INDEX */

#define CFG_CPMFCR_RAMTYPE	0		/* BDs and buffers on 60x bus */
#define CFG_FCC_PSMR		(FCC_PSMR_FDE | FCC_PSMR_LPB)  /* Full duplex */

#define CONFIG_MII			/* MII PHY management		*/
#define CONFIG_BITBANGMII		/* bit-bang MII PHY management	*/
/*
 * GPIO pins used for bit-banged MII communications
 */
#define MDIO_PORT	2		/* Port C */

#if CONFIG_ADSTYPE == CFG_8272ADS
#define CFG_MDIO_PIN	0x00002000	/* PC18 */
#define CFG_MDC_PIN	0x00001000	/* PC19 */
#else
#define CFG_MDIO_PIN	0x00400000	/* PC9	*/
#define CFG_MDC_PIN	0x00200000	/* PC10 */
#endif /* CONFIG_ADSTYPE == CFG_8272ADS */

#define MDIO_ACTIVE	(iop->pdir |=  CFG_MDIO_PIN)
#define MDIO_TRISTATE	(iop->pdir &= ~CFG_MDIO_PIN)
#define MDIO_READ	((iop->pdat &  CFG_MDIO_PIN) != 0)

#define MDIO(bit)	if(bit) iop->pdat |=  CFG_MDIO_PIN; \
			else	iop->pdat &= ~CFG_MDIO_PIN

#define MDC(bit)	if(bit) iop->pdat |=  CFG_MDC_PIN; \
			else	iop->pdat &= ~CFG_MDC_PIN

#define MIIDELAY	udelay(1)

#endif /* CONFIG_ETHER_ON_FCC */

#if CONFIG_ADSTYPE >= CFG_PQ2FADS
#undef CONFIG_SPD_EEPROM	/* On new boards, SDRAM is soldered */
#else
#define CONFIG_HARD_I2C		1	/* To enable I2C support	*/
#define CFG_I2C_SPEED		100000	/* I2C speed and slave address	*/
#define CFG_I2C_SLAVE		0x7F

#if defined(CONFIG_SPD_EEPROM) && !defined(CONFIG_SPD_ADDR)
#define CONFIG_SPD_ADDR		0x50
#endif
#endif /* CONFIG_ADSTYPE >= CFG_PQ2FADS */

/*PCI*/
#ifdef CONFIG_MPC8272
#define CONFIG_PCI
#define CONFIG_PCI_PNP
#define CONFIG_PCI_BOOTDELAY 0
#define CONFIG_PCI_SCAN_SHOW
#endif

#ifndef CONFIG_SDRAM_PBI
#define CONFIG_SDRAM_PBI	0 /* By default, use bank-based interleaving */
#endif

#ifndef CONFIG_8260_CLKIN
#if CONFIG_ADSTYPE >= CFG_PQ2FADS
#define CONFIG_8260_CLKIN	100000000	/* in Hz */
#else
#define CONFIG_8260_CLKIN	66000000	/* in Hz */
#endif
#endif

#define CONFIG_BAUDRATE		115200

#define CFG_EXCLUDE		CFG_CMD_BEDBUG	| \
				CFG_CMD_BMP	| \
				CFG_CMD_BSP	| \
				CFG_CMD_DATE	| \
				CFG_CMD_DISPLAY | \
				CFG_CMD_DOC	| \
				CFG_CMD_DTT	| \
				CFG_CMD_EEPROM	| \
				CFG_CMD_ELF	| \
				CFG_CMD_EXT2	| \
				CFG_CMD_FAT	| \
				CFG_CMD_FDC	| \
				CFG_CMD_FDOS	| \
				CFG_CMD_HWFLOW	| \
				CFG_CMD_IDE	| \
				CFG_CMD_KGDB	| \
				CFG_CMD_MMC	| \
				CFG_CMD_NAND	| \
				CFG_CMD_PCMCIA	| \
				CFG_CMD_REISER	| \
				CFG_CMD_SCSI	| \
				CFG_CMD_SPI	| \
				CFG_CMD_SNTP	| \
				CFG_CMD_UNIVERSE | \
				CFG_CMD_USB	| \
				CFG_CMD_VFD	| \
				CFG_CMD_XIMG

#if CONFIG_ADSTYPE == CFG_8272ADS
#define CONFIG_COMMANDS		(CFG_CMD_ALL & ~( \
			         CFG_CMD_SDRAM	| \
				 CFG_CMD_I2C	| \
				 CFG_EXCLUDE	) )
#elif CONFIG_ADSTYPE >= CFG_PQ2FADS
#define CONFIG_COMMANDS		(CFG_CMD_ALL & ~( \
				 CFG_CMD_SDRAM	| \
				 CFG_CMD_I2C	| \
				 CFG_CMD_PCI	| \
				 CFG_EXCLUDE	) )
#else
#define CONFIG_COMMANDS		(CFG_CMD_ALL & ~( \
				 CMD_CFG_PCI 	| \
				 CFG_EXCLUDE 	) )
#endif /* CONFIG_ADSTYPE >= CFG_PQ2FADS */

/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>

#define CONFIG_BOOTDELAY	5		/* autoboot after 5 seconds */
#define CONFIG_BOOTCOMMAND	"bootm fff80000"	/* autoboot command */
#define CONFIG_BOOTARGS		"root=/dev/mtdblock2"

#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
#undef	CONFIG_KGDB_ON_SMC		/* define if kgdb on SMC */
#define CONFIG_KGDB_ON_SCC		/* define if kgdb on SCC */