📄 inca-ip.h
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#define INCA_IP_BCU_BCU_CON_SPE (1 << 19)#define INCA_IP_BCU_BCU_CON_PSE (1 << 18)#define INCA_IP_BCU_BCU_CON_DBG (1 << 16)#define INCA_IP_BCU_BCU_CON_TOUT (value) (((( 1 << 16) - 1) & (value)) << 0)/***BCU Error Control Capture Register (0020H)***/#define INCA_IP_BCU_BCU_ECON ((volatile u32*)(INCA_IP_BCU+ 0x0020))#define INCA_IP_BCU_BCU_ECON_TAG (value) (((( 1 << 4) - 1) & (value)) << 24)#define INCA_IP_BCU_BCU_ECON_RDN (1 << 23)#define INCA_IP_BCU_BCU_ECON_WRN (1 << 22)#define INCA_IP_BCU_BCU_ECON_SVM (1 << 21)#define INCA_IP_BCU_BCU_ECON_ACK (value) (((( 1 << 2) - 1) & (value)) << 19)#define INCA_IP_BCU_BCU_ECON_ABT (1 << 18)#define INCA_IP_BCU_BCU_ECON_RDY (1 << 17)#define INCA_IP_BCU_BCU_ECON_TOUT (1 << 16)#define INCA_IP_BCU_BCU_ECON_ERRCNT (value) (((( 1 << 16) - 1) & (value)) << 0)#define INCA_IP_BCU_BCU_ECON_OPC (value) (((( 1 << 4) - 1) & (value)) << 28)/***BCU Error Address Capture Register (0024 H)***/#define INCA_IP_BCU_BCU_EADD ((volatile u32*)(INCA_IP_BCU+ 0x0024))#define INCA_IP_BCU_BCU_EADD_FPIADR/***BCU Error Data Capture Register (0028H)***/#define INCA_IP_BCU_BCU_EDAT ((volatile u32*)(INCA_IP_BCU+ 0x0028))#define INCA_IP_BCU_BCU_EDAT_FPIDAT/***********************************************************************//* Module : MBC register address and bits *//***********************************************************************/#define INCA_IP_MBC (0xBF103000)/***********************************************************************//***Mailbox CPU Configuration Register***/#define INCA_IP_MBC_MBC_CFG ((volatile u32*)(INCA_IP_MBC+ 0x0080))#define INCA_IP_MBC_MBC_CFG_SWAP (value) (((( 1 << 2) - 1) & (value)) << 6)#define INCA_IP_MBC_MBC_CFG_RES (1 << 5)#define INCA_IP_MBC_MBC_CFG_FWID (value) (((( 1 << 4) - 1) & (value)) << 1)#define INCA_IP_MBC_MBC_CFG_SIZE (1 << 0)/***Mailbox CPU Interrupt Status Register***/#define INCA_IP_MBC_MBC_ISR ((volatile u32*)(INCA_IP_MBC+ 0x0084))#define INCA_IP_MBC_MBC_ISR_B3DA (1 << 31)#define INCA_IP_MBC_MBC_ISR_B2DA (1 << 30)#define INCA_IP_MBC_MBC_ISR_B1E (1 << 29)#define INCA_IP_MBC_MBC_ISR_B0E (1 << 28)#define INCA_IP_MBC_MBC_ISR_WDT (1 << 27)#define INCA_IP_MBC_MBC_ISR_DS260 (value) (((( 1 << 27) - 1) & (value)) << 0)/***Mailbox CPU Mask Register***/#define INCA_IP_MBC_MBC_MSK ((volatile u32*)(INCA_IP_MBC+ 0x0088))#define INCA_IP_MBC_MBC_MSK_B3DA (1 << 31)#define INCA_IP_MBC_MBC_MSK_B2DA (1 << 30)#define INCA_IP_MBC_MBC_MSK_B1E (1 << 29)#define INCA_IP_MBC_MBC_MSK_B0E (1 << 28)#define INCA_IP_MBC_MBC_MSK_WDT (1 << 27)#define INCA_IP_MBC_MBC_MSK_DS260 (value) (((( 1 << 27) - 1) & (value)) << 0)/***Mailbox CPU Mask 01 Register***/#define INCA_IP_MBC_MBC_MSK01 ((volatile u32*)(INCA_IP_MBC+ 0x008C))#define INCA_IP_MBC_MBC_MSK01_B3DA (1 << 31)#define INCA_IP_MBC_MBC_MSK01_B2DA (1 << 30)#define INCA_IP_MBC_MBC_MSK01_B1E (1 << 29)#define INCA_IP_MBC_MBC_MSK01_B0E (1 << 28)#define INCA_IP_MBC_MBC_MSK01_WDT (1 << 27)#define INCA_IP_MBC_MBC_MSK01_DS260 (value) (((( 1 << 27) - 1) & (value)) << 0)/***Mailbox CPU Mask 10 Register***/#define INCA_IP_MBC_MBC_MSK10 ((volatile u32*)(INCA_IP_MBC+ 0x0090))#define INCA_IP_MBC_MBC_MSK10_B3DA (1 << 31)#define INCA_IP_MBC_MBC_MSK10_B2DA (1 << 30)#define INCA_IP_MBC_MBC_MSK10_B1E (1 << 29)#define INCA_IP_MBC_MBC_MSK10_B0E (1 << 28)#define INCA_IP_MBC_MBC_MSK10_WDT (1 << 27)#define INCA_IP_MBC_MBC_MSK10_DS260 (value) (((( 1 << 27) - 1) & (value)) << 0)/***Mailbox CPU Short Command Register***/#define INCA_IP_MBC_MBC_CMD ((volatile u32*)(INCA_IP_MBC+ 0x0094))#define INCA_IP_MBC_MBC_CMD_CS270 (value) (((( 1 << 28) - 1) & (value)) << 0)/***Mailbox CPU Input Data of Buffer 0***/#define INCA_IP_MBC_MBC_ID0 ((volatile u32*)(INCA_IP_MBC+ 0x0000))#define INCA_IP_MBC_MBC_ID0_INDATA/***Mailbox CPU Input Data of Buffer 1***/#define INCA_IP_MBC_MBC_ID1 ((volatile u32*)(INCA_IP_MBC+ 0x0020))#define INCA_IP_MBC_MBC_ID1_INDATA/***Mailbox CPU Output Data of Buffer 2***/#define INCA_IP_MBC_MBC_OD2 ((volatile u32*)(INCA_IP_MBC+ 0x0040))#define INCA_IP_MBC_MBC_OD2_OUTDATA/***Mailbox CPU Output Data of Buffer 3***/#define INCA_IP_MBC_MBC_OD3 ((volatile u32*)(INCA_IP_MBC+ 0x0060))#define INCA_IP_MBC_MBC_OD3_OUTDATA/***Mailbox CPU Control Register of Buffer 0***/#define INCA_IP_MBC_MBC_CR0 ((volatile u32*)(INCA_IP_MBC+ 0x0004))#define INCA_IP_MBC_MBC_CR0_RDYABTFLS (value) (((( 1 << 3) - 1) & (value)) << 0)/***Mailbox CPU Control Register of Buffer 1***/#define INCA_IP_MBC_MBC_CR1 ((volatile u32*)(INCA_IP_MBC+ 0x0024))#define INCA_IP_MBC_MBC_CR1_RDYABTFLS (value) (((( 1 << 3) - 1) & (value)) << 0)/***Mailbox CPU Control Register of Buffer 2***/#define INCA_IP_MBC_MBC_CR2 ((volatile u32*)(INCA_IP_MBC+ 0x0044))#define INCA_IP_MBC_MBC_CR2_RDYABTFLS (value) (((( 1 << 3) - 1) & (value)) << 0)/***Mailbox CPU Control Register of Buffer 3***/#define INCA_IP_MBC_MBC_CR3 ((volatile u32*)(INCA_IP_MBC+ 0x0064))#define INCA_IP_MBC_MBC_CR3_RDYABTFLS (value) (((( 1 << 3) - 1) & (value)) << 0)/***Mailbox CPU Free Space of Buffer 0***/#define INCA_IP_MBC_MBC_FS0 ((volatile u32*)(INCA_IP_MBC+ 0x0008))#define INCA_IP_MBC_MBC_FS0_FS/***Mailbox CPU Free Space of Buffer 1***/#define INCA_IP_MBC_MBC_FS1 ((volatile u32*)(INCA_IP_MBC+ 0x0028))#define INCA_IP_MBC_MBC_FS1_FS/***Mailbox CPU Free Space of Buffer 2***/#define INCA_IP_MBC_MBC_FS2 ((volatile u32*)(INCA_IP_MBC+ 0x0048))#define INCA_IP_MBC_MBC_FS2_FS/***Mailbox CPU Free Space of Buffer 3***/#define INCA_IP_MBC_MBC_FS3 ((volatile u32*)(INCA_IP_MBC+ 0x0068))#define INCA_IP_MBC_MBC_FS3_FS/***Mailbox CPU Data Available in Buffer 0***/#define INCA_IP_MBC_MBC_DA0 ((volatile u32*)(INCA_IP_MBC+ 0x000C))#define INCA_IP_MBC_MBC_DA0_DA/***Mailbox CPU Data Available in Buffer 1***/#define INCA_IP_MBC_MBC_DA1 ((volatile u32*)(INCA_IP_MBC+ 0x002C))#define INCA_IP_MBC_MBC_DA1_DA/***Mailbox CPU Data Available in Buffer 2***/#define INCA_IP_MBC_MBC_DA2 ((volatile u32*)(INCA_IP_MBC+ 0x004C))#define INCA_IP_MBC_MBC_DA2_DA/***Mailbox CPU Data Available in Buffer 3***/#define INCA_IP_MBC_MBC_DA3 ((volatile u32*)(INCA_IP_MBC+ 0x006C))#define INCA_IP_MBC_MBC_DA3_DA/***Mailbox CPU Input Absolute Pointer of Buffer 0***/#define INCA_IP_MBC_MBC_IABS0 ((volatile u32*)(INCA_IP_MBC+ 0x0010))#define INCA_IP_MBC_MBC_IABS0_IABS/***Mailbox CPU Input Absolute Pointer of Buffer 1***/#define INCA_IP_MBC_MBC_IABS1 ((volatile u32*)(INCA_IP_MBC+ 0x0030))#define INCA_IP_MBC_MBC_IABS1_IABS/***Mailbox CPU Input Absolute Pointer of Buffer 2***/#define INCA_IP_MBC_MBC_IABS2 ((volatile u32*)(INCA_IP_MBC+ 0x0050))#define INCA_IP_MBC_MBC_IABS2_IABS/***Mailbox CPU Input Absolute Pointer of Buffer 3***/#define INCA_IP_MBC_MBC_IABS3 ((volatile u32*)(INCA_IP_MBC+ 0x0070))#define INCA_IP_MBC_MBC_IABS3_IABS/***Mailbox CPU Input Temporary Pointer of Buffer 0***/#define INCA_IP_MBC_MBC_ITMP0 ((volatile u32*)(INCA_IP_MBC+ 0x0014))#define INCA_IP_MBC_MBC_ITMP0_ITMP/***Mailbox CPU Input Temporary Pointer of Buffer 1***/#define INCA_IP_MBC_MBC_ITMP1 ((volatile u32*)(INCA_IP_MBC+ 0x0034))#define INCA_IP_MBC_MBC_ITMP1_ITMP/***Mailbox CPU Input Temporary Pointer of Buffer 2***/#define INCA_IP_MBC_MBC_ITMP2 ((volatile u32*)(INCA_IP_MBC+ 0x0054))#define INCA_IP_MBC_MBC_ITMP2_ITMP/***Mailbox CPU Input Temporary Pointer of Buffer 3***/#define INCA_IP_MBC_MBC_ITMP3 ((volatile u32*)(INCA_IP_MBC+ 0x0074))#define INCA_IP_MBC_MBC_ITMP3_ITMP/***Mailbox CPU Output Absolute Pointer of Buffer 0***/#define INCA_IP_MBC_MBC_OABS0 ((volatile u32*)(INCA_IP_MBC+ 0x0018))#define INCA_IP_MBC_MBC_OABS0_OABS/***Mailbox CPU Output Absolute Pointer of Buffer 1***/#define INCA_IP_MBC_MBC_OABS1 ((volatile u32*)(INCA_IP_MBC+ 0x0038))#define INCA_IP_MBC_MBC_OABS1_OABS/***Mailbox CPU Output Absolute Pointer of Buffer 2***/#define INCA_IP_MBC_MBC_OABS2 ((volatile u32*)(INCA_IP_MBC+ 0x0058))#define INCA_IP_MBC_MBC_OABS2_OABS/***Mailbox CPU Output Absolute Pointer of Buffer 3***/#define INCA_IP_MBC_MBC_OABS3 ((volatile u32*)(INCA_IP_MBC+ 0x0078))#define INCA_IP_MBC_MBC_OABS3_OABS/***Mailbox CPU Output Temporary Pointer of Buffer 0***/#define INCA_IP_MBC_MBC_OTMP0 ((volatile u32*)(INCA_IP_MBC+ 0x001C))#define INCA_IP_MBC_MBC_OTMP0_OTMP/***Mailbox CPU Output Temporary Pointer of Buffer 1***/#define INCA_IP_MBC_MBC_OTMP1 ((volatile u32*)(INCA_IP_MBC+ 0x003C))#define INCA_IP_MBC_MBC_OTMP1_OTMP/***Mailbox CPU Output Temporary Pointer of Buffer 2***/#define INCA_IP_MBC_MBC_OTMP2 ((volatile u32*)(INCA_IP_MBC+ 0x005C))#define INCA_IP_MBC_MBC_OTMP2_OTMP/***Mailbox CPU Output Temporary Pointer of Buffer 3***/#define INCA_IP_MBC_MBC_OTMP3 ((volatile u32*)(INCA_IP_MBC+ 0x007C))#define INCA_IP_MBC_MBC_OTMP3_OTMP/***DSP Control Register***/#define INCA_IP_MBC_DCTRL ((volatile u32*)(INCA_IP_MBC+ 0x00A0))#define INCA_IP_MBC_DCTRL_BA (1 << 0)#define INCA_IP_MBC_DCTRL_BMOD (value) (((( 1 << 3) - 1) & (value)) << 1)#define INCA_IP_MBC_DCTRL_IDL (1 << 4)#define INCA_IP_MBC_DCTRL_RES (1 << 15)/***DSP Status Register***/#define INCA_IP_MBC_DSTA ((volatile u32*)(INCA_IP_MBC+ 0x00A4))⌨️ 快捷键说明
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