📄 core_cm3.lst
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462:lib/CMSIS/Core/CM3/core_cm3.c ****
463:lib/CMSIS/Core/CM3/core_cm3.c **** /**
464:lib/CMSIS/Core/CM3/core_cm3.c **** * @brief Set the Process Stack Pointer
465:lib/CMSIS/Core/CM3/core_cm3.c **** *
466:lib/CMSIS/Core/CM3/core_cm3.c **** * @param uint32_t Process Stack Pointer
467:lib/CMSIS/Core/CM3/core_cm3.c **** * @return none
468:lib/CMSIS/Core/CM3/core_cm3.c **** *
469:lib/CMSIS/Core/CM3/core_cm3.c **** * Assign the value ProcessStackPointer to the MSP
470:lib/CMSIS/Core/CM3/core_cm3.c **** * (process stack pointer) Cortex processor register
471:lib/CMSIS/Core/CM3/core_cm3.c **** */
472:lib/CMSIS/Core/CM3/core_cm3.c **** void __set_PSP(uint32_t topOfProcStack)
473:lib/CMSIS/Core/CM3/core_cm3.c **** {
54 .loc 1 473 0
55 @ args = 0, pretend = 0, frame = 0
56 @ frame_needed = 0, uses_anonymous_args = 0
57 @ link register save eliminated.
58 .LVL2:
474:lib/CMSIS/Core/CM3/core_cm3.c **** __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) );
59 .loc 1 474 0
60 @ 474 "lib/CMSIS/Core/CM3/core_cm3.c" 1
61 0000 80F30988 MSR psp, r0
62 @ 0 "" 2
475:lib/CMSIS/Core/CM3/core_cm3.c **** }
63 .loc 1 475 0
64 .thumb
65 0004 7047 bx lr
66 .LFE3:
68 0006 C046 .section .text.__get_MSP,"ax",%progbits
69 .align 2
70 .global __get_MSP
71 .thumb
72 .thumb_func
74 __get_MSP:
75 .LFB4:
476:lib/CMSIS/Core/CM3/core_cm3.c ****
477:lib/CMSIS/Core/CM3/core_cm3.c **** /**
478:lib/CMSIS/Core/CM3/core_cm3.c **** * @brief Return the Main Stack Pointer
479:lib/CMSIS/Core/CM3/core_cm3.c **** *
480:lib/CMSIS/Core/CM3/core_cm3.c **** * @param none
481:lib/CMSIS/Core/CM3/core_cm3.c **** * @return uint32_t Main Stack Pointer
482:lib/CMSIS/Core/CM3/core_cm3.c **** *
483:lib/CMSIS/Core/CM3/core_cm3.c **** * Return the current value of the MSP (main stack pointer)
484:lib/CMSIS/Core/CM3/core_cm3.c **** * Cortex processor register
485:lib/CMSIS/Core/CM3/core_cm3.c **** */
486:lib/CMSIS/Core/CM3/core_cm3.c **** uint32_t __get_MSP(void)
487:lib/CMSIS/Core/CM3/core_cm3.c **** {
76 .loc 1 487 0
77 @ args = 0, pretend = 0, frame = 0
78 @ frame_needed = 0, uses_anonymous_args = 0
79 @ link register save eliminated.
488:lib/CMSIS/Core/CM3/core_cm3.c **** uint32_t result=0;
489:lib/CMSIS/Core/CM3/core_cm3.c ****
490:lib/CMSIS/Core/CM3/core_cm3.c **** __ASM volatile ("MRS %0, msp" : "=r" (result) );
80 .loc 1 490 0
81 @ 490 "lib/CMSIS/Core/CM3/core_cm3.c" 1
82 0000 EFF30880 MRS r0, msp
83 @ 0 "" 2
84 .LVL3:
85 .LVL4:
491:lib/CMSIS/Core/CM3/core_cm3.c **** return(result);
492:lib/CMSIS/Core/CM3/core_cm3.c **** }
86 .loc 1 492 0
87 .thumb
88 0004 7047 bx lr
89 .LFE4:
91 0006 C046 .section .text.__set_MSP,"ax",%progbits
92 .align 2
93 .global __set_MSP
94 .thumb
95 .thumb_func
97 __set_MSP:
98 .LFB5:
493:lib/CMSIS/Core/CM3/core_cm3.c ****
494:lib/CMSIS/Core/CM3/core_cm3.c **** /**
495:lib/CMSIS/Core/CM3/core_cm3.c **** * @brief Set the Main Stack Pointer
496:lib/CMSIS/Core/CM3/core_cm3.c **** *
497:lib/CMSIS/Core/CM3/core_cm3.c **** * @param uint32_t Main Stack Pointer
498:lib/CMSIS/Core/CM3/core_cm3.c **** * @return none
499:lib/CMSIS/Core/CM3/core_cm3.c **** *
500:lib/CMSIS/Core/CM3/core_cm3.c **** * Assign the value mainStackPointer to the MSP
501:lib/CMSIS/Core/CM3/core_cm3.c **** * (main stack pointer) Cortex processor register
502:lib/CMSIS/Core/CM3/core_cm3.c **** */
503:lib/CMSIS/Core/CM3/core_cm3.c **** void __set_MSP(uint32_t topOfMainStack)
504:lib/CMSIS/Core/CM3/core_cm3.c **** {
99 .loc 1 504 0
100 @ args = 0, pretend = 0, frame = 0
101 @ frame_needed = 0, uses_anonymous_args = 0
102 @ link register save eliminated.
103 .LVL5:
505:lib/CMSIS/Core/CM3/core_cm3.c **** __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) );
104 .loc 1 505 0
105 @ 505 "lib/CMSIS/Core/CM3/core_cm3.c" 1
106 0000 80F30888 MSR msp, r0
107 @ 0 "" 2
506:lib/CMSIS/Core/CM3/core_cm3.c **** }
108 .loc 1 506 0
109 .thumb
110 0004 7047 bx lr
111 .LFE5:
113 0006 C046 .section .text.__get_BASEPRI,"ax",%progbits
114 .align 2
115 .global __get_BASEPRI
116 .thumb
117 .thumb_func
119 __get_BASEPRI:
120 .LFB6:
507:lib/CMSIS/Core/CM3/core_cm3.c ****
508:lib/CMSIS/Core/CM3/core_cm3.c **** /**
509:lib/CMSIS/Core/CM3/core_cm3.c **** * @brief Return the Base Priority value
510:lib/CMSIS/Core/CM3/core_cm3.c **** *
511:lib/CMSIS/Core/CM3/core_cm3.c **** * @param none
512:lib/CMSIS/Core/CM3/core_cm3.c **** * @return uint32_t BasePriority
513:lib/CMSIS/Core/CM3/core_cm3.c **** *
514:lib/CMSIS/Core/CM3/core_cm3.c **** * Return the content of the base priority register
515:lib/CMSIS/Core/CM3/core_cm3.c **** */
516:lib/CMSIS/Core/CM3/core_cm3.c **** uint32_t __get_BASEPRI(void)
517:lib/CMSIS/Core/CM3/core_cm3.c **** {
121 .loc 1 517 0
122 @ args = 0, pretend = 0, frame = 0
123 @ frame_needed = 0, uses_anonymous_args = 0
124 @ link register save eliminated.
518:lib/CMSIS/Core/CM3/core_cm3.c **** uint32_t result=0;
519:lib/CMSIS/Core/CM3/core_cm3.c ****
520:lib/CMSIS/Core/CM3/core_cm3.c **** __ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
125 .loc 1 520 0
126 @ 520 "lib/CMSIS/Core/CM3/core_cm3.c" 1
127 0000 EFF31280 MRS r0, basepri_max
128 @ 0 "" 2
129 .LVL6:
130 .LVL7:
521:lib/CMSIS/Core/CM3/core_cm3.c **** return(result);
522:lib/CMSIS/Core/CM3/core_cm3.c **** }
131 .loc 1 522 0
132 .thumb
133 0004 7047 bx lr
134 .LFE6:
136 0006 C046 .section .text.__set_BASEPRI,"ax",%progbits
137 .align 2
138 .global __set_BASEPRI
139 .thumb
140 .thumb_func
142 __set_BASEPRI:
143 .LFB7:
523:lib/CMSIS/Core/CM3/core_cm3.c ****
524:lib/CMSIS/Core/CM3/core_cm3.c **** /**
525:lib/CMSIS/Core/CM3/core_cm3.c **** * @brief Set the Base Priority value
526:lib/CMSIS/Core/CM3/core_cm3.c **** *
527:lib/CMSIS/Core/CM3/core_cm3.c **** * @param uint32_t BasePriority
528:lib/CMSIS/Core/CM3/core_cm3.c **** * @return none
529:lib/CMSIS/Core/CM3/core_cm3.c **** *
530:lib/CMSIS/Core/CM3/core_cm3.c **** * Set the base priority register
531:lib/CMSIS/Core/CM3/core_cm3.c **** */
532:lib/CMSIS/Core/CM3/core_cm3.c **** void __set_BASEPRI(uint32_t value)
533:lib/CMSIS/Core/CM3/core_cm3.c **** {
144 .loc 1 533 0
145 @ args = 0, pretend = 0, frame = 0
146 @ frame_needed = 0, uses_anonymous_args = 0
147 @ link register save eliminated.
148 .LVL8:
534:lib/CMSIS/Core/CM3/core_cm3.c **** __ASM volatile ("MSR basepri, %0" : : "r" (value) );
149 .loc 1 534 0
150 @ 534 "lib/CMSIS/Core/CM3/core_cm3.c" 1
151 0000 80F31188 MSR basepri, r0
152 @ 0 "" 2
535:lib/CMSIS/Core/CM3/core_cm3.c **** }
153 .loc 1 535 0
154 .thumb
155 0004 7047 bx lr
156 .LFE7:
158 0006 C046 .section .text.__get_PRIMASK,"ax",%progbits
159 .align 2
160 .global __get_PRIMASK
161 .thumb
162 .thumb_func
164 __get_PRIMASK:
165 .LFB8:
536:lib/CMSIS/Core/CM3/core_cm3.c ****
537:lib/CMSIS/Core/CM3/core_cm3.c **** /**
538:lib/CMSIS/Core/CM3/core_cm3.c **** * @brief Return the Priority Mask value
539:lib/CMSIS/Core/CM3/core_cm3.c **** *
540:lib/CMSIS/Core/CM3/core_cm3.c **** * @param none
541:lib/CMSIS/Core/CM3/core_cm3.c **** * @return uint32_t PriMask
542:lib/CMSIS/Core/CM3/core_cm3.c **** *
543:lib/CMSIS/Core/CM3/core_cm3.c **** * Return the state of the priority mask bit from the priority mask
544:lib/CMSIS/Core/CM3/core_cm3.c **** * register
545:lib/CMSIS/Core/CM3/core_cm3.c **** */
546:lib/CMSIS/Core/CM3/core_cm3.c **** uint32_t __get_PRIMASK(void)
547:lib/CMSIS/Core/CM3/core_cm3.c **** {
166 .loc 1 547 0
167 @ args = 0, pretend = 0, frame = 0
168 @ frame_needed = 0, uses_anonymous_args = 0
169 @ link register save eliminated.
548:lib/CMSIS/Core/CM3/core_cm3.c **** uint32_t result=0;
549:lib/CMSIS/Core/CM3/core_cm3.c ****
550:lib/CMSIS/Core/CM3/core_cm3.c **** __ASM volatile ("MRS %0, primask" : "=r" (result) );
170 .loc 1 550 0
171 @ 550 "lib/CMSIS/Core/CM3/core_cm3.c" 1
172 0000 EFF31080 MRS r0, primask
173 @ 0 "" 2
174 .LVL9:
175 .LVL10:
551:lib/CMSIS/Core/CM3/core_cm3.c **** return(result);
552:lib/CMSIS/Core/CM3/core_cm3.c **** }
176 .loc 1 552 0
177 .thumb
178 0004 7047 bx lr
179 .LFE8:
181 0006 C046 .section .text.__set_PRIMASK,"ax",%progbits
182 .align 2
183 .global __set_PRIMASK
184 .thumb
185 .thumb_func
187 __set_PRIMASK:
188 .LFB9:
553:lib/CMSIS/Core/CM3/core_cm3.c ****
554:lib/CMSIS/Core/CM3/core_cm3.c **** /**
555:lib/CMSIS/Core/CM3/core_cm3.c **** * @brief Set the Priority Mask value
556:lib/CMSIS/Core/CM3/core_cm3.c **** *
557:lib/CMSIS/Core/CM3/core_cm3.c **** * @param uint32_t PriMask
558:lib/CMSIS/Core/CM3/core_cm3.c **** * @return none
559:lib/CMSIS/Core/CM3/core_cm3.c **** *
560:lib/CMSIS/Core/CM3/core_cm3.c **** * Set the priority mask bit in the priority mask register
561:lib/CMSIS/Core/CM3/core_cm3.c **** */
562:lib/CMSIS/Core/CM3/core_cm3.c **** void __set_PRIMASK(uint32_t priMask)
563:lib/CMSIS/Core/CM3/core_cm3.c **** {
189 .loc 1 563 0
190 @ args = 0, pretend = 0, frame = 0
191 @ frame_needed = 0, uses_anonymous_args = 0
192 @ link register save eliminated.
193 .LVL11:
564:lib/CMSIS/Core/CM3/core_cm3.c **** __ASM volatile ("MSR primask, %0" : : "r" (priMask) );
194 .loc 1 564 0
195 @ 564 "lib/CMSIS/Core/CM3/core_cm3.c" 1
196 0000 80F31088 MSR primask, r0
197 @ 0 "" 2
565:lib/CMSIS/Core/CM3/core_cm3.c **** }
198 .loc 1 565 0
199 .thumb
200 0004 7047 bx lr
201 .LFE9:
203 0006 C046 .section .text.__get_FAULTMASK,"ax",%progbits
204 .align 2
205 .global __get_FAULTMASK
206 .thumb
207 .thumb_func
209 __get_FAULTMASK:
210 .LFB10:
566:lib/CMSIS/Core/CM3/core_cm3.c ****
567:lib/CMSIS/Core/CM3/core_cm3.c **** /**
568:lib/CMSIS/Core/CM3/core_cm3.c **** * @brief Return the Fault Mask value
569:lib/CMSIS/Core/CM3/core_cm3.c **** *
570:lib/CMSIS/Core/CM3/core_cm3.c **** * @param none
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