📄 system_stm32f10x.lst
字号:
1 .syntax unified
2 .cpu cortex-m3
3 .fpu softvfp
4 .eabi_attribute 20, 1
5 .eabi_attribute 21, 1
6 .eabi_attribute 23, 3
7 .eabi_attribute 24, 1
8 .eabi_attribute 25, 1
9 .eabi_attribute 26, 1
10 .eabi_attribute 30, 4
11 .eabi_attribute 18, 4
12 .thumb
13 .file "system_stm32f10x.c"
21 .Ltext0:
22 .section .text.SystemInit,"ax",%progbits
23 .align 2
24 .global SystemInit
25 .thumb
26 .thumb_func
28 SystemInit:
29 .LFB26:
30 .file 1 "lib/CMSIS/Core/CM3/system_stm32f10x.c"
1:lib/CMSIS/Core/CM3/system_stm32f10x.c **** /**
2:lib/CMSIS/Core/CM3/system_stm32f10x.c **** ******************************************************************************
3:lib/CMSIS/Core/CM3/system_stm32f10x.c **** * @file system_stm32f10x.c
4:lib/CMSIS/Core/CM3/system_stm32f10x.c **** * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
5:lib/CMSIS/Core/CM3/system_stm32f10x.c **** * @author STMicroelectronics - MCD Application Team
6:lib/CMSIS/Core/CM3/system_stm32f10x.c **** * @version V3.0.0
7:lib/CMSIS/Core/CM3/system_stm32f10x.c **** * @date 04/06/2009
8:lib/CMSIS/Core/CM3/system_stm32f10x.c **** ******************************************************************************
9:lib/CMSIS/Core/CM3/system_stm32f10x.c **** *
10:lib/CMSIS/Core/CM3/system_stm32f10x.c **** * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
11:lib/CMSIS/Core/CM3/system_stm32f10x.c **** * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
12:lib/CMSIS/Core/CM3/system_stm32f10x.c **** * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
13:lib/CMSIS/Core/CM3/system_stm32f10x.c **** * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
14:lib/CMSIS/Core/CM3/system_stm32f10x.c **** * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
15:lib/CMSIS/Core/CM3/system_stm32f10x.c **** * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
16:lib/CMSIS/Core/CM3/system_stm32f10x.c **** *
17:lib/CMSIS/Core/CM3/system_stm32f10x.c **** * <h2><center>© COPYRIGHT 2009 STMicroelectronics</center></h2>
18:lib/CMSIS/Core/CM3/system_stm32f10x.c **** ******************************************************************************
19:lib/CMSIS/Core/CM3/system_stm32f10x.c **** */
20:lib/CMSIS/Core/CM3/system_stm32f10x.c ****
21:lib/CMSIS/Core/CM3/system_stm32f10x.c **** /** @addtogroup Private_Includes
22:lib/CMSIS/Core/CM3/system_stm32f10x.c **** * @{
23:lib/CMSIS/Core/CM3/system_stm32f10x.c **** */
24:lib/CMSIS/Core/CM3/system_stm32f10x.c ****
25:lib/CMSIS/Core/CM3/system_stm32f10x.c **** #include "stm32f10x.h"
26:lib/CMSIS/Core/CM3/system_stm32f10x.c ****
27:lib/CMSIS/Core/CM3/system_stm32f10x.c **** /**
28:lib/CMSIS/Core/CM3/system_stm32f10x.c **** * @}
29:lib/CMSIS/Core/CM3/system_stm32f10x.c **** */
30:lib/CMSIS/Core/CM3/system_stm32f10x.c ****
31:lib/CMSIS/Core/CM3/system_stm32f10x.c **** /** @addtogroup Private_TypesDefinitions
32:lib/CMSIS/Core/CM3/system_stm32f10x.c **** * @{
33:lib/CMSIS/Core/CM3/system_stm32f10x.c **** */
34:lib/CMSIS/Core/CM3/system_stm32f10x.c ****
35:lib/CMSIS/Core/CM3/system_stm32f10x.c **** /**
36:lib/CMSIS/Core/CM3/system_stm32f10x.c **** * @}
37:lib/CMSIS/Core/CM3/system_stm32f10x.c **** */
38:lib/CMSIS/Core/CM3/system_stm32f10x.c ****
39:lib/CMSIS/Core/CM3/system_stm32f10x.c **** /** @addtogroup Private_Defines
40:lib/CMSIS/Core/CM3/system_stm32f10x.c **** * @{
41:lib/CMSIS/Core/CM3/system_stm32f10x.c **** */
42:lib/CMSIS/Core/CM3/system_stm32f10x.c ****
43:lib/CMSIS/Core/CM3/system_stm32f10x.c **** /*!< Uncomment the line corresponding to the desired System clock (SYSCLK)
44:lib/CMSIS/Core/CM3/system_stm32f10x.c **** frequency (after reset the HSI is used as SYSCLK source) */
45:lib/CMSIS/Core/CM3/system_stm32f10x.c **** //#define SYSCLK_FREQ_HSE HSE_Value
46:lib/CMSIS/Core/CM3/system_stm32f10x.c **** //#define SYSCLK_FREQ_20MHz 20000000
47:lib/CMSIS/Core/CM3/system_stm32f10x.c **** //#define SYSCLK_FREQ_36MHz 36000000
48:lib/CMSIS/Core/CM3/system_stm32f10x.c **** //#define SYSCLK_FREQ_48MHz 48000000
49:lib/CMSIS/Core/CM3/system_stm32f10x.c **** //#define SYSCLK_FREQ_56MHz 56000000
50:lib/CMSIS/Core/CM3/system_stm32f10x.c **** #define SYSCLK_FREQ_72MHz 72000000
51:lib/CMSIS/Core/CM3/system_stm32f10x.c ****
52:lib/CMSIS/Core/CM3/system_stm32f10x.c **** /*!< Uncomment the following line if you need to use external SRAM mounted
53:lib/CMSIS/Core/CM3/system_stm32f10x.c **** on STM3210E-EVAL board (STM32 High density devices) as data memory */
54:lib/CMSIS/Core/CM3/system_stm32f10x.c **** #ifdef STM32F10X_HD
55:lib/CMSIS/Core/CM3/system_stm32f10x.c **** /* #define DATA_IN_ExtSRAM */
56:lib/CMSIS/Core/CM3/system_stm32f10x.c **** #endif /* STM32F10X_HD */
57:lib/CMSIS/Core/CM3/system_stm32f10x.c ****
58:lib/CMSIS/Core/CM3/system_stm32f10x.c **** /**
59:lib/CMSIS/Core/CM3/system_stm32f10x.c **** * @}
60:lib/CMSIS/Core/CM3/system_stm32f10x.c **** */
61:lib/CMSIS/Core/CM3/system_stm32f10x.c ****
62:lib/CMSIS/Core/CM3/system_stm32f10x.c **** /** @addtogroup Private_Macros
63:lib/CMSIS/Core/CM3/system_stm32f10x.c **** * @{
64:lib/CMSIS/Core/CM3/system_stm32f10x.c **** */
65:lib/CMSIS/Core/CM3/system_stm32f10x.c ****
66:lib/CMSIS/Core/CM3/system_stm32f10x.c **** /**
67:lib/CMSIS/Core/CM3/system_stm32f10x.c **** * @}
68:lib/CMSIS/Core/CM3/system_stm32f10x.c **** */
69:lib/CMSIS/Core/CM3/system_stm32f10x.c ****
70:lib/CMSIS/Core/CM3/system_stm32f10x.c **** /** @addtogroup Private_Variables
71:lib/CMSIS/Core/CM3/system_stm32f10x.c **** * @{
72:lib/CMSIS/Core/CM3/system_stm32f10x.c **** */
73:lib/CMSIS/Core/CM3/system_stm32f10x.c ****
74:lib/CMSIS/Core/CM3/system_stm32f10x.c **** /*******************************************************************************
75:lib/CMSIS/Core/CM3/system_stm32f10x.c **** * Clock Definitions
76:lib/CMSIS/Core/CM3/system_stm32f10x.c **** *******************************************************************************/
77:lib/CMSIS/Core/CM3/system_stm32f10x.c **** #ifdef SYSCLK_FREQ_HSE
78:lib/CMSIS/Core/CM3/system_stm32f10x.c **** const uint32_t SystemFrequency = SYSCLK_FREQ_HSE; /*!< System Clock Frequency (Cor
79:lib/CMSIS/Core/CM3/system_stm32f10x.c **** const uint32_t SystemFrequency_SysClk = SYSCLK_FREQ_HSE; /*!< System clock
80:lib/CMSIS/Core/CM3/system_stm32f10x.c **** const uint32_t SystemFrequency_AHBClk = SYSCLK_FREQ_HSE; /*!< AHB System bus speed
81:lib/CMSIS/Core/CM3/system_stm32f10x.c **** const uint32_t SystemFrequency_APB1Clk = SYSCLK_FREQ_HSE; /*!< APB Peripheral bus 1 (low)
82:lib/CMSIS/Core/CM3/system_stm32f10x.c **** const uint32_t SystemFrequency_APB2Clk = SYSCLK_FREQ_HSE; /*!< APB Peripheral bus 2 (high)
83:lib/CMSIS/Core/CM3/system_stm32f10x.c **** #elif defined SYSCLK_FREQ_20MHz
84:lib/CMSIS/Core/CM3/system_stm32f10x.c **** const uint32_t SystemFrequency = SYSCLK_FREQ_20MHz; /*!< System Clock Frequency (Cor
85:lib/CMSIS/Core/CM3/system_stm32f10x.c **** const uint32_t SystemFrequency_SysClk = SYSCLK_FREQ_20MHz; /*!< System clock
86:lib/CMSIS/Core/CM3/system_stm32f10x.c **** const uint32_t SystemFrequency_AHBClk = SYSCLK_FREQ_20MHz; /*!< AHB System bus speed
87:lib/CMSIS/Core/CM3/system_stm32f10x.c **** const uint32_t SystemFrequency_APB1Clk = SYSCLK_FREQ_20MHz; /*!< APB Peripheral bus 1 (low)
88:lib/CMSIS/Core/CM3/system_stm32f10x.c **** const uint32_t SystemFrequency_APB2Clk = SYSCLK_FREQ_20MHz; /*!< APB Peripheral bus 2 (high)
89:lib/CMSIS/Core/CM3/system_stm32f10x.c **** #elif defined SYSCLK_FREQ_36MHz
90:lib/CMSIS/Core/CM3/system_stm32f10x.c **** const uint32_t SystemFrequency = SYSCLK_FREQ_36MHz; /*!< System Clock Frequency (Cor
91:lib/CMSIS/Core/CM3/system_stm32f10x.c **** const uint32_t SystemFrequency_SysClk = SYSCLK_FREQ_36MHz; /*!< System clock
92:lib/CMSIS/Core/CM3/system_stm32f10x.c **** const uint32_t SystemFrequency_AHBClk = SYSCLK_FREQ_36MHz; /*!< AHB System bus speed
93:lib/CMSIS/Core/CM3/system_stm32f10x.c **** const uint32_t SystemFrequency_APB1Clk = SYSCLK_FREQ_36MHz; /*!< APB Peripheral bus 1 (low)
94:lib/CMSIS/Core/CM3/system_stm32f10x.c **** const uint32_t SystemFrequency_APB2Clk = SYSCLK_FREQ_36MHz; /*!< APB Peripheral bus 2 (high)
95:lib/CMSIS/Core/CM3/system_stm32f10x.c **** #elif defined SYSCLK_FREQ_48MHz
96:lib/CMSIS/Core/CM3/system_stm32f10x.c **** const uint32_t SystemFrequency = SYSCLK_FREQ_48MHz; /*!< System Clock Frequency (Cor
97:lib/CMSIS/Core/CM3/system_stm32f10x.c **** const uint32_t SystemFrequency_SysClk = SYSCLK_FREQ_48MHz; /*!< System clock
98:lib/CMSIS/Core/CM3/system_stm32f10x.c **** const uint32_t SystemFrequency_AHBClk = SYSCLK_FREQ_48MHz; /*!< AHB System bus speed
99:lib/CMSIS/Core/CM3/system_stm32f10x.c **** const uint32_t SystemFrequency_APB1Clk = (SYSCLK_FREQ_48MHz/2); /*!< APB Peripheral bus 1 (low)
100:lib/CMSIS/Core/CM3/system_stm32f10x.c **** const uint32_t SystemFrequency_APB2Clk = SYSCLK_FREQ_48MHz; /*!< APB Peripheral bus 2 (high)
101:lib/CMSIS/Core/CM3/system_stm32f10x.c **** #elif defined SYSCLK_FREQ_56MHz
102:lib/CMSIS/Core/CM3/system_stm32f10x.c **** const uint32_t SystemFrequency = SYSCLK_FREQ_56MHz; /*!< System Clock Frequency (Cor
103:lib/CMSIS/Core/CM3/system_stm32f10x.c **** const uint32_t SystemFrequency_SysClk = SYSCLK_FREQ_56MHz; /*!< System clock
104:lib/CMSIS/Core/CM3/system_stm32f10x.c **** const uint32_t SystemFrequency_AHBClk = SYSCLK_FREQ_56MHz; /*!< AHB System bus speed
105:lib/CMSIS/Core/CM3/system_stm32f10x.c **** const uint32_t SystemFrequency_APB1Clk = (SYSCLK_FREQ_56MHz/2); /*!< APB Peripheral bus 1 (low)
106:lib/CMSIS/Core/CM3/system_stm32f10x.c **** const uint32_t SystemFrequency_APB2Clk = SYSCLK_FREQ_56MHz; /*!< APB Peripheral bus 2 (high)
107:lib/CMSIS/Core/CM3/system_stm32f10x.c **** #elif defined SYSCLK_FREQ_72MHz
108:lib/CMSIS/Core/CM3/system_stm32f10x.c **** const uint32_t SystemFrequency = SYSCLK_FREQ_72MHz; /*!< System Clock Frequency (Cor
109:lib/CMSIS/Core/CM3/system_stm32f10x.c **** const uint32_t SystemFrequency_SysClk = SYSCLK_FREQ_72MHz; /*!< System clock
110:lib/CMSIS/Core/CM3/system_stm32f10x.c **** const uint32_t SystemFrequency_AHBClk = SYSCLK_FREQ_72MHz; /*!< AHB System bus speed
111:lib/CMSIS/Core/CM3/system_stm32f10x.c **** const uint32_t SystemFrequency_APB1Clk = (SYSCLK_FREQ_72MHz/2); /*!< APB Peripheral bus 1 (low)
112:lib/CMSIS/Core/CM3/system_stm32f10x.c **** const uint32_t SystemFrequency_APB2Clk = SYSCLK_FREQ_72MHz; /*!< APB Peripheral bus 2 (high)
113:lib/CMSIS/Core/CM3/system_stm32f10x.c **** #else /*!< HSI Selected as System Clock source */
114:lib/CMSIS/Core/CM3/system_stm32f10x.c **** const uint32_t SystemFrequency = HSI_Value; /*!< System Clock Frequency (C
115:lib/CMSIS/Core/CM3/system_stm32f10x.c **** const uint32_t SystemFrequency_SysClk = HSI_Value; /*!< System clock
116:lib/CMSIS/Core/CM3/system_stm32f10x.c **** const uint32_t SystemFrequency_AHBClk = HSI_Value; /*!< AHB System bus speed
117:lib/CMSIS/Core/CM3/system_stm32f10x.c **** const uint32_t SystemFrequency_APB1Clk = HSI_Value; /*!< APB Peripheral bus 1 (low
118:lib/CMSIS/Core/CM3/system_stm32f10x.c **** const uint32_t SystemFrequency_APB2Clk = HSI_Value; /*!< APB Peripheral bus 2 (hig
119:lib/CMSIS/Core/CM3/system_stm32f10x.c **** #endif
120:lib/CMSIS/Core/CM3/system_stm32f10x.c ****
121:lib/CMSIS/Core/CM3/system_stm32f10x.c **** /**
122:lib/CMSIS/Core/CM3/system_stm32f10x.c **** * @}
123:lib/CMSIS/Core/CM3/system_stm32f10x.c **** */
124:lib/CMSIS/Core/CM3/system_stm32f10x.c ****
125:lib/CMSIS/Core/CM3/system_stm32f10x.c **** /** @addtogroup Private_FunctionPrototypes
126:lib/CMSIS/Core/CM3/system_stm32f10x.c **** * @{
127:lib/CMSIS/Core/CM3/system_stm32f10x.c **** */
128:lib/CMSIS/Core/CM3/system_stm32f10x.c ****
129:lib/CMSIS/Core/CM3/system_stm32f10x.c **** static void SetSysClock(void);
130:lib/CMSIS/Core/CM3/system_stm32f10x.c ****
131:lib/CMSIS/Core/CM3/system_stm32f10x.c **** #ifdef SYSCLK_FREQ_HSE
132:lib/CMSIS/Core/CM3/system_stm32f10x.c **** static void SetSysClockToHSE(void);
133:lib/CMSIS/Core/CM3/system_stm32f10x.c **** #elif defined SYSCLK_FREQ_20MHz
134:lib/CMSIS/Core/CM3/system_stm32f10x.c **** static void SetSysClockTo20(void);
135:lib/CMSIS/Core/CM3/system_stm32f10x.c **** #elif defined SYSCLK_FREQ_36MHz
136:lib/CMSIS/Core/CM3/system_stm32f10x.c **** static void SetSysClockTo36(void);
137:lib/CMSIS/Core/CM3/system_stm32f10x.c **** #elif defined SYSCLK_FREQ_48MHz
138:lib/CMSIS/Core/CM3/system_stm32f10x.c **** static void SetSysClockTo48(void);
139:lib/CMSIS/Core/CM3/system_stm32f10x.c **** #elif defined SYSCLK_FREQ_56MHz
140:lib/CMSIS/Core/CM3/system_stm32f10x.c **** static void SetSysClockTo56(void);
141:lib/CMSIS/Core/CM3/system_stm32f10x.c **** #elif defined SYSCLK_FREQ_72MHz
142:lib/CMSIS/Core/CM3/system_stm32f10x.c **** static void SetSysClockTo72(void);
143:lib/CMSIS/Core/CM3/system_stm32f10x.c **** #endif
144:lib/CMSIS/Core/CM3/system_stm32f10x.c ****
145:lib/CMSIS/Core/CM3/system_stm32f10x.c **** /**
146:lib/CMSIS/Core/CM3/system_stm32f10x.c **** * @}
147:lib/CMSIS/Core/CM3/system_stm32f10x.c **** */
148:lib/CMSIS/Core/CM3/system_stm32f10x.c ****
149:lib/CMSIS/Core/CM3/system_stm32f10x.c **** /** @addtogroup Private_Functions
150:lib/CMSIS/Core/CM3/system_stm32f10x.c **** * @{
151:lib/CMSIS/Core/CM3/system_stm32f10x.c **** */
152:lib/CMSIS/Core/CM3/system_stm32f10x.c ****
153:lib/CMSIS/Core/CM3/system_stm32f10x.c **** /**
154:lib/CMSIS/Core/CM3/system_stm32f10x.c **** * @brief Setup the microcontroller system
155:lib/CMSIS/Core/CM3/system_stm32f10x.c **** * Initialize the Embedded Flash Interface, initialize the PLL and update th SystemFrequen
156:lib/CMSIS/Core/CM3/system_stm32f10x.c **** * @param None.
157:lib/CMSIS/Core/CM3/system_stm32f10x.c **** * @arg None.
158:lib/CMSIS/Core/CM3/system_stm32f10x.c **** * @note : This function should be used only after reset.
159:lib/CMSIS/Core/CM3/system_stm32f10x.c **** * @retval value: None.
160:lib/CMSIS/Core/CM3/system_stm32f10x.c **** */
161:lib/CMSIS/Core/CM3/system_stm32f10x.c **** void SystemInit (void)
162:lib/CMSIS/Core/CM3/system_stm32f10x.c **** {
31 .loc 1 162 0
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