📄 core_cm3.lst
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372 .thumb_func
374 __LDREXH:
375 .LFB17:
675:lib/CMSIS/Core/CM3/core_cm3.c ****
676:lib/CMSIS/Core/CM3/core_cm3.c **** /**
677:lib/CMSIS/Core/CM3/core_cm3.c **** * @brief LDR Exclusive
678:lib/CMSIS/Core/CM3/core_cm3.c **** *
679:lib/CMSIS/Core/CM3/core_cm3.c **** * @param uint16_t* address
680:lib/CMSIS/Core/CM3/core_cm3.c **** * @return uint16_t value of (*address)
681:lib/CMSIS/Core/CM3/core_cm3.c **** *
682:lib/CMSIS/Core/CM3/core_cm3.c **** * Exclusive LDR command
683:lib/CMSIS/Core/CM3/core_cm3.c **** */
684:lib/CMSIS/Core/CM3/core_cm3.c **** uint16_t __LDREXH(uint16_t *addr)
685:lib/CMSIS/Core/CM3/core_cm3.c **** {
376 .loc 1 685 0
377 @ args = 0, pretend = 0, frame = 0
378 @ frame_needed = 0, uses_anonymous_args = 0
379 @ link register save eliminated.
380 .LVL29:
686:lib/CMSIS/Core/CM3/core_cm3.c **** uint16_t result=0;
687:lib/CMSIS/Core/CM3/core_cm3.c ****
688:lib/CMSIS/Core/CM3/core_cm3.c **** __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) );
381 .loc 1 688 0
382 @ 688 "lib/CMSIS/Core/CM3/core_cm3.c" 1
383 0000 D0E85F0F ldrexh r0, [r0]
384 @ 0 "" 2
385 .LVL30:
689:lib/CMSIS/Core/CM3/core_cm3.c **** return(result);
690:lib/CMSIS/Core/CM3/core_cm3.c **** }
386 .loc 1 690 0
387 .thumb
388 0004 80B2 uxth r0, r0
389 0006 7047 bx lr
390 .LFE17:
392 .section .text.__LDREXW,"ax",%progbits
393 .align 2
394 .global __LDREXW
395 .thumb
396 .thumb_func
398 __LDREXW:
399 .LFB18:
691:lib/CMSIS/Core/CM3/core_cm3.c ****
692:lib/CMSIS/Core/CM3/core_cm3.c **** /**
693:lib/CMSIS/Core/CM3/core_cm3.c **** * @brief LDR Exclusive
694:lib/CMSIS/Core/CM3/core_cm3.c **** *
695:lib/CMSIS/Core/CM3/core_cm3.c **** * @param uint32_t* address
696:lib/CMSIS/Core/CM3/core_cm3.c **** * @return uint32_t value of (*address)
697:lib/CMSIS/Core/CM3/core_cm3.c **** *
698:lib/CMSIS/Core/CM3/core_cm3.c **** * Exclusive LDR command
699:lib/CMSIS/Core/CM3/core_cm3.c **** */
700:lib/CMSIS/Core/CM3/core_cm3.c **** uint32_t __LDREXW(uint32_t *addr)
701:lib/CMSIS/Core/CM3/core_cm3.c **** {
400 .loc 1 701 0
401 @ args = 0, pretend = 0, frame = 0
402 @ frame_needed = 0, uses_anonymous_args = 0
403 @ link register save eliminated.
404 .LVL31:
702:lib/CMSIS/Core/CM3/core_cm3.c **** uint32_t result=0;
703:lib/CMSIS/Core/CM3/core_cm3.c ****
704:lib/CMSIS/Core/CM3/core_cm3.c **** __ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) );
405 .loc 1 704 0
406 @ 704 "lib/CMSIS/Core/CM3/core_cm3.c" 1
407 0000 50E8000F ldrex r0, [r0]
408 @ 0 "" 2
409 .LVL32:
410 .LVL33:
705:lib/CMSIS/Core/CM3/core_cm3.c **** return(result);
706:lib/CMSIS/Core/CM3/core_cm3.c **** }
411 .loc 1 706 0
412 .thumb
413 0004 7047 bx lr
414 .LFE18:
416 0006 C046 .section .text.__STREXB,"ax",%progbits
417 .align 2
418 .global __STREXB
419 .thumb
420 .thumb_func
422 __STREXB:
423 .LFB19:
707:lib/CMSIS/Core/CM3/core_cm3.c ****
708:lib/CMSIS/Core/CM3/core_cm3.c **** /**
709:lib/CMSIS/Core/CM3/core_cm3.c **** * @brief STR Exclusive
710:lib/CMSIS/Core/CM3/core_cm3.c **** *
711:lib/CMSIS/Core/CM3/core_cm3.c **** * @param uint8_t *address
712:lib/CMSIS/Core/CM3/core_cm3.c **** * @param uint8_t value to store
713:lib/CMSIS/Core/CM3/core_cm3.c **** * @return uint32_t successful / failed
714:lib/CMSIS/Core/CM3/core_cm3.c **** *
715:lib/CMSIS/Core/CM3/core_cm3.c **** * Exclusive STR command
716:lib/CMSIS/Core/CM3/core_cm3.c **** */
717:lib/CMSIS/Core/CM3/core_cm3.c **** uint32_t __STREXB(uint8_t value, uint8_t *addr)
718:lib/CMSIS/Core/CM3/core_cm3.c **** {
424 .loc 1 718 0
425 @ args = 0, pretend = 0, frame = 0
426 @ frame_needed = 0, uses_anonymous_args = 0
427 @ link register save eliminated.
428 .LVL34:
719:lib/CMSIS/Core/CM3/core_cm3.c **** uint32_t result=0;
720:lib/CMSIS/Core/CM3/core_cm3.c ****
721:lib/CMSIS/Core/CM3/core_cm3.c **** __ASM volatile ("strexb %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
429 .loc 1 721 0
430 @ 721 "lib/CMSIS/Core/CM3/core_cm3.c" 1
431 0000 C1E8410F strexb r1, r0, [r1]
432 @ 0 "" 2
433 .LVL35:
722:lib/CMSIS/Core/CM3/core_cm3.c **** return(result);
723:lib/CMSIS/Core/CM3/core_cm3.c **** }
434 .loc 1 723 0
435 .thumb
436 0004 0846 mov r0, r1
437 .LVL36:
438 0006 7047 bx lr
439 .LFE19:
441 .section .text.__STREXH,"ax",%progbits
442 .align 2
443 .global __STREXH
444 .thumb
445 .thumb_func
447 __STREXH:
448 .LFB20:
724:lib/CMSIS/Core/CM3/core_cm3.c ****
725:lib/CMSIS/Core/CM3/core_cm3.c **** /**
726:lib/CMSIS/Core/CM3/core_cm3.c **** * @brief STR Exclusive
727:lib/CMSIS/Core/CM3/core_cm3.c **** *
728:lib/CMSIS/Core/CM3/core_cm3.c **** * @param uint16_t *address
729:lib/CMSIS/Core/CM3/core_cm3.c **** * @param uint16_t value to store
730:lib/CMSIS/Core/CM3/core_cm3.c **** * @return uint32_t successful / failed
731:lib/CMSIS/Core/CM3/core_cm3.c **** *
732:lib/CMSIS/Core/CM3/core_cm3.c **** * Exclusive STR command
733:lib/CMSIS/Core/CM3/core_cm3.c **** */
734:lib/CMSIS/Core/CM3/core_cm3.c **** uint32_t __STREXH(uint16_t value, uint16_t *addr)
735:lib/CMSIS/Core/CM3/core_cm3.c **** {
449 .loc 1 735 0
450 @ args = 0, pretend = 0, frame = 0
451 @ frame_needed = 0, uses_anonymous_args = 0
452 @ link register save eliminated.
453 .LVL37:
736:lib/CMSIS/Core/CM3/core_cm3.c **** uint32_t result=0;
737:lib/CMSIS/Core/CM3/core_cm3.c ****
738:lib/CMSIS/Core/CM3/core_cm3.c **** __ASM volatile ("strexh %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
454 .loc 1 738 0
455 @ 738 "lib/CMSIS/Core/CM3/core_cm3.c" 1
456 0000 C1E8510F strexh r1, r0, [r1]
457 @ 0 "" 2
458 .LVL38:
739:lib/CMSIS/Core/CM3/core_cm3.c **** return(result);
740:lib/CMSIS/Core/CM3/core_cm3.c **** }
459 .loc 1 740 0
460 .thumb
461 0004 0846 mov r0, r1
462 .LVL39:
463 0006 7047 bx lr
464 .LFE20:
466 .section .text.__STREXW,"ax",%progbits
467 .align 2
468 .global __STREXW
469 .thumb
470 .thumb_func
472 __STREXW:
473 .LFB21:
741:lib/CMSIS/Core/CM3/core_cm3.c ****
742:lib/CMSIS/Core/CM3/core_cm3.c **** /**
743:lib/CMSIS/Core/CM3/core_cm3.c **** * @brief STR Exclusive
744:lib/CMSIS/Core/CM3/core_cm3.c **** *
745:lib/CMSIS/Core/CM3/core_cm3.c **** * @param uint32_t *address
746:lib/CMSIS/Core/CM3/core_cm3.c **** * @param uint32_t value to store
747:lib/CMSIS/Core/CM3/core_cm3.c **** * @return uint32_t successful / failed
748:lib/CMSIS/Core/CM3/core_cm3.c **** *
749:lib/CMSIS/Core/CM3/core_cm3.c **** * Exclusive STR command
750:lib/CMSIS/Core/CM3/core_cm3.c **** */
751:lib/CMSIS/Core/CM3/core_cm3.c **** uint32_t __STREXW(uint32_t value, uint32_t *addr)
752:lib/CMSIS/Core/CM3/core_cm3.c **** {
474 .loc 1 752 0
475 @ args = 0, pretend = 0, frame = 0
476 @ frame_needed = 0, uses_anonymous_args = 0
477 @ link register save eliminated.
478 .LVL40:
753:lib/CMSIS/Core/CM3/core_cm3.c **** uint32_t result=0;
754:lib/CMSIS/Core/CM3/core_cm3.c ****
755:lib/CMSIS/Core/CM3/core_cm3.c **** __ASM volatile ("strex %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
479 .loc 1 755 0
480 @ 755 "lib/CMSIS/Core/CM3/core_cm3.c" 1
481 0000 41E80001 strex r1, r0, [r1]
482 @ 0 "" 2
483 .LVL41:
756:lib/CMSIS/Core/CM3/core_cm3.c **** return(result);
757:lib/CMSIS/Core/CM3/core_cm3.c **** }
484 .loc 1 757 0
485 .thumb
486 0004 0846 mov r0, r1
487 .LVL42:
488 0006 7047 bx lr
489 .LFE21:
491 .section .text.__get_CONTROL,"ax",%progbits
492 .align 2
493 .global __get_CONTROL
494 .thumb
495 .thumb_func
497 __get_CONTROL:
498 .LFB22:
758:lib/CMSIS/Core/CM3/core_cm3.c ****
759:lib/CMSIS/Core/CM3/core_cm3.c **** /**
760:lib/CMSIS/Core/CM3/core_cm3.c **** * @brief Return the Control Register value
761:lib/CMSIS/Core/CM3/core_cm3.c **** *
762:lib/CMSIS/Core/CM3/core_cm3.c **** * @param none
763:lib/CMSIS/Core/CM3/core_cm3.c **** * @return uint32_t Control value
764:lib/CMSIS/Core/CM3/core_cm3.c **** *
765:lib/CMSIS/Core/CM3/core_cm3.c **** * Return the content of the control register
766:lib/CMSIS/Core/CM3/core_cm3.c **** */
767:lib/CMSIS/Core/CM3/core_cm3.c **** uint32_t __get_CONTROL(void)
768:lib/CMSIS/Core/CM3/core_cm3.c **** {
499 .loc 1 768 0
500 @ args = 0, pretend = 0, frame = 0
501 @ frame_needed = 0, uses_anonymous_args = 0
502 @ link register save eliminated.
769:lib/CMSIS/Core/CM3/core_cm3.c **** uint32_t result=0;
770:lib/CMSIS/Core/CM3/core_cm3.c ****
771:lib/CMSIS/Core/CM3/core_cm3.c **** __ASM volatile ("MRS %0, control" : "=r" (result) );
503 .loc 1 771 0
504 @ 771 "lib/CMSIS/Core/CM3/core_cm3.c" 1
505 0000 EFF31480 MRS r0, control
506 @ 0 "" 2
507 .LVL43:
508 .LVL44:
772:lib/CMSIS/Core/CM3/core_cm3.c **** return(result);
773:lib/CMSIS/Core/CM3/core_cm3.c **** }
509 .loc 1 773 0
510 .thumb
511 0004 7047 bx lr
512 .LFE22:
514 0006 C046 .section .text.__set_CONTROL,"ax",%progbits
515 .align 2
516 .global __set_CONTROL
517 .thumb
518 .thumb_func
520 __set_CONTROL:
521 .LFB23:
774:lib/CMSIS/Core/CM3/core_cm3.c ****
775:lib/CMSIS/Core/CM3/core_cm3.c **** /**
776:lib/CMSIS/Core/CM3/core_cm3.c **** * @brief Set the Control Register value
777:lib/CMSIS/Core/CM3/core_cm3.c **** *
778:lib/CMSIS/Core/CM3/core_cm3.c **** * @param uint32_t Control value
779:lib/CMSIS/Core/CM3/core_cm3.c **** * @return none
780:lib/CMSIS/Core/CM3/core_cm3.c **** *
781:lib/CMSIS/Core/CM3/core_cm3.c **** * Set the control register
782:lib/CMSIS/Core/CM3/core_cm3.c **** */
783:lib/CMSIS/Core/CM3/core_cm3.c **** void __set_CONTROL(uint32_t control)
784:lib/CMSIS/Core/CM3/core_cm3.c **** {
522 .loc 1 784 0
523 @ args = 0, pretend = 0, frame = 0
524 @ frame_needed = 0, uses_anonymous_args = 0
525 @ link register save eliminated.
526 .LVL45⌨️ 快捷键说明
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